CORE-16748
- Display the correct TR register value.
- Ensure that the x86 segment register values displayed are really
2-byte long.
Segment registers are intrinsically 16 bits. Even if the x86
KTRAP_FRAME structure stores them as ULONG, only their lower 16 bits
are initialized. We thus cast them to USHORT before display.
These segment registers are saved in a stack-based KTRAP_FRAME by the
CPU trap mechanism (for SS), and by 'push CS' etc. instructions for
the others, and from Intel documentation, we know that:
"
If the source operand is a segment register (16 bits) and the operand
size is 64-bits, a zero-extended value is pushed on the stack; if the
operand size is 32-bits, either a zero-extended value is pushed on the
stack or the segment selector is written on the stack using a 16-bit
move. For the last case, all recent Core and Atom processors perform
a 16-bit move, leaving the upper portion of the stack location unmodified.
"
So it may happen, when using the push, that either they get zero-extended,
or garbage gets stored in the higher bits, and these need to be trimmed.
Actually, RegCloseKey() is here a dummy macro that just "returns"
success. Indeed, the internal implementation of RegOpenKey() doesn't
really allocate internal structures: it just returns a "pointer" to
already existing allocated data. Therefore nothing needs to be closed/freed
later on.
- Move a few lines around.
- Switch to RtlZeroMemory() from memset().
- Make while() more explicit.
For CORE-12802:
- Add/Fix FrLdrHeapAlloc() failure handling and related.
Especially, add/fix FrLdrHeapFree() calls.
- Add/Improve ERR() to some FrLdrHeapAlloc() failure cases.
Co-authored-by: Hermès BÉLUSCA - MAÏTO <hermes.belusca-maito@reactos.org>
objcopy bug is now solved and I can't remember how this used to work anyway.
Use strip instead.
If you need to debug freeldr
- set SEPARATE_DBG cmake var to TRUE
- use qemu GDB stub
- In GDB : add-symbol-file <build_dir>/symbols/freeldr_pe.exe
This splits MM_MAX_PAGE into the maximum addressable PFN (which is 2^20-1 on x86, 2^26-1 on x86PAE and 2^36-1 on x64) and the maximum mapped/accessible virtual memory MM_MAX_PAGE_LOADER (which is 4 GB on x86, since paging is disabled, but only 1 GB on x64, since only that much is identity-mapped).
This fixes the recursion when pci.sys attempts to get PCI bridge children
devices, which in fact are non-existing.
Note that the problem in pci.sys itself also deserves a separate fix.
CORE-16319 CORE-16216
We can already restart reading the whole file if seeking backward,
and there is currently no more use case of backward seek.
By doing so, we gain 1MB of memory when using PXE.
at runtime from the boot selection menu or from FREELDR.INI.
CORE-17350, CORE-9023
For a proper override of the options by new user options, specify the
/SIFOPTIONSOVERRIDE switch in addition. Otherwise, user options are
merged with those retrieved from TXTSETUP.SIF, with priority given to
the former ones.
- Update the documentation for the 'ReactOSSetup' OS type in the
FREELDR.INI file template.
- Use a different prompt in the custom boot options editor for the
'ReactOSSetup' OS type, with adequate explanation.
- Get rid of the ReactOS-specific TXTSETUP.SIF 'DbgOsLoadOptions' value,
and use instead the Windows-compatible 'SetupDebugOptions' value that
is added to the other load options when debugging is to be enabled.
