Simplify code, instead of adding 2 missing ObDereferenceObject().
(Note that ObInsertObject() always dereferences the object in case of failure.)
CORE-17904
The interval time is now calculated in 0.1ns precision and a running fraction on the 100ns interval is updated on each clock interrupt.
Also adjust minimum, maximum and default clock rate to what Windows uses.
Previously we enabled the timer interrupt, before the kernel was notified of our time increment, so when a clock interrupt happened, it would increment the tick count, but add 0 to the system time, resulting in an invalid state, in which timers would be inserted into the wrong timer table slot. Fixes CORE-16253
* Fix some broken code
* Add some ASSERTs
* Use ApicWriteIORedirectionEntry where appropriate
* Use KeQueryInterruptHandler/KeRegisterInterruptHandler to save/restore the old handler instead of saving the KIDTENTRY
* Move HalpProfileInterruptHandler to apictimer.c and implement it
* Use READ/WRITE_REGISTER macros
* Add some symbolic names
This fixes the recursion when pci.sys attempts to get PCI bridge children
devices, which in fact are non-existing.
Note that the problem in pci.sys itself also deserves a separate fix.
CORE-16319 CORE-16216
- Bridge devices don't have Subsystem ID and Subsystem Vendor ID
- Also they have only two BARs, don't parse data outside of bounds
Addendum to b232efe1. CORE-16319 CORE-16216
Lazy IRQL feature has issues with interrupt delivery on VirtualBox, so disable it for now.
For the feature description, see commit d28eae967a
Meanwhile, merge and clean up APIC headers a bit
- Rename UP -> PIC. The "up" folder in fact contains the code for
managing the Intel 8259 PIC chip
- Move amd64/processor.c -> apic/processor.c. The code is not tied to
amd64
- Remove platform from "halinit*" files. They already reside in the
corresponding folder
Extracted from the pci.ids database at https://pci-ids.ucw.cz/ from 2020-11-14 03:15:02 .
Maintained by Albert Pool, Martin Mares, and other volunteers from the PCI ID Project.
Co-authored-by: Hermès BÉLUSCA - MAÏTO <hermes.belusca-maito@reactos.org>
Our PnP manager handles OS boot in a synchronous manner thus we don't
need it anymore.
This effectively reverts f23e722, d974e84, 3aff101 and 4a9fcb6
CORE-5686
* Call HalInitializeBios both in phase 0 and 1
* In phase 0 allocate some physical memory, instead of using arbitrary hardcoded pages, that then end up as page tables and get filled with VESA tables
- Change INIT_FUNCTION and INIT_SECTION to CODE_SEG("INIT") and DATA_SEG("INIT") respectively
- Remove INIT_FUNCTION from function prototypes
- Remove alloc_text pragma calls as they are not needed anymore
PnP manager now correctly delays device actions if needed, so this can
be safely done as a one operation (IoReportDetectedDevice itself creates
a PDO for us if not passed)
CORE-10456
Introduce the PiPerformSyncDeviceAction routine for queuing
synchronous device actions
Change all kernel code to use PiPerformSyncDeviceAction and
PiQueueDeviceAction for device enumeration
CORE-10456
With the minimum Visual Studio version now being 2015, we no longer need to maintain two variants of the same code, and can stick to the commented and better understandable version.
- Add boot video color constants
- Refactor palette initialization
- Move some common stuff in right place
- Get rid of some magic constants and hardcoded values
- Get rid of TopDelta variable (calculated at compile time)
- Update SAL annotations
Addendum to 5f2ca473. CORE-16216 CORE-16219
* [HALXBOX] Formatting only.
* [HALXBOX] Don't use Xbox partitions if MBR signature found.
- Fixes BSOD 0x7B when booting from a HDD that have both MBR and BRFR signatures.
- It happens when you format Xbox (BRFR) disk as MBR.
After that "BRFR" signature is still located at sector 3.
- Also fix pre-existing leaks.
CORE-16216 CORE-16329
CORE-11921 CORE-13715
(Regression introduced by commit 2e1b82cf, r44841.)
In some cases the number of valid (!= 0xFFFF) entries in the IOPM can be
larger than the assumed size (32) of the entries cache. The maximum
possible number of entries is equal to IOPM_SIZE / sizeof(USHORT).
A way to reproduce the problem is as follows: start ReactOS in debugging
mode using '/DEBUG /DEBUGPORT=SCREEN' . Then manage to break into the
debugger exactly during the execution of Ke386CallBios() triggered by
display initialization (for example in my case, while a video driver was
being initialized via the HwInitialize() call done by videoport inside
IntVideoPortDispatchOpen() ).
When this happens, a "concurrent" execution between Ke386CallBios() and
the HAL function HalpStoreAndClearIopm() takes place. This is due to the
fact that when entering the debugger in SCREEN mode, the following
call-chain holds:
InbvResetDisplay() -> VidResetDisplay() -> HalResetDisplay() ->
HalpBiosDisplayReset() -> HalpSetupRealModeIoPermissionsAndTask() ->
HalpStoreAndClearIopm().
However, the code of Ke386CallBios() has reset the IOPM contents with
all zeroes instead of 0xFFFF, and this triggers the caching of all the
entries of the IOPM by HalpStoreAndClearIopm(), whose number is greater
than the wrongly assumed number of '32'.
As Thomas explained to me, "Windows supports [the maximum number of IOPM entries],
it just makes a full copy of the table instead of this indexed partial copy."
And I agree that this overengineered so-called "optimization" committed
in 2e1b82cf contributed in introducing an unnecessary bug and making the
code less clear. Also it makes the IOPM cache larger than the necessary
size by twice as much. Finally, Ke386CallBios() also caches IOPM entries
before doing a 16-bit call, and obviously uses the more straightforward
way of doing a direct copy of the IOPM table (using RtlCopyMemory()).
I wonder what kind of "optimization" this tried to achieve, knowing that
we are not doing like thousands of 32->16bit BIOS interrupt calls per second
in ReactOS...
Extracted from the pci.ids database at https://pci-ids.ucw.cz/ from 2019-09-28 03:15:02 .
Maintained by Albert Pool, Martin Mares, Michal Vaner, and other volunteers from the PCI ID Project.
- Don't match device id outside current vendor id list.
- Don't match subsystem id outside current device id list.
- Refactor some magic constants.
Addendum to 894635b.
- Match subclass properly, don't match third subclass.
- Don't match subclass from next class, add ClassEnd boundary.
- Use class name if subclass name not available.
- Gracefully return "Unknown" if no class name found.
This fixes the bug when VidInitialize asks for different translated addresses
and VgaIsPresent always returns FALSE either because the machine does not have
VGA controller at all (e.g. 86Duino Zero), or it does have video hardware
that is not compatible with VGA standard (e.g. Original Xbox).
The problem investigated by Stanislav Motylkov. Suggested fix by Thomas Faber.
CORE-14625 CORE-16216 CORE-16222
Co-authored-by: Thomas Faber <thomas.faber@reactos.org>
- Use a separate function for detecting blacklisted PCI slots
- Blacklist PCI-to-PCI bridge to avoid stack overflow on real hardware Microsoft Xbox 1.3
CORE-16319 CORE-16216
- Create xbox.cmake based on legacy.cmake and pic.cmake
- Revive Xbox HAL files and add them to the build
- Fix boot with Xbox HAL, add missing parts from halinit_up.c
- Code style and debug logging improvements in pcibus.c
- Allow to choose Xbox HAL in usetup
CORE-16216
There is no need to compile our DLLs as shared libraries since we are
managing symbols exports and imports through spec files.
On my system, this reduces the configure-time by a factor of two.
* Add an NDK header to define INIT_FUNCTION/INIT_SECTION globally
* Use _declspec(allocate(x)) and _declspec(code_seg(x)) on MSVC versions that support it
* Use INIT_FUNCTION on functions only and INIT_SECTION on data only (required by MSVC)
* Place INIT_FUNCTION before the return type (required by MSVC)
* Make sure declarations and implementations share the same modifiers (required by MSVC)
* Add a global linker option to suppress warnings about defined but unused INIT section
* Merge INIT section into .text in freeldr
Extracted from the pci.ids database at https://pci-ids.ucw.cz/ from 2018-11-21 03:15:02 .
Maintained by Albert Pool, Martin Mares, Michal Vaner, and other volunteers from the PCI ID Project.
"warning: cast between incompatible calling conventions 'cdecl' and 'fastcall'; calls through this pointer may abort at runtime [-Wcast-calling-convention]"
CORE-14306
Because we can encounter pending interrupts repeatedly,
HalpEndSoftwareInterrupt and HalEndSystemInterrupt already clean up the stack
space for their arguments (done for CORE-11123/CORE-14076).
However these functions are called from C functions such as KiInterruptDispatch
and HalpDispatchInterrupt2[ndEntry]. These callers also use up stack space,
and it is unknown how much.
To fix this, we simply reset the stack pointer to the location of the trap
frame, which is where it points during a first-level dispatch. This cleans
up the stack usage of any callers higher up, and is okay because a return
will happen through the trap frame anyway.
Dedicated to Pierre.
