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https://github.com/reactos/reactos.git
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[HAL] Implement amd64 BIOS call support
The code uses FAST486 to emulate the BIOS code.
This commit is contained in:
Timo Kreuzer
parent
f18958ffa2
commit
9ab3246d43
5 changed files with 254 additions and 54 deletions
14
hal/hal.spec
14
hal/hal.spec
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@ -6,10 +6,10 @@
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@ fastcall -arch=i386 ExTryToAcquireFastMutex(ptr) ntoskrnl.ExiTryToAcquireFastMutex
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@ stdcall HalAcquireDisplayOwnership(ptr)
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@ stdcall HalAdjustResourceList(ptr)
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@ stdcall HalAllProcessorsStarted()
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@ stdcall HalAllocateAdapterChannel(ptr ptr long ptr)
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@ stdcall HalAllocateCommonBuffer(ptr long ptr long)
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@ stdcall HalAllocateCrashDumpRegisters(ptr ptr)
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@ stdcall HalAllProcessorsStarted()
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@ stdcall HalAssignSlotResources(ptr ptr ptr ptr long long long ptr)
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@ stdcall -arch=i386,arm HalBeginSystemInterrupt(long long ptr)
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@ stdcall HalCalibratePerformanceCounter(ptr long long)
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@ -29,8 +29,8 @@
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@ stdcall HalGetInterruptVector(long long long long ptr ptr)
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;@ stdcall -arch=x86_64 HalHandleMcheck()
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@ stdcall -arch=i386,x86_64 HalHandleNMI(ptr)
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@ stdcall HalInitializeProcessor(long ptr)
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@ stdcall HalInitSystem(long ptr)
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@ stdcall HalInitializeProcessor(long ptr)
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;@ stdcall -arch=x86_64 HalIsHyperThreadingEnabled()
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@ stdcall HalMakeBeep(long)
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@ stdcall HalProcessorIdle()
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@ -56,7 +56,6 @@
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@ fastcall -arch=arm HalSweepIcache()
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@ fastcall -arch=arm HalSweepDcache()
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@ fastcall HalSystemVectorDispatchEntry(long long long)
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;@ stdcall -arch=x86_64 HalSystemVectorDispatchEntry()
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@ stdcall HalTranslateBusAddress(long long long long ptr ptr)
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@ stdcall -arch=i386,x86_64 IoAssignDriveLetters(ptr str ptr ptr) HalpAssignDriveLetters
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@ stdcall IoFlushAdapterBuffers(ptr ptr ptr ptr long long)
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@ -102,7 +101,8 @@
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@ stdcall -arch=i386,arm WRITE_PORT_UCHAR(ptr long)
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@ stdcall -arch=i386,arm WRITE_PORT_ULONG(ptr long)
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@ stdcall -arch=i386,arm WRITE_PORT_USHORT(ptr long)
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@ stdcall -arch=x86_64 HalInitializeBios(long ptr)
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;@ stdcall -arch=x86_64 x86BiosExecuteInterrupt()
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;@ stdcall -arch=x86_64 x86BiosInitializeBiosEx()
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;@ stdcall -arch=x86_64 x86BiosTranslateAddress()
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@ stdcall -arch=x86_64 x86BiosAllocateBuffer()
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@ stdcall -arch=x86_64 x86BiosCall()
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@ stdcall -arch=x86_64 x86BiosFreeBuffer()
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@ stdcall -arch=x86_64 x86BiosReadMemory()
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@ stdcall -arch=x86_64 x86BiosWriteMemory()
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@ -5,7 +5,8 @@ add_definitions(
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include_directories(
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include
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${REACTOS_SOURCE_DIR}/ntoskrnl/include)
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${REACTOS_SOURCE_DIR}/ntoskrnl/include
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${REACTOS_SOURCE_DIR}/sdk/include/reactos/libs/fast486)
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function(add_hal _halname)
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cmake_parse_arguments(_haldata "" "" "SOURCES;COMPONENTS" ${ARGN})
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@ -76,5 +77,6 @@ elseif(ARCH STREQUAL "amd64")
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amd64/processor.c)
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add_hal(hal SOURCES ${HAL_SOURCE} COMPONENTS generic acpi apic)
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target_link_libraries(hal fast486)
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endif()
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@ -12,7 +12,7 @@
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//#define NDEBUG
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#include <debug.h>
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//#include "x86emu.h"
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#include <fast486.h>
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/* This page serves as fallback for pages used by Mm */
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#define DEFAULT_PAGE 0x21
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@ -43,7 +43,9 @@ DbgDumpPage(PUCHAR MemBuffer, USHORT Segment)
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VOID
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NTAPI
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HalInitializeBios(ULONG Unknown, PLOADER_PARAMETER_BLOCK LoaderBlock)
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HalInitializeBios(
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_In_ ULONG Unknown,
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_In_ PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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PPFN_NUMBER PfnArray;
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PFN_NUMBER Pfn, Last;
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@ -112,12 +114,12 @@ HalInitializeBios(ULONG Unknown, PLOADER_PARAMETER_BLOCK LoaderBlock)
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NTSTATUS
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NTAPI
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x86BiosAllocateBuffer(
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ULONG *Size,
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USHORT *Segment,
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USHORT *Offset)
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_In_ ULONG *Size,
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_In_ USHORT *Segment,
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_In_ USHORT *Offset)
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{
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/* Check if the system is initialized and the buffer is large enough */
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if (!x86BiosIsInitialized || *Size > PAGE_SIZE)
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if (!x86BiosIsInitialized || (*Size > PAGE_SIZE))
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{
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/* Something was wrong, fail! */
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return STATUS_INSUFFICIENT_RESOURCES;
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@ -141,11 +143,11 @@ x86BiosAllocateBuffer(
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NTSTATUS
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NTAPI
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x86BiosFreeBuffer(
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USHORT Segment,
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USHORT Offset)
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_In_ USHORT Segment,
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_In_ USHORT Offset)
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{
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/* Check if the system is initialized and if the address matches */
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if (!x86BiosIsInitialized || Segment != 0x2000 || Offset != 0)
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if (!x86BiosIsInitialized || (Segment != 0x2000) || (Offset != 0))
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{
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/* Something was wrong, fail */
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return STATUS_INVALID_PARAMETER;
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@ -165,10 +167,10 @@ x86BiosFreeBuffer(
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NTSTATUS
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NTAPI
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x86BiosReadMemory(
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USHORT Segment,
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USHORT Offset,
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PVOID Buffer,
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ULONG Size)
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_In_ USHORT Segment,
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_In_ USHORT Offset,
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_Out_writes_bytes_(Size) PVOID Buffer,
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_In_ ULONG Size)
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{
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ULONG_PTR Address;
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@ -176,7 +178,7 @@ x86BiosReadMemory(
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Address = (Segment << 4) + Offset;
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/* Check if it's valid */
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if (!x86BiosIsInitialized || Address + Size > 0x100000)
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if (!x86BiosIsInitialized || ((Address + Size) > 0x100000))
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{
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/* Invalid */
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return STATUS_INVALID_PARAMETER;
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@ -192,10 +194,10 @@ x86BiosReadMemory(
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NTSTATUS
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NTAPI
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x86BiosWriteMemory(
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USHORT Segment,
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USHORT Offset,
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PVOID Buffer,
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ULONG Size)
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_In_ USHORT Segment,
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_In_ USHORT Offset,
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_In_reads_bytes_(Size) PVOID Buffer,
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_In_ ULONG Size)
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{
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ULONG_PTR Address;
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@ -203,7 +205,7 @@ x86BiosWriteMemory(
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Address = (Segment << 4) + Offset;
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/* Check if it's valid */
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if (!x86BiosIsInitialized || Address + Size > 0x100000)
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if (!x86BiosIsInitialized || ((Address + Size) > 0x100000))
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{
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/* Invalid */
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return STATUS_INVALID_PARAMETER;
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@ -216,53 +218,237 @@ x86BiosWriteMemory(
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return STATUS_SUCCESS;
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}
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#if 0
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static
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VOID
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FASTCALL
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x86MemRead(
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PFAST486_STATE State,
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ULONG Address,
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PVOID Buffer,
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ULONG Size)
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{
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/* Validate the address range */
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if (((ULONG64)Address + Size) < 0x100000)
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{
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RtlCopyMemory(Buffer, x86BiosMemoryMapping + Address, Size);
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}
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else
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{
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RtlFillMemory(Buffer, Size, 0xCC);
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DPRINT1("x86MemRead: invalid read at 0x%lx (size 0x%lx)", Address, Size);
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}
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}
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static
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VOID
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FASTCALL
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x86MemWrite(
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PFAST486_STATE State,
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ULONG Address,
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PVOID Buffer,
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ULONG Size)
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{
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/* Validate the address range */
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if (((ULONG64)Address + Size) < 0x100000)
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{
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RtlCopyMemory(x86BiosMemoryMapping + Address, Buffer, Size);
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}
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else
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{
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DPRINT1("x86MemWrite: invalid write at 0x%lx (size 0x%lx)", Address, Size);
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}
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}
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static
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BOOLEAN
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ValidatePort(
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USHORT Port,
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UCHAR Size,
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BOOLEAN IsWrite)
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{
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switch (Port)
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{
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// VGA: https://wiki.osdev.org/VGA_Hardware#Port_0x3C0
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case 0x3C0: return (Size == 1) && IsWrite;
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case 0x3C1: return (Size == 1) && !IsWrite;
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case 0x3C2: return (Size == 1) && IsWrite;
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case 0x3C4: return IsWrite;
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case 0x3C5: return (Size <= 2);
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case 0x3C7: return (Size == 1) && IsWrite;
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case 0x3CC: return (Size == 1) && !IsWrite;
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case 0x3CE: return IsWrite;
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case 0x3CF: return (Size <= 2);
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case 0x3D4: return IsWrite;
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case 0x3D5: return (Size <= 2);
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case 0x3C6: return (Size == 1);
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case 0x3C8: return (Size == 1) && IsWrite;
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case 0x3C9: return (Size == 1);
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case 0x3DA: return (Size == 1) && !IsWrite;
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// CHECKME!
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case 0x1CE: return (Size == 1) && IsWrite;
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case 0x1CF: return (Size == 1);
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case 0x3B6: return (Size <= 2);
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}
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return FALSE;
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}
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static
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VOID
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FASTCALL
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x86IoRead(
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PFAST486_STATE State,
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USHORT Port,
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PVOID Buffer,
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ULONG DataCount,
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UCHAR DataSize)
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{
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/* Validate the port */
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if (!ValidatePort(Port, DataSize, FALSE))
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{
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DPRINT1("Invalid IO port read access (port: 0x%x, count: 0x%x)\n", Port, DataSize);
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}
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switch (DataSize)
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{
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case 1: READ_PORT_BUFFER_UCHAR((PUCHAR)(ULONG_PTR)Port, Buffer, DataCount); return;
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case 2: READ_PORT_BUFFER_USHORT((PUSHORT)(ULONG_PTR)Port, Buffer, DataCount); return;
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case 4: READ_PORT_BUFFER_ULONG((PULONG)(ULONG_PTR)Port, Buffer, DataCount); return;
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}
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}
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static
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VOID
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FASTCALL
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x86IoWrite(
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PFAST486_STATE State,
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USHORT Port,
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PVOID Buffer,
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ULONG DataCount,
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UCHAR DataSize)
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{
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/* Validate the port */
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if (!ValidatePort(Port, DataSize, TRUE))
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{
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DPRINT1("Invalid IO port write access (port: 0x%x, count: 0x%x)\n", Port, DataSize);
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}
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switch (DataSize)
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{
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case 1: WRITE_PORT_BUFFER_UCHAR((PUCHAR)(ULONG_PTR)Port, Buffer, DataCount); return;
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case 2: WRITE_PORT_BUFFER_USHORT((PUSHORT)(ULONG_PTR)Port, Buffer, DataCount); return;
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case 4: WRITE_PORT_BUFFER_ULONG((PULONG)(ULONG_PTR)Port, Buffer, DataCount); return;
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}
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}
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static
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VOID
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FASTCALL
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x86BOP(
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PFAST486_STATE State,
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UCHAR BopCode)
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{
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ASSERT(FALSE);
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}
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static
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UCHAR
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FASTCALL
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x86IntAck (
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PFAST486_STATE State)
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{
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ASSERT(FALSE);
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return 0;
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}
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BOOLEAN
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NTAPI
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x86BiosCall(
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ULONG InterruptNumber,
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X86_BIOS_REGISTERS *Registers)
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_In_ ULONG InterruptNumber,
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_Inout_ PX86_BIOS_REGISTERS Registers)
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{
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X86_VM_STATE VmState;
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FAST486_STATE EmulatorContext;
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struct
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{
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USHORT Ip;
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USHORT SegCs;
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} *InterrupTable;
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} *Ivt;
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ULONG FlatIp;
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PUCHAR InstructionPointer;
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/* Zero the VmState */
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RtlZeroMemory(&VmState, sizeof(VmState));
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/* Initialize the emulator context */
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Fast486Initialize(&EmulatorContext,
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x86MemRead,
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x86MemWrite,
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x86IoRead,
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x86IoWrite,
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x86BOP,
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x86IntAck,
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NULL, // FpuCallback,
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NULL); // Tlb
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//RegisterBop(BOP_UNSIMULATE, CpuUnsimulateBop);
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/* Copy the registers */
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VmState.BiosRegisters = *Registers;
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/* Set the physical memory buffer */
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VmState.MemBuffer = x86BiosMemoryMapping;
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EmulatorContext.GeneralRegs[FAST486_REG_EAX].Long = Registers->Eax;
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EmulatorContext.GeneralRegs[FAST486_REG_EBX].Long = Registers->Ebx;
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EmulatorContext.GeneralRegs[FAST486_REG_ECX].Long = Registers->Ecx;
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EmulatorContext.GeneralRegs[FAST486_REG_EDX].Long = Registers->Edx;
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EmulatorContext.GeneralRegs[FAST486_REG_ESI].Long = Registers->Esi;
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EmulatorContext.GeneralRegs[FAST486_REG_EDI].Long = Registers->Edi;
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EmulatorContext.SegmentRegs[FAST486_REG_DS].Selector = Registers->SegDs;
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EmulatorContext.SegmentRegs[FAST486_REG_ES].Selector = Registers->SegEs;
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/* Set Eflags */
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VmState.Registers.Eflags.Long = 0; // FIXME
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EmulatorContext.Flags.Long = 0;
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EmulatorContext.Flags.AlwaysSet = 1;
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EmulatorContext.Flags.If = 1;
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/* Setup stack */
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VmState.Registers.SegSs = 0; // FIXME
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VmState.Registers.Sp = 0x2000 - 2; // FIXME
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/* Set the stack pointer */
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Fast486SetStack(&EmulatorContext, 0, 0x2000 - 2); // FIXME
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/* Initialize IP from the interrupt vector table */
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InterrupTable = (PVOID)x86BiosMemoryMapping;
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VmState.Registers.SegCs = InterrupTable[InterruptNumber].SegCs;
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VmState.Registers.Eip = InterrupTable[InterruptNumber].Ip;
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/* Make the function return on IRET */
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VmState.Flags.ReturnOnIret = 1;
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/* Set CS:EIP from the IVT entry */
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Ivt = (PVOID)x86BiosMemoryMapping;
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Fast486ExecuteAt(&EmulatorContext,
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Ivt[InterruptNumber].SegCs,
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Ivt[InterruptNumber].Ip);
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/* Call the x86 emulator */
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x86Emulator(&VmState);
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while (TRUE)
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{
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/* Step one instruction */
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Fast486StepInto(&EmulatorContext);
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/* Copy registers back to caller */
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*Registers = VmState.BiosRegisters;
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/* Check for iret */
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FlatIp = (EmulatorContext.SegmentRegs[FAST486_REG_CS].Selector << 4) +
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EmulatorContext.InstPtr.Long;
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if (FlatIp >= 0x100000)
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{
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DPRINT1("x86BiosCall: invalid IP (0x%lx) during BIOS execution", FlatIp);
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return FALSE;
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}
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/* Read the next instruction and check if it's IRET */
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InstructionPointer = x86BiosMemoryMapping + FlatIp;
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if (*InstructionPointer == 0xCF)
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{
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/* We are done! */
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break;
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}
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}
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/* Copy the registers back */
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Registers->Eax = EmulatorContext.GeneralRegs[FAST486_REG_EAX].Long;
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Registers->Ebx = EmulatorContext.GeneralRegs[FAST486_REG_EBX].Long;
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Registers->Ecx = EmulatorContext.GeneralRegs[FAST486_REG_ECX].Long;
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Registers->Edx = EmulatorContext.GeneralRegs[FAST486_REG_EDX].Long;
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Registers->Esi = EmulatorContext.GeneralRegs[FAST486_REG_ESI].Long;
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Registers->Edi = EmulatorContext.GeneralRegs[FAST486_REG_EDI].Long;
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Registers->SegDs = EmulatorContext.SegmentRegs[FAST486_REG_DS].Selector;
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Registers->SegEs = EmulatorContext.SegmentRegs[FAST486_REG_ES].Selector;
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return TRUE;
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}
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#endif
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BOOLEAN
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NTAPI
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|
|
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|
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@ -156,6 +156,10 @@ HalInitSystem(IN ULONG BootPhase,
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/* Do some HAL-specific initialization */
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HalpInitPhase1();
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#ifdef _M_AMD64
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HalInitializeBios(0, LoaderBlock);
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#endif
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}
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/* All done, return */
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|
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@ -871,6 +871,14 @@ HalpInitProcessor(
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);
|
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#ifdef _M_AMD64
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VOID
|
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NTAPI
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HalInitializeBios(
|
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_In_ ULONG Unknown,
|
||||
_In_ PLOADER_PARAMETER_BLOCK LoaderBlock
|
||||
);
|
||||
|
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#define KfLowerIrql KeLowerIrql
|
||||
#define KiEnterInterruptTrap(TrapFrame) /* We do all neccessary in asm code */
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#define KiEoiHelper(TrapFrame) return /* Just return to the caller */
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Reference in a new issue