- Make NtUserSetCursor hide Cursor on hCursor = NULL
- Don't set the cursor pos if the cursor is hidden in IntMouseInput
- remove 2 useless ASSERTs
- Dereference old cursor- Make the screensaver lib hide the cursor directly after creating it (the window never recieves a WM_SETCURSOR)
partly fixes bug 2965
See issue #2965 for more details.
svn path=/trunk/; revision=32676
- This removes (hides?) the so-called "ResourceNeverExclusive" problem at the end of the 1st stage setup or during file copy operation. Also it makes file copying process (not only in the 1st stage) more stable.
- Cacheseg mapping region size enlarged to 256Mb.
See issue #2872 for more details.
svn path=/trunk/; revision=32675
- Start coding HalInitSystem.
- Implement HalRequestSoftwareInterrupt for the PL190 VIC. The interrupt fires! (This interrupt is responsible for forcing DPC delivery, which should also force thread scheduling, which should force the switch to the phase 1 thread)
svn path=/trunk/; revision=32674
They were confusingly coded to accept any flavor of PFN_TYPE, which resulted in at least one bug.
Constrained the calls to the MmRequest/ReleasePageMemoryConsumer and MmTrimUserMemory.
svn path=/trunk/; revision=32673
- The rest of Phase 0 initialization continues smoothly, we now reach the while(TRUE) loop at the end of KiSystemStartup!
- Phase 0 bring-up is complete: The phase 1 thread should now start (once thread scheduling works).
- Next steps: IRQLs, HAL Initialization (Timers and IRQs) to get the interval clock timer running for quantum end/scheduling/time accounting.
- After that: context switching code to be able to switch to the Phase 1 thread.
- Then: Phase 1 bring-up!
svn path=/trunk/; revision=32671
- Removed a bunch more i386-only exports from the ARM kernel.
- Implemented all the READ/WRITE_REGISTER* routines for ARM/PPC.
- Implement half of KiSoftwareInterruptException, which calls KiSoftwareInterruptHandler, which calls KiSystemService. We now reach the first kernel-mode system call! (ZwClose from PspInitPhase0).
- Reformat fastinterlck.c and change the way it's included per-architecture.
svn path=/trunk/; revision=32666
- Current status: we now make it all the way to the first system call at the end of Phase 0!
- We now make the IRQL routines modify the IRQL saved in the KPCR, to make some assertions work.
- Build mem.c and memgen.c from RTL in order to get non-optimized but portable Rtl*Memory routines and Rtl*Swap routines.
- Take the PPC non-optimized but portable Ex*Interlocked* routines and make them available for ARM as well. Play with the code a bit to get other routines in there too.
- Major TODO: Cleanup these routines, re-format them, make them compatible for all architectures, and later on, provided optimized ARM versions.
- Remove _all* _aull* MSVC-i386 helper exports from the kernel, as well as Exfi386* routines -- they're only for x86 kernels.
svn path=/trunk/; revision=32664
- Implement proper trap prolog/epilog code -- currently used and tested in the data abort handler. Currently hacked away some KTRAP_FRAME stuff on ARM.
- The data abort handler has a very rudimentary check to detect page faults and will call MmAccessFaults, this means we now support paged pool!
- We now succesfully go past MmInitSystem and go all the way until ObInitSystem (still in Phase 0).
svn path=/trunk/; revision=32659
- Rename and add two application compatibility flags to W32THREADINFO structure (one for ancient compat flags, and one for a bit more modern flags).
- Implement GetAppCompatFlags2() too.
svn path=/trunk/; revision=32657
