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reactos/ntoskrnl/mm/ARM3/miarm.h

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- Begin the implementation of the ARM Pool Manager, a replacement for the ReactOS nonpaged pool. - Define the nonpaged system address space as done on Windows (see init.c for a brief introduction and source reading materials on this). - Size up the ARM pool as done on Windows (again, see init.c for documentation on this). - Create the PDEs for the expansion pool and the initial pool. - Allocate the pages for the initial pool, and map them. - Unlike ReactOS, ARM³ does the right thing and uses physically continuous pages. - Define two new static MEMORY_AREAs for the expansion and initial ARM pool. - No actual pool code/implementation is available yet, we are just slicing up the address space for now (mhmm... cake!)*. * There is no cake. svn path=/trunk/; revision=41525
2009-06-22 06:16:57 +00:00
/*
* PROJECT: ReactOS Kernel
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: ntoskrnl/mm/ARM3/miarm.h
* PURPOSE: ARM Memory Manager Header
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING ((255*1024*1024) >> PAGE_SHIFT)
- Initialize count of System PTEs: - Use 7000 for systems with 19MB of RAM or less, 11000 for systems between 19 and 32MB of RAM, and 22000 for systems with more than that. - Windows will go up to 50000 on server machines, but this is likely not needed now (22000 system PTEs is roughly 100 MB). - This now affects the calculation of MmNonPagedSystemStart, which is now correct and reflects the nonpaged address space of the system. - System PTEs are not yet initialized (but their page tables are mapped by the same code which maps nonpaged pool expansion VA page tables). svn path=/trunk/; revision=41529
2009-06-22 09:34:24 +00:00
#define MI_MIN_PAGES_FOR_SYSPTE_TUNING ((19*1024*1024) >> PAGE_SHIFT)
#define MI_MIN_PAGES_FOR_SYSPTE_BOOST ((32*1024*1024) >> PAGE_SHIFT)
- Begin the implementation of the ARM Pool Manager, a replacement for the ReactOS nonpaged pool. - Define the nonpaged system address space as done on Windows (see init.c for a brief introduction and source reading materials on this). - Size up the ARM pool as done on Windows (again, see init.c for documentation on this). - Create the PDEs for the expansion pool and the initial pool. - Allocate the pages for the initial pool, and map them. - Unlike ReactOS, ARM³ does the right thing and uses physically continuous pages. - Define two new static MEMORY_AREAs for the expansion and initial ARM pool. - No actual pool code/implementation is available yet, we are just slicing up the address space for now (mhmm... cake!)*. * There is no cake. svn path=/trunk/; revision=41525
2009-06-22 06:16:57 +00:00
#define MI_MAX_INIT_NONPAGED_POOL_SIZE (128 * 1024 * 1024)
#define MI_MAX_NONPAGED_POOL_SIZE (128 * 1024 * 1024)
- Initialize the ARM pool (MiInitializeArmPool): - Do some additional accounting to keep track of initial nonpaged pool range and size. - Create and initialize the free page lists, and free page entries. - Validate that the initial nonpaged pool address space was properly mapped. - Validate that the expansion nonpaged pool address space is unmapped, and prepare to map it. svn path=/trunk/; revision=41527
2009-06-22 08:22:41 +00:00
#define MI_MAX_FREE_PAGE_LISTS 4
- Begin the implementation of the ARM Pool Manager, a replacement for the ReactOS nonpaged pool. - Define the nonpaged system address space as done on Windows (see init.c for a brief introduction and source reading materials on this). - Size up the ARM pool as done on Windows (again, see init.c for documentation on this). - Create the PDEs for the expansion pool and the initial pool. - Allocate the pages for the initial pool, and map them. - Unlike ReactOS, ARM³ does the right thing and uses physically continuous pages. - Define two new static MEMORY_AREAs for the expansion and initial ARM pool. - No actual pool code/implementation is available yet, we are just slicing up the address space for now (mhmm... cake!)*. * There is no cake. svn path=/trunk/; revision=41525
2009-06-22 06:16:57 +00:00
- Initialize the value of MmBootImageSize in ARM3 now. - Also fix its value such that it's PDE aligned -- this makes sure that we don't step on any of the boot loader's PDE mappings and can blow everything away later. - Initialize the MmSystem/User/Probe Addresses in ARM3 as well (no functional change). - Print out a lot more of the VA ranges in ARM3's Phase 2 initialization. Most of the VA space is now dumped out. - Write out the code to initialize session space VA ranges - Image space, view space, working set space and pool space values are all calculated properly. - NT default sizes are used, without support for registry overrides (yet). - Also system view space is initialized and sized. - Code is heavily commented and explained for inquisitive minds. - Define the paged pool start address, minimum/default size, and add some extra pool header asserts/definitions. - Define MmPagedPoolInfo to keep track of all paged pool related information (start/end PTEs, VA ranges, allocation/free bitmaps, etc). - Fixed a lot of comments and added some new ones to provide extra clarity. - Implement MiBuildPagedPool. It has two jobs: - Build and create the shadow system page directory, which double-maps the System process' PDE. - More explenations are in the comments. - Define the paged pool region and size, and initialize MmPagedPoolInfo accordingly. - Create and setup the paged pool allocation and free bitmaps (again explained in the comments). - There shouldn't be any real functional change yet due to this commit. - We need to create memory areas for session space and system view space otherwise the VA regions could get used by ReactOS instead. svn path=/trunk/; revision=42148
2009-07-22 22:46:29 +00:00
#define MI_MIN_INIT_PAGED_POOLSIZE (32 * 1024 * 1024)
#define MI_SESSION_VIEW_SIZE (20 * 1024 * 1024)
#define MI_SESSION_POOL_SIZE (16 * 1024 * 1024)
#define MI_SESSION_IMAGE_SIZE (8 * 1024 * 1024)
#define MI_SESSION_WORKING_SET_SIZE (4 * 1024 * 1024)
#define MI_SESSION_SIZE (MI_SESSION_VIEW_SIZE + \
MI_SESSION_POOL_SIZE + \
MI_SESSION_IMAGE_SIZE + \
MI_SESSION_WORKING_SET_SIZE)
#define MI_SYSTEM_VIEW_SIZE (16 * 1024 * 1024)
- Fix some pool calculations. - Check for some untested pool calculations. - Handle paging-in the page tables when needed. - Setup paging colors based on L2 cache size/associativity. - Setup system PTE size earlier. svn path=/trunk/; revision=44903
2010-01-03 05:10:09 +00:00
#define MI_SYSTEM_CACHE_WS_START (PVOID)0xC0C00000
- Initialize the value of MmBootImageSize in ARM3 now. - Also fix its value such that it's PDE aligned -- this makes sure that we don't step on any of the boot loader's PDE mappings and can blow everything away later. - Initialize the MmSystem/User/Probe Addresses in ARM3 as well (no functional change). - Print out a lot more of the VA ranges in ARM3's Phase 2 initialization. Most of the VA space is now dumped out. - Write out the code to initialize session space VA ranges - Image space, view space, working set space and pool space values are all calculated properly. - NT default sizes are used, without support for registry overrides (yet). - Also system view space is initialized and sized. - Code is heavily commented and explained for inquisitive minds. - Define the paged pool start address, minimum/default size, and add some extra pool header asserts/definitions. - Define MmPagedPoolInfo to keep track of all paged pool related information (start/end PTEs, VA ranges, allocation/free bitmaps, etc). - Fixed a lot of comments and added some new ones to provide extra clarity. - Implement MiBuildPagedPool. It has two jobs: - Build and create the shadow system page directory, which double-maps the System process' PDE. - More explenations are in the comments. - Define the paged pool region and size, and initialize MmPagedPoolInfo accordingly. - Create and setup the paged pool allocation and free bitmaps (again explained in the comments). - There shouldn't be any real functional change yet due to this commit. - We need to create memory areas for session space and system view space otherwise the VA regions could get used by ReactOS instead. svn path=/trunk/; revision=42148
2009-07-22 22:46:29 +00:00
#define MI_PAGED_POOL_START (PVOID)0xE1000000
#define MI_NONPAGED_POOL_END (PVOID)0xFFBE0000
- Implement support for reading and writing physical memory for KD. The implementation uses a reserved mapping page to map the target physical address to. On x86 this page is located at virtual address 0xFFBFF000, and the PTE for this page is the last PTE of the nonpaged pool's PDE. Other architectures may need to reserve the PTE elsewhere. - The physical memory support relies on several Mm variables and structures to be properly set up. Add a new flag, MiDbgReadyForPhysical, and set it when the debugger support can handle physical memory requests. - Protect this page with a Memory Area to make the old Mm keep its dirty hands off it. - Does not support I/O space or cache flags yet. - Add generic KeInvalidateTlbEntry to invalidate a single TLB entry for a given address instead of flushing the whole TLB. Used by the debugger physical memory support as invalidating the whole TLB for every map and unmap of its debug PTE would incur significant overhead for large copies. Replace direct usage of __invlpg() with this in x86 code too. - Fix incorrect cache flag check and set in KdpRead/WritePhysicalmemory for write combined requests. The debugger's Uncached flag was checked instead of the Write Combined flag, and the debuggers Write Combine number (0x3) was set instead of Mm's flag (0x20). - Fix implementation of MmIsAddressValid (at least for x86; other architectures will need more checks). Just check the Address' PDE and PTE valid bits instead of using Memory Areas. - Add missing ASSERTs to ensure the Memory Areas for paged pool, the PCR page, and the Shared User Data page are created. - Add missing Memory Area for the 2 pages HAL currently uses for its own mappings on x86 -- previously, those pages could have been allocated by other parts of the OS, which would have resulted in serious corruptions. svn path=/trunk/; revision=43960
2009-11-04 22:40:18 +00:00
#define MI_DEBUG_MAPPING (PVOID)0xFFBFF000
- Initialize the value of MmBootImageSize in ARM3 now. - Also fix its value such that it's PDE aligned -- this makes sure that we don't step on any of the boot loader's PDE mappings and can blow everything away later. - Initialize the MmSystem/User/Probe Addresses in ARM3 as well (no functional change). - Print out a lot more of the VA ranges in ARM3's Phase 2 initialization. Most of the VA space is now dumped out. - Write out the code to initialize session space VA ranges - Image space, view space, working set space and pool space values are all calculated properly. - NT default sizes are used, without support for registry overrides (yet). - Also system view space is initialized and sized. - Code is heavily commented and explained for inquisitive minds. - Define the paged pool start address, minimum/default size, and add some extra pool header asserts/definitions. - Define MmPagedPoolInfo to keep track of all paged pool related information (start/end PTEs, VA ranges, allocation/free bitmaps, etc). - Fixed a lot of comments and added some new ones to provide extra clarity. - Implement MiBuildPagedPool. It has two jobs: - Build and create the shadow system page directory, which double-maps the System process' PDE. - More explenations are in the comments. - Define the paged pool region and size, and initialize MmPagedPoolInfo accordingly. - Create and setup the paged pool allocation and free bitmaps (again explained in the comments). - There shouldn't be any real functional change yet due to this commit. - We need to create memory areas for session space and system view space otherwise the VA regions could get used by ReactOS instead. svn path=/trunk/; revision=42148
2009-07-22 22:46:29 +00:00
[NTOS]: Factor out SecondaryColor computations into MiComputeColorInformation. [NTOS]: Fix SecondaryColor computations. If the KPCR has no deta, use the default colors of 8, not just 1. Also handle cases where there is more L2 cache than we'd like -- set the secondary colors to a maximum of 1024 in that case. Finally, if the colors are not a power of two, or there are not enough (due to a registry setting), use the default of 8. svn path=/trunk/; revision=45557
2010-02-10 18:10:04 +00:00
#define MI_MIN_SECONDARY_COLORS 8
#define MI_SECONDARY_COLORS 64
#define MI_MAX_SECONDARY_COLORS 1024
- Multiple PEB/TEB creation fixes: - Set up PEB and TEB under SEH to handle possible paging errors (which are legitimate). - Also touch the image under SEH to handle image paging errors (also legitimate). - Should avoid kernel panics in cases where the executable is damaged, invalid, or impossible to page in. - Initialize more PEB fields. - Add new INITIAL_PEB structure to support fork() in the future. Also fixes the fact we don't create a PEB for the system process anymore. - Create PEB while attached to the process. - Handle UP-only images, and set correct affinity mask in the PEB. - Set session ID instead of session structure (currently zero). - Set correct TIB version in the TEB. Due to a historical oddity, the NT TIB identifies itself as '0x1e00', which is 30 shifted 8 bits. 30 is the version identifier of OS/2 3.0, the original 32-bit target of the Windows NT effort. - Handle initial TEB correctly for fork(). - Move AWE APIs to procsup.c instea of section.c since they are unrelated. - Move the rewritten PEB/TEB functions to ARM3's procsup.c. svn path=/trunk/; revision=43476
2009-10-15 05:56:41 +00:00
#define MM_HIGHEST_VAD_ADDRESS \
(PVOID)((ULONG_PTR)MM_HIGHEST_USER_ADDRESS - (16 * PAGE_SIZE))
[NTOS]: Move more functions from the i386 ARM3 directory to the portable/shared directory, since they apply to all architectures. [NTOS]: Refactor the mapping of the PTEs for the PFN database into MiMapPfnDatabase and move the code to portable directory. [NTOS]: Move and refactor some other definitions, and make some numbers more portable by defining arch-specific subvalues. [NTOS]: Make the PFN database actually 2 PFN Databases: MmPfnDatabase[0] which is the ReactOS mapping of PHYSICAL_PAGE structures, and MmPfnDatabase[1] which will be the ARM3 mapping of MMPFN structures. The latter is as-of-yet unused, but memory for it is now being reserved. svn path=/trunk/; revision=45566
2010-02-11 00:01:32 +00:00
/* Make the code cleaner with some definitions for size multiples */
#define _1KB (1024)
[NTOS]: 1MB is not 1000 * 1KB... svn path=/trunk/; revision=46904
2010-04-17 14:28:15 +00:00
#define _1MB (1024 * _1KB)
[NTOS]: Move more functions from the i386 ARM3 directory to the portable/shared directory, since they apply to all architectures. [NTOS]: Refactor the mapping of the PTEs for the PFN database into MiMapPfnDatabase and move the code to portable directory. [NTOS]: Move and refactor some other definitions, and make some numbers more portable by defining arch-specific subvalues. [NTOS]: Make the PFN database actually 2 PFN Databases: MmPfnDatabase[0] which is the ReactOS mapping of PHYSICAL_PAGE structures, and MmPfnDatabase[1] which will be the ARM3 mapping of MMPFN structures. The latter is as-of-yet unused, but memory for it is now being reserved. svn path=/trunk/; revision=45566
2010-02-11 00:01:32 +00:00
/* Size of a PDE directory, and size of a page table */
#define PDE_SIZE (PDE_COUNT * sizeof(MMPDE))
#define PT_SIZE (PTE_COUNT * sizeof(MMPTE))
/* Architecture specific count of PDEs in a directory, and count of PTEs in a PT */
#ifdef _M_IX86
#define PD_COUNT 1
[NTOS]: Fix a stupid bug: x86 has 1024 PDEs, and ARM has 4096 PDEs, not the other way around. [NTOS]: Map the ARM3 PFN database as well, now. [NTOS]: Start initializing the ARM3 PFN database entries, right now for pages that have been mapped directly through PTE/PDE manipulation. svn path=/trunk/; revision=45569
2010-02-11 09:15:50 +00:00
#define PDE_COUNT 1024
[NTOS]: Move more functions from the i386 ARM3 directory to the portable/shared directory, since they apply to all architectures. [NTOS]: Refactor the mapping of the PTEs for the PFN database into MiMapPfnDatabase and move the code to portable directory. [NTOS]: Move and refactor some other definitions, and make some numbers more portable by defining arch-specific subvalues. [NTOS]: Make the PFN database actually 2 PFN Databases: MmPfnDatabase[0] which is the ReactOS mapping of PHYSICAL_PAGE structures, and MmPfnDatabase[1] which will be the ARM3 mapping of MMPFN structures. The latter is as-of-yet unused, but memory for it is now being reserved. svn path=/trunk/; revision=45566
2010-02-11 00:01:32 +00:00
#define PTE_COUNT 1024
#elif _M_ARM
#define PD_COUNT 1
[NTOS]: Fix a stupid bug: x86 has 1024 PDEs, and ARM has 4096 PDEs, not the other way around. [NTOS]: Map the ARM3 PFN database as well, now. [NTOS]: Start initializing the ARM3 PFN database entries, right now for pages that have been mapped directly through PTE/PDE manipulation. svn path=/trunk/; revision=45569
2010-02-11 09:15:50 +00:00
#define PDE_COUNT 4096
[NTOS]: Move more functions from the i386 ARM3 directory to the portable/shared directory, since they apply to all architectures. [NTOS]: Refactor the mapping of the PTEs for the PFN database into MiMapPfnDatabase and move the code to portable directory. [NTOS]: Move and refactor some other definitions, and make some numbers more portable by defining arch-specific subvalues. [NTOS]: Make the PFN database actually 2 PFN Databases: MmPfnDatabase[0] which is the ReactOS mapping of PHYSICAL_PAGE structures, and MmPfnDatabase[1] which will be the ARM3 mapping of MMPFN structures. The latter is as-of-yet unused, but memory for it is now being reserved. svn path=/trunk/; revision=45566
2010-02-11 00:01:32 +00:00
#define PTE_COUNT 256
#else
#error Define these please!
#endif
- Multiple PEB/TEB creation fixes: - Set up PEB and TEB under SEH to handle possible paging errors (which are legitimate). - Also touch the image under SEH to handle image paging errors (also legitimate). - Should avoid kernel panics in cases where the executable is damaged, invalid, or impossible to page in. - Initialize more PEB fields. - Add new INITIAL_PEB structure to support fork() in the future. Also fixes the fact we don't create a PEB for the system process anymore. - Create PEB while attached to the process. - Handle UP-only images, and set correct affinity mask in the PEB. - Set session ID instead of session structure (currently zero). - Set correct TIB version in the TEB. Due to a historical oddity, the NT TIB identifies itself as '0x1e00', which is 30 shifted 8 bits. 30 is the version identifier of OS/2 3.0, the original 32-bit target of the Windows NT effort. - Handle initial TEB correctly for fork(). - Move AWE APIs to procsup.c instea of section.c since they are unrelated. - Move the rewritten PEB/TEB functions to ARM3's procsup.c. svn path=/trunk/; revision=43476
2009-10-15 05:56:41 +00:00
[NTOS]: Manage the PFN lists using the correct Flink/Blink semantics of the MMPFN structure, instead of typecasting a LIST_ENTRY on top of Flink and PteAddress. This allows PteAddress to be used now, and minimizes the number of differences between MMPFN and the ReactOS PHYSICAL_PAGE. [NTOS]: Zero pages starting at the head of the free list, insert them at the back. [NTOS]: Add MiInsertPageInFreeList to build the colored lists (not yet used) in the ARM3 PFN database. [NTOS]: Rename the ReactOS PFN lists for free/zero to their real names as used in Windows. svn path=/trunk/; revision=45634
2010-02-20 14:40:21 +00:00
//
// PFN List Sentinel
//
#define LIST_HEAD 0xFFFFFFFF
- Fix a critical bug in the German hack which was causing the last PDE not to be synched with the ReactOS Memory Manager (or worse, the first, if there was only one PDE). - Add a new file which will hold the executive layer above the pool allocator (the Ex* routines). - This should eventually be moved to \ex. - Note that the current ReactOS pool Ex* routines are in \mm, which is dead wrong. - Define the POOL_DESCRIPTOR and POOL_HEADER structures for the NT 5.2 pool. - Define, create, and implement the routine to initialize a pool vector. - For now, we assume you want the nonpaged pool vector/descriptor. - Call this routine from the ARM3 initialization routine. - No changes to system behavior other than the bugfix above. svn path=/trunk/; revision=41824
2009-07-09 09:33:49 +00:00
//
// FIXFIX: These should go in ex.h after the pool merge
//
- Initialize the value of MmBootImageSize in ARM3 now. - Also fix its value such that it's PDE aligned -- this makes sure that we don't step on any of the boot loader's PDE mappings and can blow everything away later. - Initialize the MmSystem/User/Probe Addresses in ARM3 as well (no functional change). - Print out a lot more of the VA ranges in ARM3's Phase 2 initialization. Most of the VA space is now dumped out. - Write out the code to initialize session space VA ranges - Image space, view space, working set space and pool space values are all calculated properly. - NT default sizes are used, without support for registry overrides (yet). - Also system view space is initialized and sized. - Code is heavily commented and explained for inquisitive minds. - Define the paged pool start address, minimum/default size, and add some extra pool header asserts/definitions. - Define MmPagedPoolInfo to keep track of all paged pool related information (start/end PTEs, VA ranges, allocation/free bitmaps, etc). - Fixed a lot of comments and added some new ones to provide extra clarity. - Implement MiBuildPagedPool. It has two jobs: - Build and create the shadow system page directory, which double-maps the System process' PDE. - More explenations are in the comments. - Define the paged pool region and size, and initialize MmPagedPoolInfo accordingly. - Create and setup the paged pool allocation and free bitmaps (again explained in the comments). - There shouldn't be any real functional change yet due to this commit. - We need to create memory areas for session space and system view space otherwise the VA regions could get used by ReactOS instead. svn path=/trunk/; revision=42148
2009-07-22 22:46:29 +00:00
#define POOL_LISTS_PER_PAGE (PAGE_SIZE / sizeof(LIST_ENTRY))
#define BASE_POOL_TYPE_MASK 1
#define POOL_MAX_ALLOC (PAGE_SIZE - (sizeof(POOL_HEADER) + sizeof(LIST_ENTRY)))
- Fix a critical bug in the German hack which was causing the last PDE not to be synched with the ReactOS Memory Manager (or worse, the first, if there was only one PDE). - Add a new file which will hold the executive layer above the pool allocator (the Ex* routines). - This should eventually be moved to \ex. - Note that the current ReactOS pool Ex* routines are in \mm, which is dead wrong. - Define the POOL_DESCRIPTOR and POOL_HEADER structures for the NT 5.2 pool. - Define, create, and implement the routine to initialize a pool vector. - For now, we assume you want the nonpaged pool vector/descriptor. - Call this routine from the ARM3 initialization routine. - No changes to system behavior other than the bugfix above. svn path=/trunk/; revision=41824
2009-07-09 09:33:49 +00:00
typedef struct _POOL_DESCRIPTOR
{
POOL_TYPE PoolType;
ULONG PoolIndex;
ULONG RunningAllocs;
ULONG RunningDeAllocs;
ULONG TotalPages;
ULONG TotalBigPages;
ULONG Threshold;
PVOID LockAddress;
PVOID PendingFrees;
LONG PendingFreeDepth;
SIZE_T TotalBytes;
SIZE_T Spare0;
LIST_ENTRY ListHeads[POOL_LISTS_PER_PAGE];
} POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
typedef struct _POOL_HEADER
{
union
{
struct
{
USHORT PreviousSize:9;
USHORT PoolIndex:7;
USHORT BlockSize:9;
USHORT PoolType:7;
};
ULONG Ulong1;
};
union
{
ULONG PoolTag;
struct
{
USHORT AllocatorBackTraceIndex;
USHORT PoolTagHash;
};
};
} POOL_HEADER, *PPOOL_HEADER;
- Initialize the value of MmBootImageSize in ARM3 now. - Also fix its value such that it's PDE aligned -- this makes sure that we don't step on any of the boot loader's PDE mappings and can blow everything away later. - Initialize the MmSystem/User/Probe Addresses in ARM3 as well (no functional change). - Print out a lot more of the VA ranges in ARM3's Phase 2 initialization. Most of the VA space is now dumped out. - Write out the code to initialize session space VA ranges - Image space, view space, working set space and pool space values are all calculated properly. - NT default sizes are used, without support for registry overrides (yet). - Also system view space is initialized and sized. - Code is heavily commented and explained for inquisitive minds. - Define the paged pool start address, minimum/default size, and add some extra pool header asserts/definitions. - Define MmPagedPoolInfo to keep track of all paged pool related information (start/end PTEs, VA ranges, allocation/free bitmaps, etc). - Fixed a lot of comments and added some new ones to provide extra clarity. - Implement MiBuildPagedPool. It has two jobs: - Build and create the shadow system page directory, which double-maps the System process' PDE. - More explenations are in the comments. - Define the paged pool region and size, and initialize MmPagedPoolInfo accordingly. - Create and setup the paged pool allocation and free bitmaps (again explained in the comments). - There shouldn't be any real functional change yet due to this commit. - We need to create memory areas for session space and system view space otherwise the VA regions could get used by ReactOS instead. svn path=/trunk/; revision=42148
2009-07-22 22:46:29 +00:00
//
// Everything depends on this
//
C_ASSERT(sizeof(POOL_HEADER) == 8);
C_ASSERT(sizeof(POOL_HEADER) == sizeof(LIST_ENTRY));
- Add 'simple' implementation of MmDbgCopyMemory to read/write virtual memory in a somewhat safe way (still no support for physical memory). Properly implement KdpCopyMemoryChunks as a wrapper around MmDbgCopyMemory and make most of the remaining unsafe copies use it instead of RtlCopyMemory. This fixes most of the remaining crashes during KD debugging as WinDbg/KD relies on the kernel support to handle bad addresses. - Stub out the remaining missing global variables for the debugger data block -- fixes some cases of WinDbg failures and gives it a chance to handle errors instead of failing on a NULL read. Several of these variables are for functionality we don't yet implement, so I tried to put them where they are "least wrong". Everything besides the MmLoadedUserImageList variable is left unitialized -- KD should mostly be able to handle this properly. - Define correctly sized KDDEBUGGER_DATA64 for our kernel (needs to be done in a better way). svn path=/trunk/; revision=43863
2009-10-31 01:02:35 +00:00
extern ULONG ExpNumberOfPagedPools;
- Add STATUS_ASSERTION_FAILURE status code required for NT_ASSERT. - Check KdReceivePacket return for KdPacketReceived instead of 0 for correctness. - Use KdpDprintf instead of setting CR2 for unhandled cases. - Add more variables to KdDebuggerDataBlock. svn path=/trunk/; revision=43291
2009-10-04 20:19:43 +00:00
extern POOL_DESCRIPTOR NonPagedPoolDescriptor;
- Add 'simple' implementation of MmDbgCopyMemory to read/write virtual memory in a somewhat safe way (still no support for physical memory). Properly implement KdpCopyMemoryChunks as a wrapper around MmDbgCopyMemory and make most of the remaining unsafe copies use it instead of RtlCopyMemory. This fixes most of the remaining crashes during KD debugging as WinDbg/KD relies on the kernel support to handle bad addresses. - Stub out the remaining missing global variables for the debugger data block -- fixes some cases of WinDbg failures and gives it a chance to handle errors instead of failing on a NULL read. Several of these variables are for functionality we don't yet implement, so I tried to put them where they are "least wrong". Everything besides the MmLoadedUserImageList variable is left unitialized -- KD should mostly be able to handle this properly. - Define correctly sized KDDEBUGGER_DATA64 for our kernel (needs to be done in a better way). svn path=/trunk/; revision=43863
2009-10-31 01:02:35 +00:00
extern PPOOL_DESCRIPTOR ExpPagedPoolDescriptor[16 + 1];
extern PVOID PoolTrackTable;
- Add STATUS_ASSERTION_FAILURE status code required for NT_ASSERT. - Check KdReceivePacket return for KdPacketReceived instead of 0 for correctness. - Use KdpDprintf instead of setting CR2 for unhandled cases. - Add more variables to KdDebuggerDataBlock. svn path=/trunk/; revision=43291
2009-10-04 20:19:43 +00:00
- Fix a critical bug in the German hack which was causing the last PDE not to be synched with the ReactOS Memory Manager (or worse, the first, if there was only one PDE). - Add a new file which will hold the executive layer above the pool allocator (the Ex* routines). - This should eventually be moved to \ex. - Note that the current ReactOS pool Ex* routines are in \mm, which is dead wrong. - Define the POOL_DESCRIPTOR and POOL_HEADER structures for the NT 5.2 pool. - Define, create, and implement the routine to initialize a pool vector. - For now, we assume you want the nonpaged pool vector/descriptor. - Call this routine from the ARM3 initialization routine. - No changes to system behavior other than the bugfix above. svn path=/trunk/; revision=41824
2009-07-09 09:33:49 +00:00
//
// END FIXFIX
//
[NTOS]: 1MB is not 1000 * 1KB... svn path=/trunk/; revision=46904
2010-04-17 14:28:15 +00:00
typedef struct _MI_LARGE_PAGE_DRIVER_ENTRY
{
LIST_ENTRY Links;
UNICODE_STRING BaseName;
} MI_LARGE_PAGE_DRIVER_ENTRY, *PMI_LARGE_PAGE_DRIVER_ENTRY;
- Initialize nonpaged pool expansion system PTEs (MiInitializeSystemPtes): - Just supports expansion space for now, not system space. - Very basic initialization of the accounting structures required. - Sets up the first two system PTE clusters for the space (the first contains the linkage, the second contains the sizage). - Called from MiInitializeArmPool. svn path=/trunk/; revision=41528
2009-06-22 08:51:28 +00:00
typedef enum _MMSYSTEM_PTE_POOL_TYPE
{
SystemPteSpace,
NonPagedPoolExpansion,
MaximumPtePoolTypes
} MMSYSTEM_PTE_POOL_TYPE;
- Rewrite MmMapIoSpace and MmUnmapIoSpace to use System PTEs instead. - Much faster and cleaner (will be even faster when System PTE allocation is optimized). - Better handling of esoteric caching options, especially relevant for ARM. - Handled through the MiPlatformCacheAttributes, which should be defined differently for each platform (TODO). - Handles both I/O (device) and RAM physical memory. - Correct flushing of CPU caches (not a big deal on x86, but matters on ARM). svn path=/trunk/; revision=41628
2009-06-27 03:03:24 +00:00
typedef enum _MI_PFN_CACHE_ATTRIBUTE
{
MiNonCached,
MiCached,
MiWriteCombined,
MiNotMapped
} MI_PFN_CACHE_ATTRIBUTE, *PMI_PFN_CACHE_ATTRIBUTE;
- Call MmArmInitSystem for a second time, this time in Phase 1. - This will call MmInitializeMemoryLimits (now implemented) which will go ahead and create the MmPhysicalMemoryBlock. - This block contains the physical memory "runs" that are valid on the system, allowing the PFN database to differentiate between valid and non-valid RAM (instead of marking things as "BIOS"). - Also this will come in handy later for various utilities. svn path=/trunk/; revision=41648
2009-06-27 22:16:47 +00:00
typedef struct _PHYSICAL_MEMORY_RUN
{
ULONG BasePage;
ULONG PageCount;
} PHYSICAL_MEMORY_RUN, *PPHYSICAL_MEMORY_RUN;
typedef struct _PHYSICAL_MEMORY_DESCRIPTOR
{
ULONG NumberOfRuns;
ULONG NumberOfPages;
PHYSICAL_MEMORY_RUN Run[1];
} PHYSICAL_MEMORY_DESCRIPTOR, *PPHYSICAL_MEMORY_DESCRIPTOR;
[NTOS]: Allocate and initialize color tables based on MmSecondaryColors (MiInitializeColorTables). [NTOS]: These come after the PFN database, so modify the MmPfnAllocation to account for them. svn path=/trunk/; revision=45558
2010-02-10 18:44:30 +00:00
typedef struct _MMCOLOR_TABLES
{
PFN_NUMBER Flink;
PVOID Blink;
PFN_NUMBER Count;
} MMCOLOR_TABLES, *PMMCOLOR_TABLES;
- Begin the implementation of the ARM Pool Manager, a replacement for the ReactOS nonpaged pool. - Define the nonpaged system address space as done on Windows (see init.c for a brief introduction and source reading materials on this). - Size up the ARM pool as done on Windows (again, see init.c for documentation on this). - Create the PDEs for the expansion pool and the initial pool. - Allocate the pages for the initial pool, and map them. - Unlike ReactOS, ARM³ does the right thing and uses physically continuous pages. - Define two new static MEMORY_AREAs for the expansion and initial ARM pool. - No actual pool code/implementation is available yet, we are just slicing up the address space for now (mhmm... cake!)*. * There is no cake. svn path=/trunk/; revision=41525
2009-06-22 06:16:57 +00:00
extern MMPTE HyperTemplatePte;
Do not crash, use valid kernel PTE. svn path=/trunk/; revision=45555
2010-02-10 13:56:54 +00:00
extern MMPTE ValidKernelPde;
extern MMPTE ValidKernelPte;
- Begin the implementation of the ARM Pool Manager, a replacement for the ReactOS nonpaged pool. - Define the nonpaged system address space as done on Windows (see init.c for a brief introduction and source reading materials on this). - Size up the ARM pool as done on Windows (again, see init.c for documentation on this). - Create the PDEs for the expansion pool and the initial pool. - Allocate the pages for the initial pool, and map them. - Unlike ReactOS, ARM³ does the right thing and uses physically continuous pages. - Define two new static MEMORY_AREAs for the expansion and initial ARM pool. - No actual pool code/implementation is available yet, we are just slicing up the address space for now (mhmm... cake!)*. * There is no cake. svn path=/trunk/; revision=41525
2009-06-22 06:16:57 +00:00
- Initialize the ARM pool (MiInitializeArmPool): - Do some additional accounting to keep track of initial nonpaged pool range and size. - Create and initialize the free page lists, and free page entries. - Validate that the initial nonpaged pool address space was properly mapped. - Validate that the expansion nonpaged pool address space is unmapped, and prepare to map it. svn path=/trunk/; revision=41527
2009-06-22 08:22:41 +00:00
extern ULONG MmSizeOfNonPagedPoolInBytes;
extern ULONG MmMaximumNonPagedPoolInBytes;
[NTOS]: Make MM init read MmProductType to determine what SKU of ReactOS this is, instead of assuming Server. If you want to go back to the old behavior, you need to change "WinNT" to "ServerNT" in the hivesys under Product Type. [NTOS]: Configure the MmSystemSize variable properly based on SKU and RAM. Previously, ReactOS told all drivers and applications you were running on a system with < 13MB RAM. [NTOS]: Initialize thresholds for low and high memory (in pages), low and high paged pool memory, and low and high nonpaged pool memory. These are described in the source. [NTOS]: Initialize events for each of those thresholds, and populate the \KernelObject\xxxCondition events that are documented in MSDN for driver and app developers. [NTOS]: Define some internal thresholds to use later, representing the minimum number of free pages under we go berserk, and the minimum number of free pages that we consider "plenty". [NTOS]: Rename MiRemoveFromList to MiUnlinkFreeOrZeroedPage (Windows name). Make the function handle MmAvailablePages decrement, instead of having the caller do it. [NTOS]: Remove run-time initialization of the PFN lists, just initialize them statically (also fixes the fact we forgot to initialize their names). [NTOS]: Move some more initialization code to ARM3 instead of mm. [NTOS]: Read ProductType from registry into MmProductType instead of dummy value. Remove duplicate "Mirroring" variable read. svn path=/trunk/; revision=45638
2010-02-20 21:48:36 +00:00
extern PFN_NUMBER MmMaximumNonPagedPoolInPages;
extern PFN_NUMBER MmSizeOfPagedPoolInPages;
- Add STATUS_ASSERTION_FAILURE status code required for NT_ASSERT. - Check KdReceivePacket return for KdPacketReceived instead of 0 for correctness. - Use KdpDprintf instead of setting CR2 for unhandled cases. - Add more variables to KdDebuggerDataBlock. svn path=/trunk/; revision=43291
2009-10-04 20:19:43 +00:00
extern PVOID MmNonPagedSystemStart;
- Initialize the ARM pool (MiInitializeArmPool): - Do some additional accounting to keep track of initial nonpaged pool range and size. - Create and initialize the free page lists, and free page entries. - Validate that the initial nonpaged pool address space was properly mapped. - Validate that the expansion nonpaged pool address space is unmapped, and prepare to map it. svn path=/trunk/; revision=41527
2009-06-22 08:22:41 +00:00
extern PVOID MmNonPagedPoolStart;
extern PVOID MmNonPagedPoolExpansionStart;
- Reimplement MmAllocateContiguousMemory, MmAllocateContiguousMemorySpecifyCache, MmFreeContiguousMemory, MmFreeContiguousMemorySpecifyCache: - Use a smarter algorithm (as described here: http://www.microsoft.com/whdc/Driver/tips/ContigMem.mspx) to first try to satisfy the allocation by a simple nonpaged pool allocation (for cached requests only). - This range is then checked for physical continuity, since it's not guaranteed for non-initial-pool allocations (and right now in ReactOS, it never is). - As a fallback, Windows NT then attempts to scan free nonpaged pool pages. This is not yet implemented since the ReactOS nonpaged pool is not usually contiguous (to the level that NT's is). - When the ARM pool is implemented and replaces nonpaged pool, this code path will have to be implemented. - As a last resort, the actual PFN database is scanned for contiguous free pages. - ReactOS used MmGetContiguousPages for this, which blindly scanned the PFN database. New MiFindContinuousPages will scan the physical memory descriptor block recently implemented, which avoids going over pages we already know are going to be unusable. - The ReactOS function also held the PFN lock for the entire duration of the scan, which is significant on systems with large memory. Instead, we make an initial unsafe scan first, and only lock when we think we've found a correct range (and we'll then reconfirm the ranges). - Finally, the older function actually did a double-scan to try to avoid using memory ranges under 16MB, which was useless on today's systems and also rather inefficient. - Other than that, the actual setup of the PFN entry is copy-pasted from the old ReactOS function, so nothing's changed there -- the page still looks the same, but the selection algorithm is faster and more accurate. - Once the pages are found, we piggyback on the new I/O mapping mechanism (which uses System PTEs) instead of doing it all over by hand as before. - Since the underlying support is still System PTEs, once again, optimizations to that component will yield significant improvements here too. svn path=/trunk/; revision=41657
2009-06-28 05:43:12 +00:00
extern PVOID MmNonPagedPoolEnd;
- Add STATUS_ASSERTION_FAILURE status code required for NT_ASSERT. - Check KdReceivePacket return for KdPacketReceived instead of 0 for correctness. - Use KdpDprintf instead of setting CR2 for unhandled cases. - Add more variables to KdDebuggerDataBlock. svn path=/trunk/; revision=43291
2009-10-04 20:19:43 +00:00
extern ULONG MmSizeOfPagedPoolInBytes;
extern PVOID MmPagedPoolStart;
extern PVOID MmPagedPoolEnd;
extern PVOID MmSessionBase;
extern ULONG MmSessionSize;
- For one thing, fix build in ARM3/init.c (sorry!) - Secondly, initialize hyperspace in ARM³ now, at the correct place: - Also, create the hyperspace PDE here, and not in FreeLDR, which was incorrect in the first place. - This might help booting Windows/WinLDR. - Install-tested w/ networking, with no issues found, on: - Virtual Box 2.4 - VMWare 6.5 - QEMU 0.9.0 - PEBKAC? svn path=/trunk/; revision=41573
2009-06-23 06:39:10 +00:00
extern PMMPTE MmFirstReservedMappingPte, MmLastReservedMappingPte;
- Move ARM Pool to 0xB0000000 to avoid clashing with existing ReactOS address space components (shouldn't happen if things work right, but better safe than sorry). - Implement System PTE allocator (MiReserveAlignedSystemPtes and MiReserveSystemPtes). Very simple yet functional, no optimizes for now. - Allocate 32 zeoring PTEs from the System PTE pool. - Not used yet, only the allocation is made to test the current framework. - Tested on VirtualBox, QEMU and VMWare with RAM sizes from 128MB to 1536MB with no problems. svn path=/trunk/; revision=41575
2009-06-23 07:49:39 +00:00
extern PMMPTE MiFirstReservedZeroingPte;
- Reimplement MmAllocateContiguousMemory, MmAllocateContiguousMemorySpecifyCache, MmFreeContiguousMemory, MmFreeContiguousMemorySpecifyCache: - Use a smarter algorithm (as described here: http://www.microsoft.com/whdc/Driver/tips/ContigMem.mspx) to first try to satisfy the allocation by a simple nonpaged pool allocation (for cached requests only). - This range is then checked for physical continuity, since it's not guaranteed for non-initial-pool allocations (and right now in ReactOS, it never is). - As a fallback, Windows NT then attempts to scan free nonpaged pool pages. This is not yet implemented since the ReactOS nonpaged pool is not usually contiguous (to the level that NT's is). - When the ARM pool is implemented and replaces nonpaged pool, this code path will have to be implemented. - As a last resort, the actual PFN database is scanned for contiguous free pages. - ReactOS used MmGetContiguousPages for this, which blindly scanned the PFN database. New MiFindContinuousPages will scan the physical memory descriptor block recently implemented, which avoids going over pages we already know are going to be unusable. - The ReactOS function also held the PFN lock for the entire duration of the scan, which is significant on systems with large memory. Instead, we make an initial unsafe scan first, and only lock when we think we've found a correct range (and we'll then reconfirm the ranges). - Finally, the older function actually did a double-scan to try to avoid using memory ranges under 16MB, which was useless on today's systems and also rather inefficient. - Other than that, the actual setup of the PFN entry is copy-pasted from the old ReactOS function, so nothing's changed there -- the page still looks the same, but the selection algorithm is faster and more accurate. - Once the pages are found, we piggyback on the new I/O mapping mechanism (which uses System PTEs) instead of doing it all over by hand as before. - Since the underlying support is still System PTEs, once again, optimizations to that component will yield significant improvements here too. svn path=/trunk/; revision=41657
2009-06-28 05:43:12 +00:00
extern MI_PFN_CACHE_ATTRIBUTE MiPlatformCacheAttributes[2][MmMaximumCacheType];
- Call MmArmInitSystem for a second time, this time in Phase 1. - This will call MmInitializeMemoryLimits (now implemented) which will go ahead and create the MmPhysicalMemoryBlock. - This block contains the physical memory "runs" that are valid on the system, allowing the PFN database to differentiate between valid and non-valid RAM (instead of marking things as "BIOS"). - Also this will come in handy later for various utilities. svn path=/trunk/; revision=41648
2009-06-27 22:16:47 +00:00
extern PPHYSICAL_MEMORY_DESCRIPTOR MmPhysicalMemoryBlock;
- Move all the functions from drvlck.c and verifier.c to ARM3's drvmgmt.c: - "Managing driver managing" (by David Welch) is no more... the routines have been properly renamed and cleaned up. - Also moved Driver Verifier helper routines in here, and fixed a couple of bugs: - Do not allow hooking of the kernel or HAL image (tested on Windows Server 2003) - Cleanup some useless variable redefinitions and code complexity. - Documented what some of the Mm Lock/Unlock Pageable Section/Driver functions should do, for later if needed. - Made aliasses so the typo "Pagable" functions redirect to the correct "Pageable" functions. - No functional change -- the Verifier functions were unused, and the drvlock.c functions were unimplemented (and still are). - Also move one more *Pageable* function from wset.c to ARM3's drvmgmt.c -- it seemed to have been a lost orphan (Also unimplemented). svn path=/trunk/; revision=41658
2009-06-28 07:32:52 +00:00
extern ULONG MmBootImageSize;
- Major rewrite of Memory Descriptor List (MDL) implementation (moving it towards using System PTEs). - MmCreateMdl, MmSizeOfMdl: No Change. - MmBuildMdlForNonPagedPool: Do not use MmGetPfnForProcess, just normal PMMPTE manipulation. - This seems to cause issues in certain scenarios, because in ReactOS, nonpaged pool, a resident and guaranteed resources, does not always have its PDEs mapped! - By calling MmGetPfnForProcess, this wound up in the annals of ReactOS mm code, which lazy-remapped the PDE. We detected this issue specifically in the cache manager, and fixed it there. It should not appear anywhere else. - MmAllocatePagesForMdl, MmAllocatePagesForMdlEx, MmFreePagesFromMdl: - The *Ex function is now implemented. - Allocating pages now uses MiAllocatePagesForMdl, which is based on the older MmAllocPagesSpecifyRange. - The code is cleaner, better commented, and better handles partial MDLs. - Cache flags are still ignored (so the Ex functionality isn't really there). - MmMapLockedPages, MmMapLockedPagesSpecifyCache, MmUnmapLockedPages: - These functions now use System PTEs for the mappings, instead of the hacked-up "MDL Mapping Space". - This frees up 256MB of Kernel Virtual Address Space. - Takes advantage of all System PTE functionality. - Once again, optimizations in the System PTE code will be felt here. - For user-space mappings however, the old code is still kept and used. - MiMapLockedPagesInUserSpace and MiUnMapLockedPagesInUserSpace are now in virtual.c and provide this. - MmProbeAndLockPages, MmUnlockPages: - The pages are actually probed now, in SEH. This did not seem to happen before (did someone misread the function's name?) - Probe for write is only done for write access to user pages (as documented). - We do not probe/check for write access for kernel requests (force Operation to be IoReadAccess). - Proper locking is used now: Address Space lock for user mappings, PFN lock for kernel mappings. - Faulting in pages (to make them available before locking) is now done outside the address space/PFN lock. - You don't want to be holding a spinlock/mutex while doing disk I/O! - For write/modify access, if the PTE is not writable, fail the request since the PTE protection overrides. - However, if the PTE is writable but also copy on write, then we'll fault the page in for write access, which is a legitimate operation for certain user-mode scenarios. - The old version always provided the CopyOnWrite behavior, even for non-CopyOnWrite pages! - Reference and lock every valid page that has a PFN entry (non-I/O Pages). - The older code did not seem to lock pages that had to be faulted in (weren't already valid). - Cleanup the cleanup code (no pun intended). Because we now mark the pages as locked early-on, and because of changes in MmUnlockPages, we can simply use MmUnlockPages in case of error, since it will be able to fully back-out and references/locks that we did. - Previous code attempted to do this on its own, in a pretty inconsistent manner, which would leave page leaks (both in references and lock count). - In MmUnlockPages, not as many changes, but we now: - Still make sure that an I/O Mapping MDL doesn't have valid PFN database pages (non-I/O). - An MDL can cover pages that are both I/O mapped and RAM mapped, so we have to unlock/dereference the latter instead of skipping them as the old code did. - Use the PFN lock when checking pages and unlocking/dereferencing them. - Overall, non-complete MDLs are now marked by having a -1 PFN, and the MDL code has been updated to early-break out of page-scanning loops and/or ignore such pages, which can happen in a sparse MDL. - Implementation has been tested on VMWare and QEMU for a variety of tasks and was found to be reliable and stable. svn path=/trunk/; revision=41707
2009-06-30 08:29:22 +00:00
extern PMMPTE MmSystemPtesStart[MaximumPtePoolTypes];
extern PMMPTE MmSystemPtesEnd[MaximumPtePoolTypes];
- Separe ARM3 Init into 3 defined phases: - 1: No PFN Database exists - 2: PFN Database exists - 3: ReactOS NP Pool exists (deprecated) - Cleanup ReactOS Mm init to work with this. - ARM3 Phase 1 Init now uses pages directly from the physical memory descriptor. - This similar to how "MmAllocEarlyPage" used to work. - A new function MxGetNextPage now does this. - MxGetNextPage can allocate more than just one page however (making it possible to get contiguous physical memory without going through the PFN-based MmAllocateContiguousMemory beast) - Also MxGetNextPage will bugcheck with INSTALL_MORE_MEMORY if it runs out of pages. - Renamed the physical memory descriptor variables to MxFreeDescriptor, MxOldFreeDescriptor instead of MiFreeDescriptor and MiOrgFreeDescriptor (based on NT symbols) - Nonpaged pool PDEs, PFN database PDEs, and initial nonpaged pool PTEs are now allocated through MxGetNextPage. - Fix an off by one error in the sizing of MxPfnAllocation. - The PFN database is now fully "owned" by ARM3 in terms of its PDE mappings and VA location at 0xB0000000. - ie. MmArmPfnDatabase is now MmPfnDatabase. - The actual PFN database entries and setup are still done by the ReactOS Mm. - Got rid of ARM nonpaged pool allocator test. - Repositioned ReactOS nonpaged pool (deprecated) after the boot image (used to be after the PFN database). - Paged pool follows. svn path=/trunk/; revision=42131
2009-07-22 07:33:22 +00:00
extern PMEMORY_ALLOCATION_DESCRIPTOR MxFreeDescriptor;
extern MEMORY_ALLOCATION_DESCRIPTOR MxOldFreeDescriptor;
extern ULONG MxPfnAllocation;
- Initialize the value of MmBootImageSize in ARM3 now. - Also fix its value such that it's PDE aligned -- this makes sure that we don't step on any of the boot loader's PDE mappings and can blow everything away later. - Initialize the MmSystem/User/Probe Addresses in ARM3 as well (no functional change). - Print out a lot more of the VA ranges in ARM3's Phase 2 initialization. Most of the VA space is now dumped out. - Write out the code to initialize session space VA ranges - Image space, view space, working set space and pool space values are all calculated properly. - NT default sizes are used, without support for registry overrides (yet). - Also system view space is initialized and sized. - Code is heavily commented and explained for inquisitive minds. - Define the paged pool start address, minimum/default size, and add some extra pool header asserts/definitions. - Define MmPagedPoolInfo to keep track of all paged pool related information (start/end PTEs, VA ranges, allocation/free bitmaps, etc). - Fixed a lot of comments and added some new ones to provide extra clarity. - Implement MiBuildPagedPool. It has two jobs: - Build and create the shadow system page directory, which double-maps the System process' PDE. - More explenations are in the comments. - Define the paged pool region and size, and initialize MmPagedPoolInfo accordingly. - Create and setup the paged pool allocation and free bitmaps (again explained in the comments). - There shouldn't be any real functional change yet due to this commit. - We need to create memory areas for session space and system view space otherwise the VA regions could get used by ReactOS instead. svn path=/trunk/; revision=42148
2009-07-22 22:46:29 +00:00
extern MM_PAGED_POOL_INFO MmPagedPoolInfo;
- This is a HIGH RISK patch. It has been tested on multiple emulators and configurations but requires broader input. - Implement several changes to PFN database management: - The PTEs for the PFN Database are now created by ARM3. Unlike the old code which create PTE for every page on the machine, ARM3 only creates PTEs to account for pages that should be in the PFN database. - A second related change is what "pages should be in the PFN database". Previously, reserved or otherwise non-existing (ie: holes) memory regions would get a PFN entry created and marked as "BIOS". This is wasteful and not compatible with Windows: there should not be PFN entries created at all. - So we removed BIOS PFN entries, and now only create PTEs for valid pages as listed in the physical memory ranges. - This allows machines with "holes" in their physical address space not to waste dozens of MBs of nonpaged pool - Also saves memory on regular machines too, since 1-4MB worth of memory will now not be in the DB anymore - To keep track of pages that are invalid/unknown/ignored, there is now a "PFN Bitmap". This bitmap has one bit set for each valid PFN in the database. - And so, MiGetPfnEntry now also validates that, if there is a PFN Bitmap, the requested PFN is actually present in the database. - This introduces a major functional change: device pages, reserved pages, and other BIOS pages cannot be referenced, shared, or managed in any meaningful way. - We have attempted to fix parts of the OS that depended on this, but there may still be bugs. - A known issue may be an assertion during reboot and/or shutdown in the hyperspace mapping function. It is currently safe to simply "cont" in the debugger a couple of times. - We are working on a fix. svn path=/trunk/; revision=42220
2009-07-25 21:35:31 +00:00
extern RTL_BITMAP MiPfnBitMap;
- Fix calculations error in the setup of the paged pool bitmap. - Initialize the paged pool guarded mutex. - Add helper routines ExLock/UnlockPool to either acquire the NPP QSL or the PP GM depending on the pool descriptor, instead of hardcoding the NPP QSL. - Implement InitializePool for the PagedPool case. - Now call InitializePool for PagedPool as well. svn path=/trunk/; revision=43482
2009-10-15 17:23:21 +00:00
extern KGUARDED_MUTEX MmPagedPoolMutex;
- Fix a bug in memory area creation: Static memory areas had the static flag embedded in their type, so code that was switch()ing on the type would fail to recognize the actual type, because MEMORY_AREA_STATIC was ORed in. - Add a new memory area type: MEMORY_AREA_OWNED_BY_ARM3. This will allow us to instruct the ReactOS Memory MAnager to "Back. The Fuck. Off." during page faults and such, so we can handle page faults inside ARM3-owned PTEs ourselves. - Right now, all ARM3 PTEs and data is nonpaged, so no page faults should happen, but this may change in the future. - Also will allow us to manage our own PDEs so we can do on-demand inpage instead of syncing with the ReactOS Mm hack cache. - Create all memory areas in one shot in MmCreateSystemMemoryAreas (get rid of MiInitPageDirectoryMap and MiInitPagedPool memory area creation). - Mark all of ours as owned by ARM3. - Make them all static. - The only non-ARM3 one right now is paged pool, we own all the other static areas. - Move this code into mm, instead of mm/ARM3, since memory areas are not an ARM3 concept. - Also create memory areas for session space, session view, and other ARM3 memory ranges, so nobody touches those ranges. - Dump the kernel address space after all this is done, in a MmDbg function in mm. - This cleans up ARM3 of some ROS-specific code, and also collapses Phase 1 and 2 into a single phase. svn path=/trunk/; revision=43486
2009-10-15 18:54:35 +00:00
extern PVOID MmPagedPoolStart;
extern PVOID MmPagedPoolEnd;
extern PVOID MmNonPagedSystemStart;
extern PVOID MiSystemViewStart;
extern ULONG MmSystemViewSize;
extern PVOID MmSessionBase;
extern PVOID MiSessionSpaceEnd;
extern ULONG MmSizeOfPagedPoolInBytes;
extern PMMPTE MmSystemPagePtes;
- Add 'simple' implementation of MmDbgCopyMemory to read/write virtual memory in a somewhat safe way (still no support for physical memory). Properly implement KdpCopyMemoryChunks as a wrapper around MmDbgCopyMemory and make most of the remaining unsafe copies use it instead of RtlCopyMemory. This fixes most of the remaining crashes during KD debugging as WinDbg/KD relies on the kernel support to handle bad addresses. - Stub out the remaining missing global variables for the debugger data block -- fixes some cases of WinDbg failures and gives it a chance to handle errors instead of failing on a NULL read. Several of these variables are for functionality we don't yet implement, so I tried to put them where they are "least wrong". Everything besides the MmLoadedUserImageList variable is left unitialized -- KD should mostly be able to handle this properly. - Define correctly sized KDDEBUGGER_DATA64 for our kernel (needs to be done in a better way). svn path=/trunk/; revision=43863
2009-10-31 01:02:35 +00:00
extern PVOID MmSystemCacheStart;
extern PVOID MmSystemCacheEnd;
extern MMSUPPORT MmSystemCacheWs;
extern SIZE_T MmAllocatedNonPagedPool;
extern ULONG_PTR MmSubsectionBase;
extern ULONG MmSpecialPoolTag;
- Fix some pool calculations. - Check for some untested pool calculations. - Handle paging-in the page tables when needed. - Setup paging colors based on L2 cache size/associativity. - Setup system PTE size earlier. svn path=/trunk/; revision=44903
2010-01-03 05:10:09 +00:00
extern PVOID MmHyperSpaceEnd;
[NTOS]: Combine ARM3 phase 0 and 1 even it means calling back into TurdMM for one function call. [NTOS]: Separate out platform-specific parts of ARM3 initialization instead of having everything in an arch-specific file. No functional code changes. svn path=/trunk/; revision=45547
2010-02-10 02:00:56 +00:00
extern PMMWSL MmSystemCacheWorkingSetList;
extern ULONG MmMinimumNonPagedPoolSize;
extern ULONG MmMinAdditionNonPagedPoolPerMb;
extern ULONG MmDefaultMaximumNonPagedPool;
extern ULONG MmMaxAdditionNonPagedPoolPerMb;
extern ULONG MmSecondaryColors;
extern ULONG MmSecondaryColorMask;
extern ULONG MmNumberOfSystemPtes;
extern ULONG MmMaximumNonPagedPoolPercent;
[NTOS]: Move more functions from the i386 ARM3 directory to the portable/shared directory, since they apply to all architectures. [NTOS]: Refactor the mapping of the PTEs for the PFN database into MiMapPfnDatabase and move the code to portable directory. [NTOS]: Move and refactor some other definitions, and make some numbers more portable by defining arch-specific subvalues. [NTOS]: Make the PFN database actually 2 PFN Databases: MmPfnDatabase[0] which is the ReactOS mapping of PHYSICAL_PAGE structures, and MmPfnDatabase[1] which will be the ARM3 mapping of MMPFN structures. The latter is as-of-yet unused, but memory for it is now being reserved. svn path=/trunk/; revision=45566
2010-02-11 00:01:32 +00:00
extern ULONG MmLargeStackSize;
[NTOS]: Manage the PFN lists using the correct Flink/Blink semantics of the MMPFN structure, instead of typecasting a LIST_ENTRY on top of Flink and PteAddress. This allows PteAddress to be used now, and minimizes the number of differences between MMPFN and the ReactOS PHYSICAL_PAGE. [NTOS]: Zero pages starting at the head of the free list, insert them at the back. [NTOS]: Add MiInsertPageInFreeList to build the colored lists (not yet used) in the ARM3 PFN database. [NTOS]: Rename the ReactOS PFN lists for free/zero to their real names as used in Windows. svn path=/trunk/; revision=45634
2010-02-20 14:40:21 +00:00
extern PMMCOLOR_TABLES MmFreePagesByColor[FreePageList + 1];
[NTOS]: Make MM init read MmProductType to determine what SKU of ReactOS this is, instead of assuming Server. If you want to go back to the old behavior, you need to change "WinNT" to "ServerNT" in the hivesys under Product Type. [NTOS]: Configure the MmSystemSize variable properly based on SKU and RAM. Previously, ReactOS told all drivers and applications you were running on a system with < 13MB RAM. [NTOS]: Initialize thresholds for low and high memory (in pages), low and high paged pool memory, and low and high nonpaged pool memory. These are described in the source. [NTOS]: Initialize events for each of those thresholds, and populate the \KernelObject\xxxCondition events that are documented in MSDN for driver and app developers. [NTOS]: Define some internal thresholds to use later, representing the minimum number of free pages under we go berserk, and the minimum number of free pages that we consider "plenty". [NTOS]: Rename MiRemoveFromList to MiUnlinkFreeOrZeroedPage (Windows name). Make the function handle MmAvailablePages decrement, instead of having the caller do it. [NTOS]: Remove run-time initialization of the PFN lists, just initialize them statically (also fixes the fact we forgot to initialize their names). [NTOS]: Move some more initialization code to ARM3 instead of mm. [NTOS]: Read ProductType from registry into MmProductType instead of dummy value. Remove duplicate "Mirroring" variable read. svn path=/trunk/; revision=45638
2010-02-20 21:48:36 +00:00
extern ULONG MmProductType;
extern MM_SYSTEMSIZE MmSystemSize;
extern PKEVENT MiLowMemoryEvent;
extern PKEVENT MiHighMemoryEvent;
extern PKEVENT MiLowPagedPoolEvent;
extern PKEVENT MiHighPagedPoolEvent;
extern PKEVENT MiLowNonPagedPoolEvent;
extern PKEVENT MiHighNonPagedPoolEvent;
extern PFN_NUMBER MmLowMemoryThreshold;
extern PFN_NUMBER MmHighMemoryThreshold;
extern PFN_NUMBER MiLowPagedPoolThreshold;
extern PFN_NUMBER MiHighPagedPoolThreshold;
extern PFN_NUMBER MiLowNonPagedPoolThreshold;
extern PFN_NUMBER MiHighNonPagedPoolThreshold;
extern PFN_NUMBER MmMinimumFreePages;
extern PFN_NUMBER MmPlentyFreePages;
[NTOS]: 1MB is not 1000 * 1KB... svn path=/trunk/; revision=46904
2010-04-17 14:28:15 +00:00
extern PFN_NUMBER MiExpansionPoolPagesInitialCharge;
extern PFN_NUMBER MmResidentAvailablePages;
extern PFN_NUMBER MmResidentAvailablePagesAtInit;
[NTOS]: Combine ARM3 phase 0 and 1 even it means calling back into TurdMM for one function call. [NTOS]: Separate out platform-specific parts of ARM3 initialization instead of having everything in an arch-specific file. No functional code changes. svn path=/trunk/; revision=45547
2010-02-10 02:00:56 +00:00
[NTOS]: Move more functions from the i386 ARM3 directory to the portable/shared directory, since they apply to all architectures. [NTOS]: Refactor the mapping of the PTEs for the PFN database into MiMapPfnDatabase and move the code to portable directory. [NTOS]: Move and refactor some other definitions, and make some numbers more portable by defining arch-specific subvalues. [NTOS]: Make the PFN database actually 2 PFN Databases: MmPfnDatabase[0] which is the ReactOS mapping of PHYSICAL_PAGE structures, and MmPfnDatabase[1] which will be the ARM3 mapping of MMPFN structures. The latter is as-of-yet unused, but memory for it is now being reserved. svn path=/trunk/; revision=45566
2010-02-11 00:01:32 +00:00
#define MI_PFN_TO_PFNENTRY(x) (&MmPfnDatabase[1][x])
[NTOS]: Fix broken MI_PFNENTRY_TO_PFN macro. svn path=/trunk/; revision=45574
2010-02-11 18:31:54 +00:00
#define MI_PFNENTRY_TO_PFN(x) (x - MmPfnDatabase[1])
- Initialize the ARM pool (MiInitializeArmPool): - Do some additional accounting to keep track of initial nonpaged pool range and size. - Create and initialize the free page lists, and free page entries. - Validate that the initial nonpaged pool address space was properly mapped. - Validate that the expansion nonpaged pool address space is unmapped, and prepare to map it. svn path=/trunk/; revision=41527
2009-06-22 08:22:41 +00:00
- Collapse MmInit1 into MmInitSystem. - Check for ARM3-owned memory areas during a page fault, and crash the system as this shouldn't happen yet. - Use portable PTE macro instead of setting the owner bit directly, fixing an ARM port build issue. svn path=/trunk/; revision=43488
2009-10-15 19:12:43 +00:00
NTSTATUS
NTAPI
MmArmInitSystem(
IN ULONG Phase,
IN PLOADER_PARAMETER_BLOCK LoaderBlock
);
[NTOS]: Combine ARM3 phase 0 and 1 even it means calling back into TurdMM for one function call. [NTOS]: Separate out platform-specific parts of ARM3 initialization instead of having everything in an arch-specific file. No functional code changes. svn path=/trunk/; revision=45547
2010-02-10 02:00:56 +00:00
NTSTATUS
NTAPI
MiInitMachineDependent(
IN PLOADER_PARAMETER_BLOCK LoaderBlock
);
[NTOS]: Move more functions from the i386 ARM3 directory to the portable/shared directory, since they apply to all architectures. [NTOS]: Refactor the mapping of the PTEs for the PFN database into MiMapPfnDatabase and move the code to portable directory. [NTOS]: Move and refactor some other definitions, and make some numbers more portable by defining arch-specific subvalues. [NTOS]: Make the PFN database actually 2 PFN Databases: MmPfnDatabase[0] which is the ReactOS mapping of PHYSICAL_PAGE structures, and MmPfnDatabase[1] which will be the ARM3 mapping of MMPFN structures. The latter is as-of-yet unused, but memory for it is now being reserved. svn path=/trunk/; revision=45566
2010-02-11 00:01:32 +00:00
VOID
NTAPI
MiComputeColorInformation(
VOID
);
VOID
NTAPI
MiMapPfnDatabase(
IN PLOADER_PARAMETER_BLOCK LoaderBlock
);
VOID
NTAPI
MiInitializeColorTables(
VOID
);
VOID
NTAPI
MiInitializePfnDatabase(
IN PLOADER_PARAMETER_BLOCK LoaderBlock
);
[NTOS]: Make MM init read MmProductType to determine what SKU of ReactOS this is, instead of assuming Server. If you want to go back to the old behavior, you need to change "WinNT" to "ServerNT" in the hivesys under Product Type. [NTOS]: Configure the MmSystemSize variable properly based on SKU and RAM. Previously, ReactOS told all drivers and applications you were running on a system with < 13MB RAM. [NTOS]: Initialize thresholds for low and high memory (in pages), low and high paged pool memory, and low and high nonpaged pool memory. These are described in the source. [NTOS]: Initialize events for each of those thresholds, and populate the \KernelObject\xxxCondition events that are documented in MSDN for driver and app developers. [NTOS]: Define some internal thresholds to use later, representing the minimum number of free pages under we go berserk, and the minimum number of free pages that we consider "plenty". [NTOS]: Rename MiRemoveFromList to MiUnlinkFreeOrZeroedPage (Windows name). Make the function handle MmAvailablePages decrement, instead of having the caller do it. [NTOS]: Remove run-time initialization of the PFN lists, just initialize them statically (also fixes the fact we forgot to initialize their names). [NTOS]: Move some more initialization code to ARM3 instead of mm. [NTOS]: Read ProductType from registry into MmProductType instead of dummy value. Remove duplicate "Mirroring" variable read. svn path=/trunk/; revision=45638
2010-02-20 21:48:36 +00:00
BOOLEAN
NTAPI
MiInitializeMemoryEvents(
VOID
);
[NTOS]: MxGetNextPage is not platform-specific, so share it. [NTOS]: Factor out computations of NP sizes and limits into MiComputeNonPagedPoolVa. [NTOS]: Fix NP size/limit calculations to use the amount of FREE RAM, not the amount of INSTALLED RAM. [NTOS]: Use Windows 2003's algorithm for NP size on machines with more than 512MB of FREE RAM. [NTOS]: Partly handle the case of machines with NP over 128MB. svn path=/trunk/; revision=45556
2010-02-10 17:42:07 +00:00
PFN_NUMBER
NTAPI
MxGetNextPage(
IN PFN_NUMBER PageCount
);
[NTOS]: Combine ARM3 phase 0 and 1 even it means calling back into TurdMM for one function call. [NTOS]: Separate out platform-specific parts of ARM3 initialization instead of having everything in an arch-specific file. No functional code changes. svn path=/trunk/; revision=45547
2010-02-10 02:00:56 +00:00
PPHYSICAL_MEMORY_DESCRIPTOR
NTAPI
MmInitializeMemoryLimits(
IN PLOADER_PARAMETER_BLOCK LoaderBlock,
IN PBOOLEAN IncludeType
);
PFN_NUMBER
NTAPI
MiPagesInLoaderBlock(
IN PLOADER_PARAMETER_BLOCK LoaderBlock,
IN PBOOLEAN IncludeType
);
VOID
FASTCALL
MiSyncARM3WithROS(
IN PVOID AddressStart,
IN PVOID AddressEnd
);
- Collapse MmInit1 into MmInitSystem. - Check for ARM3-owned memory areas during a page fault, and crash the system as this shouldn't happen yet. - Use portable PTE macro instead of setting the owner bit directly, fixing an ARM port build issue. svn path=/trunk/; revision=43488
2009-10-15 19:12:43 +00:00
NTSTATUS
NTAPI
MmArmAccessFault(
IN BOOLEAN StoreInstruction,
IN PVOID Address,
IN KPROCESSOR_MODE Mode,
IN PVOID TrapInformation
);
- Initialize the ARM pool (MiInitializeArmPool): - Do some additional accounting to keep track of initial nonpaged pool range and size. - Create and initialize the free page lists, and free page entries. - Validate that the initial nonpaged pool address space was properly mapped. - Validate that the expansion nonpaged pool address space is unmapped, and prepare to map it. svn path=/trunk/; revision=41527
2009-06-22 08:22:41 +00:00
VOID
NTAPI
[NTOS]: Make MM init read MmProductType to determine what SKU of ReactOS this is, instead of assuming Server. If you want to go back to the old behavior, you need to change "WinNT" to "ServerNT" in the hivesys under Product Type. [NTOS]: Configure the MmSystemSize variable properly based on SKU and RAM. Previously, ReactOS told all drivers and applications you were running on a system with < 13MB RAM. [NTOS]: Initialize thresholds for low and high memory (in pages), low and high paged pool memory, and low and high nonpaged pool memory. These are described in the source. [NTOS]: Initialize events for each of those thresholds, and populate the \KernelObject\xxxCondition events that are documented in MSDN for driver and app developers. [NTOS]: Define some internal thresholds to use later, representing the minimum number of free pages under we go berserk, and the minimum number of free pages that we consider "plenty". [NTOS]: Rename MiRemoveFromList to MiUnlinkFreeOrZeroedPage (Windows name). Make the function handle MmAvailablePages decrement, instead of having the caller do it. [NTOS]: Remove run-time initialization of the PFN lists, just initialize them statically (also fixes the fact we forgot to initialize their names). [NTOS]: Move some more initialization code to ARM3 instead of mm. [NTOS]: Read ProductType from registry into MmProductType instead of dummy value. Remove duplicate "Mirroring" variable read. svn path=/trunk/; revision=45638
2010-02-20 21:48:36 +00:00
MiInitializeNonPagedPool(
VOID
);
VOID
NTAPI
MiInitializeNonPagedPoolThresholds(
VOID
);
VOID
NTAPI
MiInitializePoolEvents(
- Initialize the ARM pool (MiInitializeArmPool): - Do some additional accounting to keep track of initial nonpaged pool range and size. - Create and initialize the free page lists, and free page entries. - Validate that the initial nonpaged pool address space was properly mapped. - Validate that the expansion nonpaged pool address space is unmapped, and prepare to map it. svn path=/trunk/; revision=41527
2009-06-22 08:22:41 +00:00
VOID
);
- Fix incomplete comment due to accidental early-merge. svn path=/trunk/; revision=41931
2009-07-12 12:59:21 +00:00
VOID //
NTAPI //
InitializePool( //
IN POOL_TYPE PoolType,// FIXFIX: This should go in ex.h after the pool merge
IN ULONG Threshold //
); //
- Fix a critical bug in the German hack which was causing the last PDE not to be synched with the ReactOS Memory Manager (or worse, the first, if there was only one PDE). - Add a new file which will hold the executive layer above the pool allocator (the Ex* routines). - This should eventually be moved to \ex. - Note that the current ReactOS pool Ex* routines are in \mm, which is dead wrong. - Define the POOL_DESCRIPTOR and POOL_HEADER structures for the NT 5.2 pool. - Define, create, and implement the routine to initialize a pool vector. - For now, we assume you want the nonpaged pool vector/descriptor. - Call this routine from the ARM3 initialization routine. - No changes to system behavior other than the bugfix above. svn path=/trunk/; revision=41824
2009-07-09 09:33:49 +00:00
- Initialize nonpaged pool expansion system PTEs (MiInitializeSystemPtes): - Just supports expansion space for now, not system space. - Very basic initialization of the accounting structures required. - Sets up the first two system PTE clusters for the space (the first contains the linkage, the second contains the sizage). - Called from MiInitializeArmPool. svn path=/trunk/; revision=41528
2009-06-22 08:51:28 +00:00
VOID
NTAPI
MiInitializeSystemPtes(
IN PMMPTE StartingPte,
IN ULONG NumberOfPtes,
IN MMSYSTEM_PTE_POOL_TYPE PoolType
);
- Move ARM Pool to 0xB0000000 to avoid clashing with existing ReactOS address space components (shouldn't happen if things work right, but better safe than sorry). - Implement System PTE allocator (MiReserveAlignedSystemPtes and MiReserveSystemPtes). Very simple yet functional, no optimizes for now. - Allocate 32 zeoring PTEs from the System PTE pool. - Not used yet, only the allocation is made to test the current framework. - Tested on VirtualBox, QEMU and VMWare with RAM sizes from 128MB to 1536MB with no problems. svn path=/trunk/; revision=41575
2009-06-23 07:49:39 +00:00
PMMPTE
NTAPI
MiReserveSystemPtes(
IN ULONG NumberOfPtes,
IN MMSYSTEM_PTE_POOL_TYPE SystemPtePoolType
);
- Rewrite MmMapIoSpace and MmUnmapIoSpace to use System PTEs instead. - Much faster and cleaner (will be even faster when System PTE allocation is optimized). - Better handling of esoteric caching options, especially relevant for ARM. - Handled through the MiPlatformCacheAttributes, which should be defined differently for each platform (TODO). - Handles both I/O (device) and RAM physical memory. - Correct flushing of CPU caches (not a big deal on x86, but matters on ARM). svn path=/trunk/; revision=41628
2009-06-27 03:03:24 +00:00
VOID
NTAPI
MiReleaseSystemPtes(
IN PMMPTE StartingPte,
IN ULONG NumberOfPtes,
IN MMSYSTEM_PTE_POOL_TYPE SystemPtePoolType
);
- Reimplement MmAllocateContiguousMemory, MmAllocateContiguousMemorySpecifyCache, MmFreeContiguousMemory, MmFreeContiguousMemorySpecifyCache: - Use a smarter algorithm (as described here: http://www.microsoft.com/whdc/Driver/tips/ContigMem.mspx) to first try to satisfy the allocation by a simple nonpaged pool allocation (for cached requests only). - This range is then checked for physical continuity, since it's not guaranteed for non-initial-pool allocations (and right now in ReactOS, it never is). - As a fallback, Windows NT then attempts to scan free nonpaged pool pages. This is not yet implemented since the ReactOS nonpaged pool is not usually contiguous (to the level that NT's is). - When the ARM pool is implemented and replaces nonpaged pool, this code path will have to be implemented. - As a last resort, the actual PFN database is scanned for contiguous free pages. - ReactOS used MmGetContiguousPages for this, which blindly scanned the PFN database. New MiFindContinuousPages will scan the physical memory descriptor block recently implemented, which avoids going over pages we already know are going to be unusable. - The ReactOS function also held the PFN lock for the entire duration of the scan, which is significant on systems with large memory. Instead, we make an initial unsafe scan first, and only lock when we think we've found a correct range (and we'll then reconfirm the ranges). - Finally, the older function actually did a double-scan to try to avoid using memory ranges under 16MB, which was useless on today's systems and also rather inefficient. - Other than that, the actual setup of the PFN entry is copy-pasted from the old ReactOS function, so nothing's changed there -- the page still looks the same, but the selection algorithm is faster and more accurate. - Once the pages are found, we piggyback on the new I/O mapping mechanism (which uses System PTEs) instead of doing it all over by hand as before. - Since the underlying support is still System PTEs, once again, optimizations to that component will yield significant improvements here too. svn path=/trunk/; revision=41657
2009-06-28 05:43:12 +00:00
PFN_NUMBER
NTAPI
MiFindContiguousPages(
IN PFN_NUMBER LowestPfn,
IN PFN_NUMBER HighestPfn,
IN PFN_NUMBER BoundaryPfn,
IN PFN_NUMBER SizeInPages,
IN MEMORY_CACHING_TYPE CacheType
);
PVOID
NTAPI
MiCheckForContiguousMemory(
IN PVOID BaseAddress,
IN PFN_NUMBER BaseAddressPages,
IN PFN_NUMBER SizeInPages,
IN PFN_NUMBER LowestPfn,
IN PFN_NUMBER HighestPfn,
IN PFN_NUMBER BoundaryPfn,
IN MI_PFN_CACHE_ATTRIBUTE CacheAttribute
);
- Major rewrite of Memory Descriptor List (MDL) implementation (moving it towards using System PTEs). - MmCreateMdl, MmSizeOfMdl: No Change. - MmBuildMdlForNonPagedPool: Do not use MmGetPfnForProcess, just normal PMMPTE manipulation. - This seems to cause issues in certain scenarios, because in ReactOS, nonpaged pool, a resident and guaranteed resources, does not always have its PDEs mapped! - By calling MmGetPfnForProcess, this wound up in the annals of ReactOS mm code, which lazy-remapped the PDE. We detected this issue specifically in the cache manager, and fixed it there. It should not appear anywhere else. - MmAllocatePagesForMdl, MmAllocatePagesForMdlEx, MmFreePagesFromMdl: - The *Ex function is now implemented. - Allocating pages now uses MiAllocatePagesForMdl, which is based on the older MmAllocPagesSpecifyRange. - The code is cleaner, better commented, and better handles partial MDLs. - Cache flags are still ignored (so the Ex functionality isn't really there). - MmMapLockedPages, MmMapLockedPagesSpecifyCache, MmUnmapLockedPages: - These functions now use System PTEs for the mappings, instead of the hacked-up "MDL Mapping Space". - This frees up 256MB of Kernel Virtual Address Space. - Takes advantage of all System PTE functionality. - Once again, optimizations in the System PTE code will be felt here. - For user-space mappings however, the old code is still kept and used. - MiMapLockedPagesInUserSpace and MiUnMapLockedPagesInUserSpace are now in virtual.c and provide this. - MmProbeAndLockPages, MmUnlockPages: - The pages are actually probed now, in SEH. This did not seem to happen before (did someone misread the function's name?) - Probe for write is only done for write access to user pages (as documented). - We do not probe/check for write access for kernel requests (force Operation to be IoReadAccess). - Proper locking is used now: Address Space lock for user mappings, PFN lock for kernel mappings. - Faulting in pages (to make them available before locking) is now done outside the address space/PFN lock. - You don't want to be holding a spinlock/mutex while doing disk I/O! - For write/modify access, if the PTE is not writable, fail the request since the PTE protection overrides. - However, if the PTE is writable but also copy on write, then we'll fault the page in for write access, which is a legitimate operation for certain user-mode scenarios. - The old version always provided the CopyOnWrite behavior, even for non-CopyOnWrite pages! - Reference and lock every valid page that has a PFN entry (non-I/O Pages). - The older code did not seem to lock pages that had to be faulted in (weren't already valid). - Cleanup the cleanup code (no pun intended). Because we now mark the pages as locked early-on, and because of changes in MmUnlockPages, we can simply use MmUnlockPages in case of error, since it will be able to fully back-out and references/locks that we did. - Previous code attempted to do this on its own, in a pretty inconsistent manner, which would leave page leaks (both in references and lock count). - In MmUnlockPages, not as many changes, but we now: - Still make sure that an I/O Mapping MDL doesn't have valid PFN database pages (non-I/O). - An MDL can cover pages that are both I/O mapped and RAM mapped, so we have to unlock/dereference the latter instead of skipping them as the old code did. - Use the PFN lock when checking pages and unlocking/dereferencing them. - Overall, non-complete MDLs are now marked by having a -1 PFN, and the MDL code has been updated to early-break out of page-scanning loops and/or ignore such pages, which can happen in a sparse MDL. - Implementation has been tested on VMWare and QEMU for a variety of tasks and was found to be reliable and stable. svn path=/trunk/; revision=41707
2009-06-30 08:29:22 +00:00
PMDL
NTAPI
MiAllocatePagesForMdl(
IN PHYSICAL_ADDRESS LowAddress,
IN PHYSICAL_ADDRESS HighAddress,
IN PHYSICAL_ADDRESS SkipBytes,
IN SIZE_T TotalBytes,
IN MI_PFN_CACHE_ATTRIBUTE CacheAttribute,
IN ULONG Flags
);
PVOID
NTAPI
MiMapLockedPagesInUserSpace(
IN PMDL Mdl,
IN PVOID BaseVa,
IN MEMORY_CACHING_TYPE CacheType,
IN PVOID BaseAddress
);
VOID
NTAPI
MiUnmapLockedPagesInUserSpace(
IN PVOID BaseAddress,
IN PMDL Mdl
);
[NTOS]: Manage the PFN lists using the correct Flink/Blink semantics of the MMPFN structure, instead of typecasting a LIST_ENTRY on top of Flink and PteAddress. This allows PteAddress to be used now, and minimizes the number of differences between MMPFN and the ReactOS PHYSICAL_PAGE. [NTOS]: Zero pages starting at the head of the free list, insert them at the back. [NTOS]: Add MiInsertPageInFreeList to build the colored lists (not yet used) in the ARM3 PFN database. [NTOS]: Rename the ReactOS PFN lists for free/zero to their real names as used in Windows. svn path=/trunk/; revision=45634
2010-02-20 14:40:21 +00:00
VOID
NTAPI
MiInsertInListTail(
IN PMMPFNLIST ListHead,
IN PMMPFN Entry
);
[NTOS]: Insert pages into zero list with specific MiInsertZeroListAtBack function instead of generic MiInsertInTailList. Allows us to handle insertion into colored page lists (not yet used) correctly, as well as update the page location to ZeroedPageList automatically (so don't let the callers do this anymore). Also handle memory threshold accounting. svn path=/trunk/; revision=45645
2010-02-21 03:52:22 +00:00
VOID
NTAPI
MiInsertZeroListAtBack(
IN PFN_NUMBER PageIndex
);
[NTOS]: Manage the PFN lists using the correct Flink/Blink semantics of the MMPFN structure, instead of typecasting a LIST_ENTRY on top of Flink and PteAddress. This allows PteAddress to be used now, and minimizes the number of differences between MMPFN and the ReactOS PHYSICAL_PAGE. [NTOS]: Zero pages starting at the head of the free list, insert them at the back. [NTOS]: Add MiInsertPageInFreeList to build the colored lists (not yet used) in the ARM3 PFN database. [NTOS]: Rename the ReactOS PFN lists for free/zero to their real names as used in Windows. svn path=/trunk/; revision=45634
2010-02-20 14:40:21 +00:00
VOID
NTAPI
[NTOS]: Make MM init read MmProductType to determine what SKU of ReactOS this is, instead of assuming Server. If you want to go back to the old behavior, you need to change "WinNT" to "ServerNT" in the hivesys under Product Type. [NTOS]: Configure the MmSystemSize variable properly based on SKU and RAM. Previously, ReactOS told all drivers and applications you were running on a system with < 13MB RAM. [NTOS]: Initialize thresholds for low and high memory (in pages), low and high paged pool memory, and low and high nonpaged pool memory. These are described in the source. [NTOS]: Initialize events for each of those thresholds, and populate the \KernelObject\xxxCondition events that are documented in MSDN for driver and app developers. [NTOS]: Define some internal thresholds to use later, representing the minimum number of free pages under we go berserk, and the minimum number of free pages that we consider "plenty". [NTOS]: Rename MiRemoveFromList to MiUnlinkFreeOrZeroedPage (Windows name). Make the function handle MmAvailablePages decrement, instead of having the caller do it. [NTOS]: Remove run-time initialization of the PFN lists, just initialize them statically (also fixes the fact we forgot to initialize their names). [NTOS]: Move some more initialization code to ARM3 instead of mm. [NTOS]: Read ProductType from registry into MmProductType instead of dummy value. Remove duplicate "Mirroring" variable read. svn path=/trunk/; revision=45638
2010-02-20 21:48:36 +00:00
MiUnlinkFreeOrZeroedPage(
[NTOS]: Manage the PFN lists using the correct Flink/Blink semantics of the MMPFN structure, instead of typecasting a LIST_ENTRY on top of Flink and PteAddress. This allows PteAddress to be used now, and minimizes the number of differences between MMPFN and the ReactOS PHYSICAL_PAGE. [NTOS]: Zero pages starting at the head of the free list, insert them at the back. [NTOS]: Add MiInsertPageInFreeList to build the colored lists (not yet used) in the ARM3 PFN database. [NTOS]: Rename the ReactOS PFN lists for free/zero to their real names as used in Windows. svn path=/trunk/; revision=45634
2010-02-20 14:40:21 +00:00
IN PMMPFN Entry
);
PMMPFN
NTAPI
MiRemoveHeadList(
IN PMMPFNLIST ListHead
);
VOID
NTAPI
MiInsertPageInFreeList(
IN PFN_NUMBER PageFrameIndex
);
- Begin the implementation of the ARM Pool Manager, a replacement for the ReactOS nonpaged pool. - Define the nonpaged system address space as done on Windows (see init.c for a brief introduction and source reading materials on this). - Size up the ARM pool as done on Windows (again, see init.c for documentation on this). - Create the PDEs for the expansion pool and the initial pool. - Allocate the pages for the initial pool, and map them. - Unlike ReactOS, ARM³ does the right thing and uses physically continuous pages. - Define two new static MEMORY_AREAs for the expansion and initial ARM pool. - No actual pool code/implementation is available yet, we are just slicing up the address space for now (mhmm... cake!)*. * There is no cake. svn path=/trunk/; revision=41525
2009-06-22 06:16:57 +00:00
/* EOF */
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