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- For one thing, fix build in ARM3/init.c (sorry!)

Browse source 
- Secondly, initialize hyperspace in ARM³ now, at the correct place:
  - Also, create the hyperspace PDE here, and not in FreeLDR, which was incorrect in the first place.
    - This might help booting Windows/WinLDR.
- Install-tested w/ networking, with no issues found, on:
  - Virtual Box 2.4
  - VMWare 6.5
  - QEMU 0.9.0
- PEBKAC?


svn path=/trunk/; revision=41573
This commit is contained in:
ReactOS Portable Systems Group 2009-06-23 06:39:10 +00:00
parent fbca42cd9f
commit 52fc282ff3
9 changed files with 34 additions and 54 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
reactos/boot/freeldr/freeldr/arch/arm/boot.s
View file

@ -149,10 +149,5 @@ MasterTranslationTable:
.space 0x0400 // 0xYYYYYYYY->0xC10FFFFF
.space 0x0C00 // PADDING FOR 4KB GRANULARITY
.global HyperSpaceTranslationTable
HyperSpaceTranslationTable:
.space 0x0400 // 0xYYYYYYYY->0xC10FFFFF
.space 0x0C00 // PADDING FOR 4KB GRANULARITY
.global TranslationTableEnd
TranslationTableEnd:

17
reactos/boot/freeldr/freeldr/arch/arm/loader.c
View file

@ -42,7 +42,7 @@ PCHAR ArmSharedHeap;
extern ADDRESS_RANGE ArmBoardMemoryMap[16];
extern ULONG ArmBoardMemoryMapRangeCount;
extern ARM_TRANSLATION_TABLE ArmTranslationTable;
extern ARM_COARSE_PAGE_TABLE BootTranslationTable, KernelTranslationTable, FlatMapTranslationTable, MasterTranslationTable, HyperSpaceTranslationTable;
extern ARM_COARSE_PAGE_TABLE BootTranslationTable, KernelTranslationTable, FlatMapTranslationTable, MasterTranslationTable;
extern ROS_KERNEL_ENTRY_POINT KernelEntryPoint;
extern ULONG_PTR KernelBase;
extern ULONG_PTR AnsiData, OemData, UnicodeData, RegistryData, KernelData, HalData, DriverData[16];
@ -683,7 +683,7 @@ ArmSetupPageDirectory(VOID)
ARM_PTE Pte;
ULONG i, j;
PARM_TRANSLATION_TABLE ArmTable;
PARM_COARSE_PAGE_TABLE BootTable, KernelTable, FlatMapTable, MasterTable, HyperSpaceTable;
PARM_COARSE_PAGE_TABLE BootTable, KernelTable, FlatMapTable, MasterTable;
//
// Get the PDEs that we will use
@ -693,7 +693,6 @@ ArmSetupPageDirectory(VOID)
KernelTable = &KernelTranslationTable;
FlatMapTable = &FlatMapTranslationTable;
MasterTable = &MasterTranslationTable;
HyperSpaceTable = &HyperSpaceTranslationTable;
//
// Set the master L1 PDE as the TTB
@ -810,12 +809,6 @@ ArmSetupPageDirectory(VOID)
//
Pte.L1.Coarse.BaseAddress = (ULONG)MasterTable >> CPT_SHIFT;
ArmTable->Pte[PDE_BASE >> PDE_SHIFT] = Pte;
//
// Now create the template for the hyperspace table which maps 1MB
//
Pte.L1.Coarse.BaseAddress = (ULONG)HyperSpaceTable >> CPT_SHIFT;
ArmTable->Pte[HYPER_SPACE >> PDE_SHIFT] = Pte;
//
// Now create the template for the coarse page tables which map the first 8MB
@ -983,12 +976,6 @@ ArmSetupPageDirectory(VOID)
Pte.L2.Small.BaseAddress = (ULONG)&MasterTranslationTable >> PTE_SHIFT;
FlatMapTable->Pte[16] = Pte;
//
// And finally for the 0xC1100000 region (1MB)
//
Pte.L2.Small.BaseAddress = (ULONG)&HyperSpaceTranslationTable >> PTE_SHIFT;
FlatMapTable->Pte[17] = Pte;
//
// Now we handle the master translation area for our PDEs. We'll just make
// the 4 page tables point to the ARM TTB.

6
reactos/boot/freeldr/freeldr/arch/i386/loader.c
View file

@ -27,7 +27,6 @@
extern PAGE_DIRECTORY_X86 startup_pagedirectory;
extern PAGE_DIRECTORY_X86 lowmem_pagetable;
extern PAGE_DIRECTORY_X86 kernel_pagetable;
extern PAGE_DIRECTORY_X86 hyperspace_pagetable;
extern PAGE_DIRECTORY_X86 apic_pagetable;
extern PAGE_DIRECTORY_X86 kpcr_pagetable;
extern PAGE_DIRECTORY_X86 kuser_pagetable;
@ -150,11 +149,6 @@ FrLdrSetupPageDirectory(VOID)
PageDir->Pde[StartupPageTableIndex].Write = 1;
PageDir->Pde[StartupPageTableIndex].PageFrameNumber = PaPtrToPfn(startup_pagedirectory);
/* Set up the Hyperspace PDE */
PageDir->Pde[HyperspacePageTableIndex].Valid = 1;
PageDir->Pde[HyperspacePageTableIndex].Write = 1;
PageDir->Pde[HyperspacePageTableIndex].PageFrameNumber = PaPtrToPfn(hyperspace_pagetable);
/* Set up the HAL PDE */
PageDir->Pde[HalPageTableIndex].Valid = 1;
PageDir->Pde[HalPageTableIndex].Write = 1;

4
reactos/boot/freeldr/freeldr/arch/i386/mb.S
View file

@ -34,7 +34,6 @@
.globl _startup_pagedirectory
.globl _lowmem_pagetable
.globl _kernel_pagetable
.globl _hyperspace_pagetable
.globl _apic_pagetable
.globl _kpcr_pagetable
.globl _kuser_pagetable
@ -64,9 +63,6 @@ _lowmem_pagetable:
_kernel_pagetable:
.fill 2*4096, 1, 0
_hyperspace_pagetable:
.fill 4096, 1, 0
_apic_pagetable:
.fill 4096, 1, 0

2
reactos/boot/freeldr/freeldr/include/reactos.h
View file

@ -41,13 +41,11 @@
((p) >> PFN_SHIFT)
#define STARTUP_BASE 0xC0000000
#define HYPERSPACE_BASE 0xC0400000
#define HAL_BASE 0xFFC00000
#define APIC_BASE 0xFFFE0000
#define LowMemPageTableIndex 0
#define StartupPageTableIndex (STARTUP_BASE >> 22)
#define HyperspacePageTableIndex (HYPERSPACE_BASE >> 22)
#define HalPageTableIndex (HAL_BASE >> 22)
typedef struct _PAGE_DIRECTORY_X86

31
reactos/ntoskrnl/mm/ARM3/init.c
View file

@ -297,7 +297,8 @@ MmArmInitSystem(IN ULONG Phase,
PageFrameIndex = MmGetContinuousPages(MmSizeOfNonPagedPoolInBytes,
Low,
High,
BoundaryAddressMultiple);
BoundaryAddressMultiple,
FALSE);
ASSERT(PageFrameIndex != 0);
DPRINT1("NP VA begins at: %p and ends at: %p\n",
MmNonPagedPoolStart,
@ -448,6 +449,34 @@ MmArmInitSystem(IN ULONG Phase,
// Create the system PTE space
//
MiInitializeSystemPtes(PointerPte, MmNumberOfSystemPtes, SystemPteSpace);
//
// Get the PDE For hyperspace
//
StartPde = MiAddressToPde(HYPER_SPACE);
//
// Allocate a page for it and create it
//
PageFrameIndex = MmAllocPage(MC_SYSTEM, 0);
TempPde.u.Hard.PageFrameNumber = PageFrameIndex;
TempPde.u.Hard.Global = FALSE; // Hyperspace is local!
ASSERT(StartPde->u.Hard.Valid == 0);
ASSERT(TempPde.u.Hard.Valid == 1);
*StartPde = TempPde;
//
// Zero out the page table now
//
PointerPte = MiAddressToPte(HYPER_SPACE);
RtlZeroMemory(PointerPte, PAGE_SIZE);
//
// Setup the mapping PTEs
//
MmFirstReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_START);
MmLastReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_END);
MmFirstReservedMappingPte->u.Hard.PageFrameNumber = MI_HYPERSPACE_PTES;
}
//

1
reactos/ntoskrnl/mm/ARM3/miarm.h
View file

@ -26,6 +26,7 @@ extern ULONG MmSizeOfNonPagedPoolInBytes;
extern ULONG MmMaximumNonPagedPoolInBytes;
extern PVOID MmNonPagedPoolStart;
extern PVOID MmNonPagedPoolExpansionStart;
extern PMMPTE MmFirstReservedMappingPte, MmLastReservedMappingPte;
VOID
NTAPI

19
reactos/ntoskrnl/mm/hypermap.c
View file

@ -14,30 +14,13 @@
/* GLOBALS ********************************************************************/
PMMPTE MmFirstReservedMappingPte;
PMMPTE MmLastReservedMappingPte;
PMMPTE MmFirstReservedMappingPte, MmLastReservedMappingPte;
MMPTE HyperTemplatePte;
PEPROCESS HyperProcess;
KIRQL HyperIrql;
/* PRIVATE FUNCTIONS **********************************************************/
VOID
NTAPI
MiInitHyperSpace(VOID)
{
PMMPTE PointerPte;
/* Get the hyperspace PTE and zero out the page table */
PointerPte = MiAddressToPte(HYPER_SPACE);
RtlZeroMemory(PointerPte, PAGE_SIZE);
/* Setup mapping PTEs */
MmFirstReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_START);
MmLastReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_END);
MmFirstReservedMappingPte->u.Hard.PageFrameNumber = MI_HYPERSPACE_PTES;
}
PVOID
NTAPI
MiMapPageInHyperSpace(IN PEPROCESS Process,

3
reactos/ntoskrnl/mm/mminit.c
View file

@ -375,9 +375,6 @@ MmInit1(VOID)
/* Intialize system memory areas */
MiInitSystemMemoryAreas();
/* Initialize hyperspace */
MiInitHyperSpace();
/* Initialize the page list */
MmInitializePageList();