Ori Bernstein 5b8b5884f4 5l: fix shifts by zero ... on arm32, we can do one of 4 shifts by a constant: reg<<(0..31) reg>>(1..32) ((u32int)reg)>>(1..32) reg ROT (0..31) There's no way to encode a 0 bit right shift, so when encoding reg>>0, flip it to the equivalent nop reg<<0, which can be encoded.		2021-01-23 20:36:09 -08:00
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doc	/sys/doc: fix mkfile to and remove files that now can be regenerated	2017-05-09 16:23:48 +02:00
games/lib	fortunes: As much as I'd love to I feel I have to let it go -- rminnich	2020-04-18 21:37:53 -04:00
include	[9front] ape: remove _SUSV2_SOURCE guard from inttypes.h	2021-01-23 19:47:12 -08:00
lib	dpost prologue: update /radicalex to fix square displacement (thanks umbraticus and Ethan)	2021-01-17 14:02:17 +01:00
man	[9front] nusb(4): fix typo	2021-01-23 19:46:57 -08:00
src	5l: fix shifts by zero	2021-01-23 20:36:09 -08:00