fork of 9front i guess
![]() Port Reset R/W. 1=Port is in Reset. 0=Port is not in Reset. Default = 0. When software writes a one to this bit (from a zero), the bus reset sequence as defined in the USB Specification Revision 2.0 is started. Software writes a zero to this bit to terminate the bus reset sequence. Software must keep this bit at a one long enough to ensure the reset sequence, as specified in the USB Specification Revision 2.0, completes. Note: when software writes this bit to a one, it must also write a zero to the Port Enable bit. Note that when software writes a zero to this bit there may be a delay before the bit status changes to a zero. The bit status will not read as a zero until after the reset has completed. |
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386 | ||
68000 | ||
68020 | ||
acme | ||
adm/timezone | ||
alpha | ||
amd64 | ||
arm | ||
lib | ||
mips | ||
power | ||
power64 | ||
rc | ||
sparc | ||
sparc64 | ||
sys | ||
.hgignore |