fork of 9front i guess
Find a file
cinap_lenrek 12ecb3e568 usbehci: fix portreset.
Port Reset R/W. 1=Port is in Reset. 0=Port is not in Reset. Default = 0. When
software writes a one to this bit (from a zero), the bus reset sequence as defined in the
USB Specification Revision 2.0 is started. Software writes a zero to this bit to terminate
the bus reset sequence. Software must keep this bit at a one long enough to ensure the
reset sequence, as specified in the USB Specification Revision 2.0, completes. Note:
when software writes this bit to a one, it must also write a zero to the Port Enable bit.
Note that when software writes a zero to this bit there may be a delay before the bit
status changes to a zero. The bit status will not read as a zero until after the reset
has completed.
2013-08-27 19:01:41 +02:00
386
68000
68020
acme acme: fix more error messages 2013-04-28 00:19:35 +02:00
adm/timezone
alpha
amd64
arm
lib fortunes: seems that so much is up on the net, it is hard to comprehend it all. 2013-08-22 12:15:29 -04:00
mips
power
power64
rc tcp113: fix null list in concatenation error 2013-08-10 08:55:39 +02:00
sparc
sparc64
sys usbehci: fix portreset. 2013-08-27 19:01:41 +02:00
.hgignore hgignore: ignore stuff in /lib/rfc 2013-06-09 11:16:33 -04:00