cinap_lenrek
b46a0e97ea
5a: assemble constant >>0 right shifts as <<0 (no shift), allow >>32
...
previously, right shift >>0 resulted in >>32 being emited. this
is especially problematic when the shift count comes from a macro
expansion.
we now handle constant shift >>0 as <<0 (no shift) and allow
shift by 32 be specified.
this applies to logical right shift (>>) arithmetic right shift (->)
and right rotate (@>).
2016-09-03 17:11:38 +02:00
cinap_lenrek
de1e74abd2
5a: ROL instruction
2016-07-15 15:04:32 +02:00
cinap_lenrek
98e3e12d92
5a: revert MOVM .S and .W are exclusive (broke bcm build)
2014-08-17 04:26:28 +02:00
cinap_lenrek
30d4d8984b
5a: MOVM.IA.W.S ..., [R15] is exception return and needs to be allowed (thanks aiju)
2014-08-09 18:23:14 +02:00
cinap_lenrek
3472f91129
5a: reject MOVM instruction with .S and .W bits both set (aijus idea)
2014-08-09 22:47:46 +02:00
cinap_lenrek
d304dc8119
5a, 5l: add LDREX/STREX/CLREX instructions
2014-08-07 20:22:00 +02:00
cinap_lenrek
87fd5240f0
remove old copies of kernels l.s from cmd/?a
2014-05-08 18:48:51 +02:00
cinap_lenrek
4f33c88a51
import updated compilers from sources
2012-07-30 19:11:16 +02:00
Taru Karttunen
a9060cc06b
Import sources from 2011-03-30 iso image - lib
2011-03-30 19:35:09 +03:00
Taru Karttunen
e5888a1ffd
Import sources from 2011-03-30 iso image
2011-03-30 15:46:40 +03:00
