5a: assemble constant >>0 right shifts as <<0 (no shift), allow >>32
previously, right shift >>0 resulted in >>32 being emited. this is especially problematic when the shift count comes from a macro expansion. we now handle constant shift >>0 as <<0 (no shift) and allow shift by 32 be specified. this applies to logical right shift (>>) arithmetic right shift (->) and right rotate (@>).
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1 changed files with 14 additions and 7 deletions
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@ -469,27 +469,34 @@ regreg:
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shift:
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spreg '<' '<' rcon
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{
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nullshift:
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$$ = nullgen;
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$$.type = D_SHIFT;
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$$.offset = $1 | $4 | (0 << 5);
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$$.offset = $1 | ($4 & ~(32<<7)) | (0 << 5);
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}
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| spreg '>' '>' rcon
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{
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if($4 == 0)
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goto nullshift;
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$$ = nullgen;
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$$.type = D_SHIFT;
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$$.offset = $1 | $4 | (1 << 5);
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$$.offset = $1 | ($4 & ~(32<<7)) | (1 << 5);
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}
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| spreg '-' '>' rcon
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{
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if($4 == 0)
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goto nullshift;
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$$ = nullgen;
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$$.type = D_SHIFT;
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$$.offset = $1 | $4 | (2 << 5);
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$$.offset = $1 | ($4 & ~(32<<7)) | (2 << 5);
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}
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| spreg LAT '>' rcon
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{
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if($4 == 0)
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goto nullshift;
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$$ = nullgen;
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$$.type = D_SHIFT;
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$$.offset = $1 | $4 | (3 << 5);
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$$.offset = $1 | ($4 & ~(32<<7)) | (3 << 5);
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}
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rcon:
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@ -497,13 +504,13 @@ rcon:
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{
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if($$ < 0 || $$ >= 16)
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print("register value out of range\n");
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$$ = (($1&15) << 8) | (1 << 4);
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$$ = ($1 << 8) | (1 << 4);
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}
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| con
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{
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if($$ < 0 || $$ >= 32)
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if($$ < 0 || $$ > 32)
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print("shift value out of range\n");
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$$ = ($1&31) << 7;
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$$ = ($1 << 7);
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}
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sreg:
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