3 commits

Author	SHA1	Message	Date
cinap_lenrek	b46a0e97ea	5a: assemble constant >>0 right shifts as <<0 (no shift), allow >>32 ... previously, right shift >>0 resulted in >>32 being emited. this is especially problematic when the shift count comes from a macro expansion. we now handle constant shift >>0 as <<0 (no shift) and allow shift by 32 be specified. this applies to logical right shift (>>) arithmetic right shift (->) and right rotate (@>).	2016-09-03 17:11:38 +02:00
Taru Karttunen	a9060cc06b	Import sources from 2011-03-30 iso image - lib	2011-03-30 19:35:09 +03:00
Taru Karttunen	e5888a1ffd	Import sources from 2011-03-30 iso image	2011-03-30 15:46:40 +03:00