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bcm: cleanup timer code

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- calculate hardcoded constants for more clarity
- avoid unneccesary modification of cntpns ctl register
- revert enabling IRQcntpns for cpu0
- remove unused Localintpending register offset constant
This commit is contained in:
cinap_lenrek 2018-11-07 17:02:09 +01:00
parent 385f52183c
commit c0d21d35b1
1 changed files with 17 additions and 12 deletions
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27
sys/src/9/bcm/clock.c
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@ -28,7 +28,6 @@ enum {
Localctl = 0x00, Localctl = 0x00,
Prescaler = 0x08, Prescaler = 0x08,
Localintpending = 0x60,
SystimerFreq = 1*Mhz, SystimerFreq = 1*Mhz,
MaxPeriod = SystimerFreq / HZ, MaxPeriod = SystimerFreq / HZ,
@ -98,7 +97,6 @@ localclockintr(Ureg *ureg, void *)
{ {
if(m->machno == 0) if(m->machno == 0)
panic("cpu0: Unexpected local generic timer interrupt"); panic("cpu0: Unexpected local generic timer interrupt");
cpwrsc(0, CpTIMER, CpTIMERphys, CpTIMERphysctl, Imask);
timerintr(ureg, 0); timerintr(ureg, 0);
} }
@ -116,24 +114,30 @@ clockinit(void)
{ {
Systimers *tn; Systimers *tn;
Armtimer *tm; Armtimer *tm;
u32int t0, t1, tstart, tend; ulong t0, t1, tstart, tend;
if(((cprdsc(0, CpID, CpIDfeat, 1) >> 16) & 0xF) != 0) { if(((cprdsc(0, CpID, CpIDfeat, 1) >> 16) & 0xF) != 0) {
/* generic timer supported */ /* generic timer supported */
cpwrsc(0, CpTIMER, CpTIMERphys, CpTIMERphysval, ~0);
if(m->machno == 0){ if(m->machno == 0){
*(ulong*)(ARMLOCAL + Localctl) = 0; /* input clock is 19.2Mhz crystal */
*(ulong*)(ARMLOCAL + Prescaler) = 0x06aaaaab; /* divide by (2^31/Prescaler) for 1Mhz */
}
cpwrsc(0, CpTIMER, CpTIMERphys, CpTIMERphysctl, Imask); cpwrsc(0, CpTIMER, CpTIMERphys, CpTIMERphysctl, Imask);
/* input clock is 19.2Mhz crystal */
*(ulong*)(ARMLOCAL + Localctl) = 0;
/* divide by (2^31/Prescaler) */
*(ulong*)(ARMLOCAL + Prescaler) = (((uvlong)SystimerFreq<<31)/19200000)&~1UL;
} else {
cpwrsc(0, CpTIMER, CpTIMERphys, CpTIMERphysctl, Enable);
intrenable(IRQcntpns, localclockintr, nil, 0, "clock"); intrenable(IRQcntpns, localclockintr, nil, 0, "clock");
} }
}
tn = (Systimers*)SYSTIMERS; tn = (Systimers*)SYSTIMERS;
tstart = tn->clo; tstart = tn->clo;
do{ do{
t0 = lcycles(); t0 = lcycles();
}while(tn->clo == tstart); }while(tn->clo == tstart);
tend = tstart + 10000; tend = tstart + (SystimerFreq/100);
do{ do{
t1 = lcycles(); t1 = lcycles();
}while(tn->clo != tend); }while(tn->clo != tend);
@ -141,12 +145,14 @@ clockinit(void)
m->cpuhz = 100 * t1; m->cpuhz = 100 * t1;
m->cpumhz = (m->cpuhz + Mhz/2 - 1) / Mhz; m->cpumhz = (m->cpuhz + Mhz/2 - 1) / Mhz;
m->cyclefreq = m->cpuhz; m->cyclefreq = m->cpuhz;
if(m->machno == 0){ if(m->machno == 0){
tn->c3 = tn->clo - 1; tn->c3 = tn->clo - 1;
intrenable(IRQtimer3, clockintr, nil, 0, "clock");
tm = (Armtimer*)ARMTIMER; tm = (Armtimer*)ARMTIMER;
tm->load = 0; tm->load = 0;
tm->ctl = TmrPrescale1|CntEnable|CntWidth32; tm->ctl = TmrPrescale1|CntEnable|CntWidth32;
intrenable(IRQtimer3, clockintr, nil, 0, "clock");
} }
} }
@ -163,10 +169,9 @@ timerset(uvlong next)
period = MinPeriod; period = MinPeriod;
else if(period > MaxPeriod) else if(period > MaxPeriod)
period = MaxPeriod; period = MaxPeriod;
if(m->machno > 0){ if(m->machno)
cpwrsc(0, CpTIMER, CpTIMERphys, CpTIMERphysval, period); cpwrsc(0, CpTIMER, CpTIMERphys, CpTIMERphysval, period);
cpwrsc(0, CpTIMER, CpTIMERphys, CpTIMERphysctl, Enable); else{
}else{
tn = (Systimers*)SYSTIMERS; tn = (Systimers*)SYSTIMERS;
tn->c3 = tn->clo + period; tn->c3 = tn->clo + period;
} }