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bcm: set XN bits for kernel device mappings

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This commit is contained in:
cinap_lenrek 2019-08-21 18:28:01 +02:00
parent 6280c0f17b
commit b4cb19235e
2 changed files with 4 additions and 3 deletions
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1
sys/src/9/bcm/arm.h
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@ -290,6 +290,7 @@
#define L1wralloc (1<<12) /* L1 TEX */
#define L1sharable (1<<16)
#define L1noexec (1<<4)
#define L2wralloc (1<<6) /* L2 TEX (small pages) */
#define L2sharable (1<<10)

6
sys/src/9/bcm/mmu.c
View file

@ -51,12 +51,12 @@ mmuinit(void *a)
*/
va = soc.virtio;
for(pa = soc.physio; pa < soc.physio+soc.iosize; pa += MiB){
l1[L1X(va)] = pa|Dom0|L1AP(Krw)|Section;
l1[L1X(va)] = pa|Dom0|L1AP(Krw)|Section|L1noexec;
va += MiB;
}
pa = soc.armlocal;
if(pa)
l1[L1X(va)] = pa|Dom0|L1AP(Krw)|Section;
l1[L1X(va)] = pa|Dom0|L1AP(Krw)|Section|L1noexec;
/*
* double map exception vectors near top of virtual memory
@ -326,7 +326,7 @@ mmukmap(uintptr va, uintptr pa, usize size)
return 0;
pte = pte0;
for(n = 0; n < size; n += MiB){
*pte++ = (pa+n)|Dom0|L1AP(Krw)|Section;
*pte++ = (pa+n)|Dom0|L1AP(Krw)|Section|L1noexec;
mmuinvalidateaddr(va+n);
}
cachedwbtlb(pte0, (uintptr)pte - (uintptr)pte0);