imx8: reset lcdif and sn65sdi86 bridge before init
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parent
739e15c178
commit
34dab15f40
1 changed files with 19 additions and 2 deletions
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@ -440,6 +440,14 @@ dsiparams(struct dsi_cfg *cfg, int lanes, int hs_clk, int ref_clk, int tx_esc_cl
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cfg->wakeup_ps = 1000000000000LL;
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cfg->wakeup_ps = 1000000000000LL;
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}
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}
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static void
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lcdifreset(void)
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{
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wr(lcdif, LCDIF_CTRL_SET, CTRL_SFTRST);
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delay(1);
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wr(lcdif, LCDIF_CTRL_SET, CTRL_CLKGATE);
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}
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static void
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static void
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lcdifinit(struct video_mode *mode)
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lcdifinit(struct video_mode *mode)
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{
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{
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@ -501,6 +509,11 @@ bridgeinit(I2Cdev *dev, struct video_mode *mode, struct dsi_cfg *cfg)
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{
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{
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int n;
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int n;
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// soft reset
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i2cwritebyte(dev, 0x09, 1);
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while(i2creadbyte(dev, 0x09) & 1)
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;
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// clock derived from dsi clock
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// clock derived from dsi clock
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switch(cfg->hs_clk/2000000){
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switch(cfg->hs_clk/2000000){
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case 384:
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case 384:
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@ -838,8 +851,10 @@ lcdinit(void)
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gpioout(GPIO_PIN(3, 20), 1);
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gpioout(GPIO_PIN(3, 20), 1);
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bridge = i2cdev(i2cbus("i2c4"), 0x2C);
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bridge = i2cdev(i2cbus("i2c4"), 0x2C);
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if(bridge == nil)
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if(bridge == nil){
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return;
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err = "could not find bridge";
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goto out;
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}
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bridge->subaddr = 1;
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bridge->subaddr = 1;
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/* power on mipi dsi */
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/* power on mipi dsi */
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@ -858,6 +873,8 @@ lcdinit(void)
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setclkgate("disp.axi_clk", 1);
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setclkgate("disp.axi_clk", 1);
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setclkgate("sim_display.mainclk", 1);
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setclkgate("sim_display.mainclk", 1);
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lcdifreset();
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setclkrate("mipi.core", "system_pll1_div3", 266*Mhz);
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setclkrate("mipi.core", "system_pll1_div3", 266*Mhz);
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setclkrate("mipi.CLKREF", "system_pll2_clk", 25*Mhz);
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setclkrate("mipi.CLKREF", "system_pll2_clk", 25*Mhz);
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setclkrate("mipi.RxClkEsc", "system_pll1_clk", 80*Mhz);
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setclkrate("mipi.RxClkEsc", "system_pll1_clk", 80*Mhz);
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