pc64: move VMAP into its own PDP (for vmware)

modifying the kernel pdp (CPU0PDP) hangs vmware. so
we initialize the pdp with KZERO and KZERO+1GB map
in l.s and never change it. (except when removing
the zero double map which seems to work).

VMAP has its own pdp now allowing to map 512GB of
physical address space. this simplifies the code
a bit and gives nice virtual addresses.
This commit is contained in:
cinap_lenrek 2014-02-15 06:17:05 +01:00
parent 1d64be1984
commit 32604cd830
4 changed files with 23 additions and 14 deletions

View file

@ -86,11 +86,18 @@ TEXT _warp64<>(SB), 1, $-4
MOVL DX, PML4O(KZERO)(AX) /* PML4E for KZERO */ MOVL DX, PML4O(KZERO)(AX) /* PML4E for KZERO */
ADDL $PTSZ, AX /* PDP at PML4 + PTSZ */ ADDL $PTSZ, AX /* PDP at PML4 + PTSZ */
ADDL $PTSZ, DX /* PD at PML4 + 2*PTSZ */ ADDL $PTSZ, DX /* PD0 at PML4 + 2*PTSZ */
MOVL DX, PDPO(0)(AX) /* PDPE for double-map */ MOVL DX, PDPO(0)(AX) /* PDPE for double-map */
MOVL DX, PDPO(KZERO)(AX) /* PDPE for KZERO */ MOVL DX, PDPO(KZERO)(AX) /* PDPE for KZERO */
ADDL $PTSZ, AX /* PD at PML4 + 2*PTSZ */ /*
* add PDPE for KZERO+1GB early as Vmware
* hangs when modifying kernel PDP
*/
ADDL $PTSZ, DX /* PD1 */
MOVL DX, PDPO(KZERO+GiB)(AX)
ADDL $PTSZ, AX /* PD0 at PML4 + 2*PTSZ */
MOVL $(PTESIZE|PTEGLOBAL|PTEWRITE|PTEVALID), DX MOVL $(PTESIZE|PTEGLOBAL|PTEWRITE|PTEVALID), DX
MOVL DX, PDO(0)(AX) /* PDE for double-map */ MOVL DX, PDO(0)(AX) /* PDE for double-map */

View file

@ -52,13 +52,13 @@
/* /*
* Address spaces. Kernel, sorted by address. * Address spaces. Kernel, sorted by address.
*/ */
#define KZERO (0xffffffff80000000ull) /* 2GB identity map of lower 2GB ram */ #define KZERO (0xffffffff80000000ull)
#define KTZERO (KZERO+1*MiB+64*KiB) #define KTZERO (KZERO+1*MiB+64*KiB)
#define VMAP (0xffffffff00000000ull) /* 2GB identity map of upper 2GB ram */ #define VMAP (0xffffff0000000000ull)
#define VMAPSIZE (2*GiB) #define VMAPSIZE (512*GiB)
#define KMAP (0xffffff7f00000000ull) /* 2MB for per process temporary kernel mappings */ #define KMAP (0xfffffe8000000000ull)
#define KMAPSIZE (2*MiB) #define KMAPSIZE (2*MiB)
/* /*
@ -68,8 +68,14 @@
#define APBOOTSTRAP (KZERO+0x3000ull) /* AP bootstrap code */ #define APBOOTSTRAP (KZERO+0x3000ull) /* AP bootstrap code */
#define IDTADDR (KZERO+0x10000ull) /* idt */ #define IDTADDR (KZERO+0x10000ull) /* idt */
#define REBOOTADDR (0x11000) /* reboot code - physical address */ #define REBOOTADDR (0x11000) /* reboot code - physical address */
#define CPU0PML4 (KZERO+0x13000ull) #define CPU0PML4 (KZERO+0x13000ull)
#define CPU0PDP (KZERO+0x14000ull)
#define CPU0PD0 (KZERO+0x15000ull) /* KZERO */
#define CPU0PD1 (KZERO+0x16000ull) /* KZERO+1GB */
#define CPU0GDT (KZERO+0x17000ull) /* bootstrap processor GDT */ #define CPU0GDT (KZERO+0x17000ull) /* bootstrap processor GDT */
#define CPU0MACH (KZERO+0x18000ull) /* Mach for bootstrap processor */ #define CPU0MACH (KZERO+0x18000ull) /* Mach for bootstrap processor */
#define CPU0END (CPU0MACH+MACHSIZE) #define CPU0END (CPU0MACH+MACHSIZE)

View file

@ -82,8 +82,8 @@ mmuinit(void)
didmmuinit = 1; didmmuinit = 1;
/* zap double map done by l.s */ /* zap double map done by l.s */
m->pml4[0] = 0;
m->pml4[512] = 0; m->pml4[512] = 0;
m->pml4[0] = 0;
m->tss = mallocz(sizeof(Tss), 1); m->tss = mallocz(sizeof(Tss), 1);
if(m->tss == nil) if(m->tss == nil)
@ -157,7 +157,7 @@ paddr(void *v)
if(va >= KZERO) if(va >= KZERO)
return va-KZERO; return va-KZERO;
if(va >= VMAP) if(va >= VMAP)
return va-(VMAP-(-KZERO)); return va-VMAP;
panic("paddr: va=%#p pc=%#p", va, getcallerpc(&v)); panic("paddr: va=%#p pc=%#p", va, getcallerpc(&v));
return 0; return 0;
} }
@ -505,12 +505,7 @@ vmap(uintptr pa, int size)
uintptr va; uintptr va;
int o; int o;
if(size <= 0 || pa >= -VMAP) va = pa+VMAP;
panic("vmap: pa=%#p size=%d pc=%#p", pa, size, getcallerpc(&pa));
if(cankaddr(pa) >= size)
va = pa+KZERO;
else
va = pa+(VMAP-(-KZERO));
/* /*
* might be asking for less than a page. * might be asking for less than a page.
*/ */

View file

@ -73,6 +73,7 @@ mpstartap(Apic* apic)
* PDP between processors. * PDP between processors.
*/ */
pml4[PTLX(KZERO, 3)] = MACHP(0)->pml4[PTLX(KZERO, 3)]; pml4[PTLX(KZERO, 3)] = MACHP(0)->pml4[PTLX(KZERO, 3)];
pml4[PTLX(VMAP, 3)] = MACHP(0)->pml4[PTLX(VMAP, 3)];
/* double map */ /* double map */
pml4[0] = PADDR(pdp0) | PTEWRITE|PTEVALID; pml4[0] = PADDR(pdp0) | PTEWRITE|PTEVALID;