From 32604cd830a03c1237cf992b86e9b00499ca7b38 Mon Sep 17 00:00:00 2001
From: cinap_lenrek <cinap_lenrek@felloff.net>
Date: Sat, 15 Feb 2014 06:17:05 +0100
Subject: [PATCH] pc64: move VMAP into its own PDP (for vmware)

modifying the kernel pdp (CPU0PDP) hangs vmware. so
we initialize the pdp with KZERO and KZERO+1GB map
in l.s and never change it. (except when removing
the zero double map which seems to work).

VMAP has its own pdp now allowing to map 512GB of
physical address space. this simplifies the code
a bit and gives nice virtual addresses.
---
 sys/src/9/pc64/l.s        | 11 +++++++++--
 sys/src/9/pc64/mem.h      | 14 ++++++++++----
 sys/src/9/pc64/mmu.c      | 11 +++--------
 sys/src/9/pc64/squidboy.c |  1 +
 4 files changed, 23 insertions(+), 14 deletions(-)

diff --git a/sys/src/9/pc64/l.s b/sys/src/9/pc64/l.s
index e0038a1d6..18c6f7320 100644
--- a/sys/src/9/pc64/l.s
+++ b/sys/src/9/pc64/l.s
@@ -86,11 +86,18 @@ TEXT _warp64<>(SB), 1, $-4
 	MOVL	DX, PML4O(KZERO)(AX)		/* PML4E for KZERO */
 
 	ADDL	$PTSZ, AX			/* PDP at PML4 + PTSZ */
-	ADDL	$PTSZ, DX			/* PD at PML4 + 2*PTSZ */
+	ADDL	$PTSZ, DX			/* PD0 at PML4 + 2*PTSZ */
 	MOVL	DX, PDPO(0)(AX)			/* PDPE for double-map */
 	MOVL	DX, PDPO(KZERO)(AX)		/* PDPE for KZERO */
 
-	ADDL	$PTSZ, AX			/* PD at PML4 + 2*PTSZ */
+	/*
+	 * add PDPE for KZERO+1GB early as Vmware
+	 * hangs when modifying kernel PDP
+	 */
+	ADDL	$PTSZ, DX			/* PD1 */
+	MOVL	DX, PDPO(KZERO+GiB)(AX)
+
+	ADDL	$PTSZ, AX			/* PD0 at PML4 + 2*PTSZ */
 	MOVL	$(PTESIZE|PTEGLOBAL|PTEWRITE|PTEVALID), DX
 	MOVL	DX, PDO(0)(AX)			/* PDE for double-map */
 
diff --git a/sys/src/9/pc64/mem.h b/sys/src/9/pc64/mem.h
index 8c3d610e5..d75e0f941 100644
--- a/sys/src/9/pc64/mem.h
+++ b/sys/src/9/pc64/mem.h
@@ -52,13 +52,13 @@
 /*
  *  Address spaces. Kernel, sorted by address.
  */
-#define KZERO		(0xffffffff80000000ull)	/* 2GB identity map of lower 2GB ram */
+#define KZERO		(0xffffffff80000000ull)
 #define KTZERO		(KZERO+1*MiB+64*KiB)
 
-#define VMAP		(0xffffffff00000000ull)	/* 2GB identity map of upper 2GB ram */
-#define VMAPSIZE	(2*GiB)
+#define VMAP		(0xffffff0000000000ull)
+#define VMAPSIZE	(512*GiB)
 
-#define	KMAP		(0xffffff7f00000000ull)	/* 2MB for per process temporary kernel mappings */
+#define	KMAP		(0xfffffe8000000000ull)
 #define KMAPSIZE	(2*MiB)
 
 /*
@@ -68,8 +68,14 @@
 #define	APBOOTSTRAP	(KZERO+0x3000ull)		/* AP bootstrap code */
 #define	IDTADDR		(KZERO+0x10000ull)		/* idt */
 #define	REBOOTADDR	(0x11000)			/* reboot code - physical address */
+
 #define CPU0PML4	(KZERO+0x13000ull)
+#define CPU0PDP		(KZERO+0x14000ull)
+#define CPU0PD0		(KZERO+0x15000ull)		/* KZERO */
+#define CPU0PD1		(KZERO+0x16000ull)		/* KZERO+1GB */
+
 #define	CPU0GDT		(KZERO+0x17000ull)		/* bootstrap processor GDT */
+
 #define	CPU0MACH	(KZERO+0x18000ull)		/* Mach for bootstrap processor */
 #define CPU0END		(CPU0MACH+MACHSIZE)
 
diff --git a/sys/src/9/pc64/mmu.c b/sys/src/9/pc64/mmu.c
index 8f1d45d71..74857b90f 100644
--- a/sys/src/9/pc64/mmu.c
+++ b/sys/src/9/pc64/mmu.c
@@ -82,8 +82,8 @@ mmuinit(void)
 	didmmuinit = 1;
 
 	/* zap double map done by l.s */ 
-	m->pml4[0] = 0;
 	m->pml4[512] = 0;
+	m->pml4[0] = 0;
 
 	m->tss = mallocz(sizeof(Tss), 1);
 	if(m->tss == nil)
@@ -157,7 +157,7 @@ paddr(void *v)
 	if(va >= KZERO)
 		return va-KZERO;
 	if(va >= VMAP)
-		return va-(VMAP-(-KZERO));
+		return va-VMAP;
 	panic("paddr: va=%#p pc=%#p", va, getcallerpc(&v));
 	return 0;
 }
@@ -505,12 +505,7 @@ vmap(uintptr pa, int size)
 	uintptr va;
 	int o;
 
-	if(size <= 0 || pa >= -VMAP)
-		panic("vmap: pa=%#p size=%d pc=%#p", pa, size, getcallerpc(&pa));
-	if(cankaddr(pa) >= size)
-		va = pa+KZERO;
-	else
-		va = pa+(VMAP-(-KZERO));
+	va = pa+VMAP;
 	/*
 	 * might be asking for less than a page.
 	 */
diff --git a/sys/src/9/pc64/squidboy.c b/sys/src/9/pc64/squidboy.c
index b0d9f409f..dab78ea2d 100644
--- a/sys/src/9/pc64/squidboy.c
+++ b/sys/src/9/pc64/squidboy.c
@@ -73,6 +73,7 @@ mpstartap(Apic* apic)
 	 * PDP between processors.
 	 */
 	pml4[PTLX(KZERO, 3)] = MACHP(0)->pml4[PTLX(KZERO, 3)];
+	pml4[PTLX(VMAP, 3)] = MACHP(0)->pml4[PTLX(VMAP, 3)];
 
 	/* double map */
 	pml4[0] = PADDR(pdp0) | PTEWRITE|PTEVALID;