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https://github.com/reactos/reactos.git
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b363fcdc3b
[ARMLLB]: Implement ZOOM2 ARMLLB board support package. TWL4030 read/write implemented (through basic I2C on the HS interface), RTC and Keypad Matrix implemented (through TWL4030), NEC WVGA Panel Initialization (through basic SPI interface on the MBPSI), basic clock setup and GPIO access for DSS/DISPC, setup DSS/DISPC for output on the NEC panel. UART implemented through Quad-UART NS16550 compatible chip (using CPORTlib). [ARMLLB]: Requires having been booted through x-loader+uboot as a kernel image. Will work on directly booting from NAND later. svn path=/trunk/; revision=49743
106 lines
4.4 KiB
C
Executable file
106 lines
4.4 KiB
C
Executable file
/*
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* PROJECT: ReactOS Boot Loader
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* LICENSE: BSD - See COPYING.ARM in the top level directory
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* FILE: boot/armllb/hw/omap3-zoom2/hwinit.c
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* PURPOSE: LLB UART Initialization Routines for OMAP3 ZOOM2
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* PROGRAMMERS: ReactOS Portable Systems Group
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*/
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#include "precomp.h"
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//
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// OMAP3 Memory Map
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//
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// 0x00000000 - 0x3FFFFFFF GPMC [ 1 GB]
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// 0x40000000 - 0x47FFFFFF On-Chip Memory (ROM/SRAM Address Space) [128 MB]
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// 0x48000000 - 0x4FFFFFFF L4 Interconnects (All system peripherals)[128 MB]
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// 0x50000000 - 0x53FFFFFF SGX Graphics Accelerator Slave Port [ 64 MB]
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// 0x54000000 - 0x57FFFFFF L4 Emulation [128 MB]
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// 0x58000000 - 0x58FFFFFF Reserved [ 64 MB]
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// 0x5C000000 - 0x5FFFFFFF IVA2.2 Subsystem [ 64 MB]
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// 0x60000000 - 0x67FFFFFF Reserved [128 MB]
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// 0x68000000 - 0x6FFFFFFF L3 Interconnect (Control Registers) [128 MB]
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// 0x70000000 - 0x7FFFFFFF SDRC/SMS Virtual Address Space 0 [256 MB]
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// 0x80000000 - 0x9FFFFFFF SDRC/SMS CS0 SDRAM [512 MB]
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// 0x80000000 - 0x80FFFFFF KERNEL, HAL, BOOT DRIVERS [ 16 MB]
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// THIS IS THE x86-STYLE "LOW 1MB" THAT IS IDENTITY MAPPED
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// 0x81000000 - 0x8100FFFF ARM LLB [ 64 KB]
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// 0x81010000 - 0x81013FFF ARM BOOT STACK [ 16 KB]
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// 0x81014000 - 0x81073FFF ARM FRAMEBUFFER [384 KB]
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// 0x81070000 - 0x81093FFF ARM OS LOADER [128 KB]
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// 0x81094000 - 0x810FFFFF RESERVED FOR BOOT LOADER EXPANSION [432 KB]
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// END OF THE x86-STYLE "LOW 1MB" THAT IS IDENTITY MAPPED
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// 0x81100000 - 0x8FFFFFFF FREE RAM [ 15 MB]
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// 0x82000000 - 0x83FFFFFF ARM RAMDISK [ 32 MB]
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// 0x84000000 - 0x8FFFFFFF FREE RAM [192 MB]
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// 0x90000000 - 0x9FFFFFFF FREE RAM IF > 256MB INSTALLED [256 MB]
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// 0xA0000000 - 0xBFFFFFFF SDRC/SMS CS1 SDRAM [512 MB]
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// 0xA0000000 - 0xAFFFFFFF FREE RAM IF > 512MB INSTALLED [256 MB]
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// 0xB0000000 - 0xBFFFFFFF FREE RAM IF > 768MB INSTALLED [256 MB]
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// 0xC0000000 - 0xDFFFFFFF Reserved [512 MB]
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// 0xE0000000 - 0xFFFFFFFF SDRC/SMS Virtual Address Space 1 [512 MB]
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BIOS_MEMORY_MAP LlbHwOmap3MemoryMap[] =
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{
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{0x00000000, 0x80000000, BiosMemoryReserved, 0}, /* Device Registers */
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{0x80000000, 0x01000000, BiosMemoryUsable, 0}, /* 16 MB RAM for Kernel map */
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{0x81000000, 0x00010000, BiosMemoryBootLoader, 0}, /* Arm LLB */
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{0x81010000, 0x00004000, BiosMemoryBootStrap, 0}, // LLB Stack
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{0x81014000, 0x00060000, BiosMemoryBootLoader, 0}, /* Kernel Framebuffer */
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{0x81070000, 0x00020000, BiosMemoryBootStrap, 0}, /* ARM OS Loader */
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{0x81094000, 0x0006C000, BiosMemoryBootStrap, 0}, /* ARM OS Loader Expansion */
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{0x81100000, 0x00F00000, BiosMemoryUsable, 0}, /* 15 MB Free RAM */
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{0x82000000, 0x02000000, BiosMemoryBootStrap, 0}, /* 32MB RAMDISK */
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{0x84000000, 0x0C000000, BiosMemoryUsable, 0}, /* 192 MB Free RAM */
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{0x90000000, 0x70000000, BiosMemoryReserved, 0},
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{0, 0, 0, 0}
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};
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VOID
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NTAPI
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LlbHwBuildMemoryMap(IN PBIOS_MEMORY_MAP MemoryMap)
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{
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PBIOS_MEMORY_MAP MapEntry;
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ULONG Base, Size, FsBase, FsSize;
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/* Parse hardware memory map */
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MapEntry = LlbHwOmap3MemoryMap;
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while (MapEntry->Length)
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{
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/* Add this entry */
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LlbAllocateMemoryEntry(MapEntry->Type, MapEntry->BaseAddress, MapEntry->Length);
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/* Move to the next one */
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MapEntry++;
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}
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/* Query memory and RAMDISK information */
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LlbEnvGetMemoryInformation(&Base, &Size);
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LlbEnvGetRamDiskInformation(&FsBase, &FsSize);
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if (!FsSize) return;
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#ifdef _BEAGLE_
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/* Add-in the size of the ramdisk */
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Base = FsBase + FsSize;
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/* Subtract size of ramdisk and anything else before it */
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Size -= Base;
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/* Allocate an entry for it */
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LlbAllocateMemoryEntry(BiosMemoryUsable, Base, Size);
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#endif
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}
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VOID
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NTAPI
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LlbHwInitialize(VOID)
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{
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/* Setup the UART (NS16550) */
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LlbHwOmap3UartInitialize();
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/* Setup the NEC WVGA LCD Panel and the Display Controller */
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LlbHwOmap3LcdInitialize();
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/* Setup the keyboard */
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LlbHwOmap3SynKpdInitialize();
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}
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/* EOF */
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