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[ARMLLB]: Split up support between OMAP3 Beagle and ZOOM2.

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[ARMLLB]: Implement ZOOM2 ARMLLB board support package. TWL4030 read/write implemented (through basic I2C on the HS interface), RTC and Keypad Matrix implemented (through TWL4030), NEC WVGA Panel Initialization (through basic SPI interface on the MBPSI), basic clock setup and GPIO access for DSS/DISPC, setup DSS/DISPC for output on the NEC panel. UART implemented through Quad-UART NS16550 compatible chip (using CPORTlib).
[ARMLLB]: Requires having been booted through x-loader+uboot as a kernel image. Will work on directly booting from NAND later.

svn path=/trunk/; revision=49743
This commit is contained in:
Sir Richard 2010-11-23 17:14:41 +00:00
parent 0b05db72cf
commit b363fcdc3b
13 changed files with 817 additions and 11 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

34
reactos/boot/armllb/armllb.rbuild
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@ -1,17 +1,25 @@
<?xml version="1.0"?>
<!DOCTYPE group SYSTEM "../../tools/rbuild/project.dtd">
<group>
<module name="armllb" type="bootloader" installbase=".." installname="armllb.bin">
<module name="armllb" type="kernel" entrypoint="_start" installbase=".." installname="armllb.bin">
<bootstrap installbase="loader" />
<library>libcntpr</library>
<library>rtl</library>
<include base="armllb">./inc</include>
<if property="SARCH" value="omap3">
<if property="SARCH" value="omap3-beagle">
<define name="_OMAP3_" />
<define name="_BEAGLE_" />
<group linkerset="ld">
<linkerflag>-Wl,--image-base=0x401FEFF8</linkerflag>
</group>
</if>
<if property="SARCH" value="omap3-zoom2">
<define name="_OMAP3_" />
<define name="_ZOOM2_" />
<group linkerset="ld">
<linkerflag>--image-base=0x80FFF000</linkerflag>
</group>
</if>
<if property="SARCH" value="versatile">
<define name="_VERSATILE_" />
<group linkerset="ld">
@ -25,17 +33,26 @@
<file>fw.c</file>
<directory name="hw">
<file>keyboard.c</file>
<file>matrix.c</file>
<file>serial.c</file>
<file>time.c</file>
<file>video.c</file>
<if property="SARCH" value="omap3">
<directory name="omap3">
<file>hwdata.c</file>
<file>hwdss.c</file>
<if property="SARCH" value="omap3-zoom2">
<directory name="omap3-zoom2">
<file>hwinfo.c</file>
<file>hwinit.c</file>
<file>hwlcd.c</file>
<file>hwsynkp.c</file>
<file>hwtwl40x.c</file>
<file>hwuart.c</file>
</directory>
</if>
<if property="SARCH" value="omap3-beagle">
<directory name="omap3-beagle">
<file>hwuart.c</file>
<file>hwinfo.c</file>
<file>hwinit.c</file>
</directory>
</directory>
</if>
<if property="SARCH" value="versatile">
<directory name="versatile">
@ -59,8 +76,5 @@
<compilerflag>-Os</compilerflag>
</group>
<group linkerset="ld">
<linkerflag>-lgcc</linkerflag>
</group>
</module>
</group>

42
reactos/boot/armllb/hw/matrix.c Executable file
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/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/hw/matrix.c
* PURPOSE: LLB Matrix Keypad Routines
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#include "precomp.h"
/* SYNPATICS KEYPAD MATRIX ****************************************************/
UCHAR KeyMatrix[8][8] =
{
{'e', 'r', 't', KEY_HOME, 0, 0, 'i', KEY_LEFTSHIFT},
{'d', 'f', 'g', KEY_SEND, 0, 0, 'k', KEY_ENTER},
{'x', 'c', 'v', KEY_END, 0, 0, '.', KEY_CAPS_LOCK},
{'z', '+', 'b', KEY_F1, 0, 0, 'o', KEY_SPACE},
{'w', 'y', 'u', KEY_F2, 0, 0, 'l', KEY_LEFT},
{'s', 'h', 'j', KEY_F3, 0, 0, 'm', KEY_RIGHT},
{'q', 'a', 'n', KEY_BACKSPACE, 0, 0, 'p', KEY_UP},
{0, 0, 0, 0, 0, 0, KEY_ENTER, KEY_DOWN}
};
/* FUNCTIONS ******************************************************************/
CHAR
NTAPI
LlbKeypadGetChar(VOID)
{
UCHAR ScanCode;
UCHAR Col, Row;
ScanCode = LlbHwKbdRead();
Col = ScanCode >> 4;
Row = ScanCode & 0xF;
/* Return the ASCII character */
return KeyMatrix[Col][Row];
}
/* EOF */

137
reactos/boot/armllb/hw/omap3-beagle/hwinfo.c Executable file
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/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/hw/omap3-beagle/hwinfo.c
* PURPOSE: LLB Hardware Info Routines for OMAP3 Beagle
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#include "precomp.h"
ULONG
NTAPI
LlbHwGetBoardType(VOID)
{
return MACH_TYPE_OMAP3_BEAGLE;
}
ULONG
NTAPI
LlbHwGetPClk(VOID)
{
return 48000000;
}
ULONG
NTAPI
LlbHwGetTmr0Base(VOID)
{
return 0x48318000;
}
ULONG
NTAPI
LlbHwGetSerialUart(VOID)
{
return 3;
}
VOID
NTAPI
LlbHwKbdSend(IN ULONG Value)
{
}
BOOLEAN
NTAPI
LlbHwKbdReady(VOID)
{
return FALSE;
}
INT
NTAPI
LlbHwKbdRead(VOID)
{
return 0;
}
ULONG
NTAPI
LlbHwGetScreenWidth(VOID)
{
return 1280;
}
ULONG
NTAPI
LlbHwGetScreenHeight(VOID)
{
return 720;
}
PVOID
NTAPI
LlbHwGetFrameBuffer(VOID)
{
return (PVOID)0x80500000;
}
ULONG
NTAPI
LlbHwVideoCreateColor(IN ULONG Red,
IN ULONG Green,
IN ULONG Blue)
{
return 0;
}
//
// OMAP3 Memory Map
//
BIOS_MEMORY_MAP LlbHwOmap3MemoryMap[] =
{
{0, 0, 0, 0}
};
VOID
NTAPI
LlbHwBuildMemoryMap(IN PBIOS_MEMORY_MAP MemoryMap)
{
PBIOS_MEMORY_MAP MapEntry;
ULONG Base, Size, FsBase, FsSize;
/* Parse hardware memory map */
MapEntry = LlbHwOmap3MemoryMap;
while (MapEntry->Length)
{
/* Add this entry */
LlbAllocateMemoryEntry(MapEntry->Type, MapEntry->BaseAddress, MapEntry->Length);
/* Move to the next one */
MapEntry++;
}
/* Query memory and RAMDISK information */
LlbEnvGetMemoryInformation(&Base, &Size);
LlbEnvGetRamDiskInformation(&FsBase, &FsSize);
/* Add-in the size of the ramdisk */
Base = FsBase + FsSize;
/* Subtract size of ramdisk and anything else before it */
Size -= Base;
/* Allocate an entry for it */
LlbAllocateMemoryEntry(BiosMemoryUsable, Base, Size);
}
ULONG
LlbHwRtcRead(VOID)
{
return 0;
}
/* EOF */

18
reactos/boot/armllb/hw/omap3-beagle/hwinit.c Executable file
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/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/hw/omap3-beagle/hwinit.c
* PURPOSE: LLB Hardware Initialization Routines for OMAP3 Beagle
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#include "precomp.h"
VOID
NTAPI
LlbHwInitialize(VOID)
{
while (TRUE);
}
/* EOF */

54
reactos/boot/armllb/hw/omap3-beagle/hwuart.c Executable file
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/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/hw/omap3-beagle/hwuart.c
* PURPOSE: LLB UART Initialization Routines for OMAP3 Beagle
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#include "precomp.h"
/* FUNCTIONS ******************************************************************/
VOID
NTAPI
LlbHwOmap3UartInitialize(VOID)
{
}
VOID
NTAPI
LlbHwUartSendChar(IN CHAR Char)
{
}
BOOLEAN
NTAPI
LlbHwUartTxReady(VOID)
{
return FALSE;
}
ULONG
NTAPI
LlbHwGetUartBase(IN ULONG Port)
{
if (Port == 1)
{
return 0x4806A000;
}
else if (Port == 2)
{
return 0x4806C000;
}
else if (Port == 3)
{
return 0x49020000;
}
return 0;
}
/* EOF */

60
reactos/boot/armllb/hw/omap3-zoom2/hwinfo.c Executable file
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/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/hw/omap3-zoom2/hwuart.c
* PURPOSE: LLB Hardware Info Routines for OMAP3 ZOOM2
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#include "precomp.h"
TIMEINFO LlbTime;
#define BCD_INT(bcd) (((bcd & 0xf0) >> 4) * 10 + (bcd &0x0f))
ULONG
NTAPI
LlbHwGetBoardType(VOID)
{
return MACH_TYPE_OMAP_ZOOM2;
}
ULONG
NTAPI
LlbHwGetPClk(VOID)
{
return 48000000;
}
ULONG
NTAPI
LlbHwGetTmr0Base(VOID)
{
return 0x48318000;
}
ULONG
NTAPI
LlbHwGetSerialUart(VOID)
{
return 0;
}
ULONG
LlbHwRtcRead(VOID)
{
/* Issue the GET_TIME request on the RTC control register */
LlbHwOmap3TwlWrite1(0x4B, 0x29, 0x41);
/* Read the BCD registers and convert them */
LlbTime.Second = BCD_INT(LlbHwOmap3TwlRead1(0x4B, 0x1C));
LlbTime.Minute = BCD_INT(LlbHwOmap3TwlRead1(0x4B, 0x1D));
LlbTime.Hour = BCD_INT(LlbHwOmap3TwlRead1(0x4B, 0x1E));
LlbTime.Day = BCD_INT(LlbHwOmap3TwlRead1(0x4B, 0x1F));
LlbTime.Month = BCD_INT(LlbHwOmap3TwlRead1(0x4B, 0x20));
LlbTime.Year = BCD_INT(LlbHwOmap3TwlRead1(0x4B, 0x21));
LlbTime.Year += (LlbTime.Year > 80) ? 1900 : 2000;
return 0;
}
/* EOF */

106
reactos/boot/armllb/hw/omap3-zoom2/hwinit.c Executable file
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/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/hw/omap3-zoom2/hwinit.c
* PURPOSE: LLB UART Initialization Routines for OMAP3 ZOOM2
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#include "precomp.h"
//
// OMAP3 Memory Map
//
// 0x00000000 - 0x3FFFFFFF GPMC [ 1 GB]
// 0x40000000 - 0x47FFFFFF On-Chip Memory (ROM/SRAM Address Space) [128 MB]
// 0x48000000 - 0x4FFFFFFF L4 Interconnects (All system peripherals)[128 MB]
// 0x50000000 - 0x53FFFFFF SGX Graphics Accelerator Slave Port [ 64 MB]
// 0x54000000 - 0x57FFFFFF L4 Emulation [128 MB]
// 0x58000000 - 0x58FFFFFF Reserved [ 64 MB]
// 0x5C000000 - 0x5FFFFFFF IVA2.2 Subsystem [ 64 MB]
// 0x60000000 - 0x67FFFFFF Reserved [128 MB]
// 0x68000000 - 0x6FFFFFFF L3 Interconnect (Control Registers) [128 MB]
// 0x70000000 - 0x7FFFFFFF SDRC/SMS Virtual Address Space 0 [256 MB]
// 0x80000000 - 0x9FFFFFFF SDRC/SMS CS0 SDRAM [512 MB]
// 0x80000000 - 0x80FFFFFF KERNEL, HAL, BOOT DRIVERS [ 16 MB]
// THIS IS THE x86-STYLE "LOW 1MB" THAT IS IDENTITY MAPPED
// 0x81000000 - 0x8100FFFF ARM LLB [ 64 KB]
// 0x81010000 - 0x81013FFF ARM BOOT STACK [ 16 KB]
// 0x81014000 - 0x81073FFF ARM FRAMEBUFFER [384 KB]
// 0x81070000 - 0x81093FFF ARM OS LOADER [128 KB]
// 0x81094000 - 0x810FFFFF RESERVED FOR BOOT LOADER EXPANSION [432 KB]
// END OF THE x86-STYLE "LOW 1MB" THAT IS IDENTITY MAPPED
// 0x81100000 - 0x8FFFFFFF FREE RAM [ 15 MB]
// 0x82000000 - 0x83FFFFFF ARM RAMDISK [ 32 MB]
// 0x84000000 - 0x8FFFFFFF FREE RAM [192 MB]
// 0x90000000 - 0x9FFFFFFF FREE RAM IF > 256MB INSTALLED [256 MB]
// 0xA0000000 - 0xBFFFFFFF SDRC/SMS CS1 SDRAM [512 MB]
// 0xA0000000 - 0xAFFFFFFF FREE RAM IF > 512MB INSTALLED [256 MB]
// 0xB0000000 - 0xBFFFFFFF FREE RAM IF > 768MB INSTALLED [256 MB]
// 0xC0000000 - 0xDFFFFFFF Reserved [512 MB]
// 0xE0000000 - 0xFFFFFFFF SDRC/SMS Virtual Address Space 1 [512 MB]
BIOS_MEMORY_MAP LlbHwOmap3MemoryMap[] =
{
{0x00000000, 0x80000000, BiosMemoryReserved, 0}, /* Device Registers */
{0x80000000, 0x01000000, BiosMemoryUsable, 0}, /* 16 MB RAM for Kernel map */
{0x81000000, 0x00010000, BiosMemoryBootLoader, 0}, /* Arm LLB */
{0x81010000, 0x00004000, BiosMemoryBootStrap, 0}, // LLB Stack
{0x81014000, 0x00060000, BiosMemoryBootLoader, 0}, /* Kernel Framebuffer */
{0x81070000, 0x00020000, BiosMemoryBootStrap, 0}, /* ARM OS Loader */
{0x81094000, 0x0006C000, BiosMemoryBootStrap, 0}, /* ARM OS Loader Expansion */
{0x81100000, 0x00F00000, BiosMemoryUsable, 0}, /* 15 MB Free RAM */
{0x82000000, 0x02000000, BiosMemoryBootStrap, 0}, /* 32MB RAMDISK */
{0x84000000, 0x0C000000, BiosMemoryUsable, 0}, /* 192 MB Free RAM */
{0x90000000, 0x70000000, BiosMemoryReserved, 0},
{0, 0, 0, 0}
};
VOID
NTAPI
LlbHwBuildMemoryMap(IN PBIOS_MEMORY_MAP MemoryMap)
{
PBIOS_MEMORY_MAP MapEntry;
ULONG Base, Size, FsBase, FsSize;
/* Parse hardware memory map */
MapEntry = LlbHwOmap3MemoryMap;
while (MapEntry->Length)
{
/* Add this entry */
LlbAllocateMemoryEntry(MapEntry->Type, MapEntry->BaseAddress, MapEntry->Length);
/* Move to the next one */
MapEntry++;
}
/* Query memory and RAMDISK information */
LlbEnvGetMemoryInformation(&Base, &Size);
LlbEnvGetRamDiskInformation(&FsBase, &FsSize);
if (!FsSize) return;
#ifdef _BEAGLE_
/* Add-in the size of the ramdisk */
Base = FsBase + FsSize;
/* Subtract size of ramdisk and anything else before it */
Size -= Base;
/* Allocate an entry for it */
LlbAllocateMemoryEntry(BiosMemoryUsable, Base, Size);
#endif
}
VOID
NTAPI
LlbHwInitialize(VOID)
{
/* Setup the UART (NS16550) */
LlbHwOmap3UartInitialize();
/* Setup the NEC WVGA LCD Panel and the Display Controller */
LlbHwOmap3LcdInitialize();
/* Setup the keyboard */
LlbHwOmap3SynKpdInitialize();
}
/* EOF */

129
reactos/boot/armllb/hw/omap3-zoom2/hwlcd.c Executable file
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/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/hw/omap3-zoom2/hwlcd.c
* PURPOSE: LLB LCD Routines for OMAP3 ZOOM2
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#include "precomp.h"
PUSHORT LlbHwVideoBuffer;
VOID
NTAPI
LlbHwOmap3LcdInitialize(VOID)
{
/*
* N.B. The following initialization sequence took about 12 months to figure
* out.
* This means if you are glancing at it and have no idea what on Earth
* could possibly be going on, this is *normal*.
* Just trust that this turns on the LCD.
* And be thankful all you ever have to worry about is Java and HTML.
*/
/* Turn on the functional and interface clocks in the entire PER domain */
WRITE_REGISTER_ULONG(0x48005000, 0x3ffff); /* Functional clocks */
WRITE_REGISTER_ULONG(0x48005010, 0x3ffff); /* Interface clocks */
/* Now that GPIO Module 3 is on, send a reset to the LCD panel on GPIO 96 */
WRITE_REGISTER_ULONG(0x49054034, 0); /* FIXME: Enable all as output */
WRITE_REGISTER_ULONG(0x49054094, 0xffffffff); /* FIXME: Output on all gpios */
/* Now turn on the functional and interface clocks in the CORE domain */
WRITE_REGISTER_ULONG(0x48004a00, 0x03fffe29); /* Functional clocks */
WRITE_REGISTER_ULONG(0x48004a10, 0x3ffffffb); /* Interface clocks */
/* The HS I2C interface is now on, configure it */
WRITE_REGISTER_USHORT(0x48070024, 0x0); /* Disable I2c */
WRITE_REGISTER_USHORT(0x48070030, 0x17); /* Configure clock divider */
WRITE_REGISTER_USHORT(0x48070034, 0xd); /* Configure clock scaler */
WRITE_REGISTER_USHORT(0x48070038, 0xf); /* Configure clock scaler */
WRITE_REGISTER_USHORT(0x48070020, 0x215); /* Configure clocks and idle */
WRITE_REGISTER_USHORT(0x4807000c, 0x636f); /* Select wakeup bits */
WRITE_REGISTER_USHORT(0x48070014, 0x4343); /* Disable DMA */
WRITE_REGISTER_USHORT(0x48070024, 0x8000); /* Enable I2C */
/*
* Set the VPLL2 to cover all device groups instead of just P3.
* This essentially enables the VRRTC to power up the LCD panel.
*/
LlbHwOmap3TwlWrite1(0x4B, 0x8E, 0xE0);
/* VPLL2 runs at 1.2V by default, so we need to reprogram to 1.8V for DVI */
LlbHwOmap3TwlWrite1(0x4B, 0x91, 0x05);
/* Set GPIO pin 7 on the TWL4030 as an output pin */
LlbHwOmap3TwlWrite1(0x49, 0x9B, 0x80);
/* Set GPIO pin 7 signal on the TWL4030 ON. This powers the LCD backlight */
LlbHwOmap3TwlWrite1(0x49, 0xA4, 0x80);
/* Now go on the McSPI interface and program it on for the channel */
WRITE_REGISTER_ULONG(0x48098010, 0x15);
WRITE_REGISTER_ULONG(0x48098020, 0x1);
WRITE_REGISTER_ULONG(0x48098028, 0x1);
WRITE_REGISTER_ULONG(0x4809802c, 0x112fdc);
/* Send the reset signal (R2 = 00h) to the NEC WVGA LCD Panel */
WRITE_REGISTER_ULONG(0x48098034, 0x1);
WRITE_REGISTER_ULONG(0x48098038, 0x20100);
WRITE_REGISTER_ULONG(0x48098034, 0x0);
/* Turn on the functional and interface clocks in the DSS domain */
WRITE_REGISTER_ULONG(0x48004e00, 0x5);
WRITE_REGISTER_ULONG(0x48004e10, 0x1);
/* Reset the Display Controller (DISPC) */
WRITE_REGISTER_ULONG(0x48050410, 0x00000005); // DISPC_SYSCONFIG
/* Set the frame buffer address */
WRITE_REGISTER_ULONG(0x48050480, 0x800A0000); // DISPC_GFX_BA0
/* Set resolution and RGB16 color mode */
WRITE_REGISTER_ULONG(0x4805048c, 0x01df031f); // DISPC_GFX_SIZE
WRITE_REGISTER_ULONG(0x480504a0, 0x0000000d); // DISPC_GFX_ATTRIBUTES
/* Set LCD timings (VSync and HSync), pixel clock, and LCD size */
WRITE_REGISTER_ULONG(0x4805046c, 0x00003000); // DISPC_POL_FREQ
WRITE_REGISTER_ULONG(0x48050470, 0x00010004); // DISPC_DIVISOR
WRITE_REGISTER_ULONG(0x48050464, 0x00300500); // DISPC_TIMING_H
WRITE_REGISTER_ULONG(0x48050468, 0x00400300); // DISPC_TIMING_V
WRITE_REGISTER_ULONG(0x4805047c, 0x01df031f); // DISPC_SIZE_LCD
/* Turn the LCD on */
WRITE_REGISTER_ULONG(0x48050440, 0x00018309); // DISPC_CONTROL
}
ULONG
NTAPI
LlbHwGetScreenWidth(VOID)
{
return 800;
}
ULONG
NTAPI
LlbHwGetScreenHeight(VOID)
{
return 480;
}
PVOID
NTAPI
LlbHwGetFrameBuffer(VOID)
{
return (PVOID)0x800A0000;
}
ULONG
NTAPI
LlbHwVideoCreateColor(IN ULONG Red,
IN ULONG Green,
IN ULONG Blue)
{
return (((Red >> 3) << 11)| ((Green >> 2) << 5)| ((Blue >> 3) << 0));
}
/* EOF */

83
reactos/boot/armllb/hw/omap3-zoom2/hwsynkp.c Executable file
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/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/hw/omap3-zoom2/hwsynkpd.c
* PURPOSE: LLB Synpatics Keypad Support for OMAP3 ZOOM 2
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#include "precomp.h"
/* FUNCTIONS ******************************************************************/
VOID
NTAPI
LlbHwOmap3SynKpdInitialize(VOID)
{
/* Set GPIO pin 8 on the TWL4030 as an output pin */
LlbHwOmap3TwlWrite1(0x49, 0x9B, 0xC0);
/* Set GPIO pin 8 signal on the TWL4030 ON. This powers the keypad backlight */
LlbHwOmap3TwlWrite1(0x49, 0xA4, 0xC0);
/* Set PENDDIS and COR on the the keypad interrupt controller */
LlbHwOmap3TwlWrite1(0x4A, 0xE9, 0x06);
/* Only falling edge detection for key pressed */
LlbHwOmap3TwlWrite1(0x4A, 0xE8, 0x01);
/* Unmask key-pressed events */
LlbHwOmap3TwlWrite1(0x4A, 0xE4, 0x0E);
/* Set the keypad control register to turn hardware sequencing and turn it on */
LlbHwOmap3TwlWrite1(0x4A, 0xD2, 0x0);
LlbHwOmap3TwlRead1(0x4A, 0xE3);
LlbHwOmap3TwlWrite1(0x4A, 0xD2, 0x43);
}
UCHAR KeyboardMatrixStatus[8];
BOOLEAN LastState = FALSE;
BOOLEAN
NTAPI
LlbHwKbdReady(VOID)
{
UCHAR Value;
Value = LlbHwOmap3TwlRead1(0x4A, 0xE3);
if (!Value) return FALSE;
LastState ^= 1;
if (!LastState) return FALSE;
/* Return whether or not an interrupt is pending */
return TRUE;
}
INT
NTAPI
LlbHwKbdRead(VOID)
{
UCHAR ActiveCol = 0, ActiveRow = 0, col, coldata, row;
for (col = 0; col < 8; col++)
{
coldata = LlbHwOmap3TwlRead1(0x4A, 0xDB + col);
if (coldata)
{
for (row = 0; row < 8; row++)
{
if (coldata == (1 << row))
{
ActiveRow = row;
ActiveCol = col;
break;
}
}
}
}
return ((ActiveCol << 4) | ActiveRow);
}
/* EOF */

69
reactos/boot/armllb/hw/omap3-zoom2/hwtwl40x.c Executable file
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/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/hw/omap3-zoom2/hwsynkpd.c
* PURPOSE: LLB Synpatics Keypad Support for OMAP3 ZOOM 2
* PROGRAMMERS: ReactOS Portable Systems Group
*/
#include "precomp.h"
/* FUNCTIONS ******************************************************************/
UCHAR
NTAPI
LlbHwOmap3TwlRead1(IN UCHAR ChipAddress,
IN UCHAR RegisterAddress)
{
volatile int i = 1000;
/* Select the register */
LlbHwOmap3TwlWrite(ChipAddress, RegisterAddress, 0, NULL);
/* Now read it */
WRITE_REGISTER_USHORT(0x48070024, 0x8401);
for (i = 1000; i > 0; i--);
return READ_REGISTER_USHORT(0x4807001c);
}
VOID
NTAPI
LlbHwOmap3TwlWrite(IN UCHAR ChipAddress,
IN UCHAR RegisterAddress,
IN UCHAR Length,
IN PUCHAR Values)
{
volatile int i = 1000;
ULONG j;
/* Select chip address */
WRITE_REGISTER_USHORT(0x4807002c, ChipAddress);
WRITE_REGISTER_USHORT(0x48070018, Length + 1);
/* Enable master transmit mode */
WRITE_REGISTER_USHORT(0x48070024, 0x8601);
WRITE_REGISTER_USHORT(0x4807001c, RegisterAddress);
/* Loop each byte */
for (j = 0; j < Length; j++)
{
/* Write the data */
WRITE_REGISTER_USHORT(0x4807001c, Values[j]);
}
/* Issue stop command */
WRITE_REGISTER_USHORT(0x48070024, 0x8602);
for (i = 1000; i > 0; i--);
}
VOID
NTAPI
LlbHwOmap3TwlWrite1(IN UCHAR ChipAddress,
IN UCHAR RegisterAddress,
IN UCHAR Value)
{
/* Do the actual write */
LlbHwOmap3TwlWrite(ChipAddress, RegisterAddress, 1, &Value);
}
/* EOF */

6
reactos/boot/armllb/inc/keyboard.h
View file

@ -12,4 +12,10 @@ LlbKeyboardGetChar(
VOID
);
CHAR
NTAPI
LlbKeypadGetChar(
VOID
);
/* EOF */

51
reactos/boot/armllb/inc/omap3.h Executable file
View file

@ -0,0 +1,51 @@
/*
* PROJECT: ReactOS Boot Loader
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: boot/armllb/inc/omap3.h
* PURPOSE: LLB Board-Specific Hardware Functions for OMAP3
* PROGRAMMERS: ReactOS Portable Systems Group
*/
VOID
NTAPI
LlbHwOmap3UartInitialize(
VOID
);
VOID
NTAPI
LlbHwOmap3LcdInitialize(
VOID
);
UCHAR
NTAPI
LlbHwOmap3TwlRead1(
IN UCHAR ChipAddress,
IN UCHAR RegisterAddress
);
VOID
NTAPI
LlbHwOmap3TwlWrite(
IN UCHAR ChipAddress,
IN UCHAR RegisterAddress,
IN UCHAR Length,
IN PUCHAR Values
);
VOID
NTAPI
LlbHwOmap3TwlWrite1(
IN UCHAR ChipAddress,
IN UCHAR RegisterAddress,
IN UCHAR Value
);
VOID
NTAPI
LlbHwOmap3SynKpdInitialize(
VOID
);
/* EOF */

39
reactos/boot/armllb/os/loader.c
View file

@ -91,6 +91,38 @@ LlbBuildMemoryMap(VOID)
LlbHwBuildMemoryMap(MemoryMap);
}
//
// Should go to hwdev.c
//
POSLOADER_INIT
NTAPI
LlbHwLoadOsLoaderFromRam(VOID)
{
ULONG Base, RootFs, Size;
PCHAR Offset;
CHAR CommandLine[64];
/* On versatile we load the RAMDISK with initrd */
LlbEnvGetRamDiskInformation(&RootFs, &Size);
DbgPrint("Root fs: %lx, size: %lx\n", RootFs, Size);
/* The OS Loader is at 0x20000, always */
Base = 0x20000;
/* Read image offset */
Offset = LlbEnvRead("rdoffset");
/* Set parameters for the OS loader */
snprintf(CommandLine,
sizeof(CommandLine),
"rdbase=0x%x rdsize=0x%x rdoffset=%s",
RootFs, Size, Offset);
LlbSetCommandLine(CommandLine);
/* Return the OS loader base address */
return (POSLOADER_INIT)Base;
}
VOID
NTAPI
LlbLoadOsLoader(VOID)
@ -118,6 +150,11 @@ LlbLoadOsLoader(VOID)
{
//todo
}
LoaderInit = (PVOID)0x80000000;
#ifdef _ZOOM2_ // need something better than this...
LoaderInit = (PVOID)0x81070000;
#endif
printf("OS Loader loaded at 0x%p...JUMP!\n\n\n\n\n", LoaderInit);
}
@ -133,7 +170,7 @@ LlbBoot(VOID)
/* Load the OS loader */
LlbLoadOsLoader();
/* Jump to the OS Loader (FreeLDR in this case) */
LoaderInit(&ArmBlock);
}