mirror of
https://github.com/reactos/reactos.git
synced 2024-08-30 07:08:19 +00:00
538 lines
16 KiB
C
538 lines
16 KiB
C
/*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: PCI IDE bus driver extension
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* FILE: drivers/storage/pciidex/pdo.c
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* PURPOSE: IRP_MJ_PNP operations for PDOs
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* PROGRAMMERS: Hervé Poussineau (hpoussin@reactos.org)
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*/
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#include "pciidex.h"
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#include <stdio.h>
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#define NDEBUG
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#include <debug.h>
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static NTSTATUS
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PciIdeXPdoQueryId(
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IN PDEVICE_OBJECT DeviceObject,
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IN PIRP Irp,
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OUT ULONG_PTR* Information)
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{
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PPDO_DEVICE_EXTENSION DeviceExtension;
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PFDO_DEVICE_EXTENSION FdoDeviceExtension;
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WCHAR Buffer[256];
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ULONG Index = 0;
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ULONG IdType;
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UNICODE_STRING SourceString;
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UNICODE_STRING String;
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NTSTATUS Status;
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IdType = IoGetCurrentIrpStackLocation(Irp)->Parameters.QueryId.IdType;
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DeviceExtension = (PPDO_DEVICE_EXTENSION)DeviceObject->DeviceExtension;
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FdoDeviceExtension = (PFDO_DEVICE_EXTENSION)DeviceExtension->ControllerFdo->DeviceExtension;
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switch (IdType)
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{
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case BusQueryDeviceID:
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{
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DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryDeviceID\n");
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RtlInitUnicodeString(&SourceString, L"PCIIDE\\IDEChannel");
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break;
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}
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case BusQueryHardwareIDs:
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{
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DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryHardwareIDs\n");
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switch (FdoDeviceExtension->VendorId)
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{
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case 0x0e11:
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Index += swprintf(&Buffer[Index], L"Compaq-%04x", FdoDeviceExtension->DeviceId) + 1;
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break;
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case 0x1039:
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Index += swprintf(&Buffer[Index], L"SiS-%04x", FdoDeviceExtension->DeviceId) + 1;
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break;
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case 0x1050:
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Index += swprintf(&Buffer[Index], L"WinBond-%04x", FdoDeviceExtension->DeviceId) + 1;
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break;
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case 0x1095:
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Index += swprintf(&Buffer[Index], L"CMD-%04x", FdoDeviceExtension->DeviceId) + 1;
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break;
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case 0x8086:
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{
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switch (FdoDeviceExtension->DeviceId)
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{
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case 0x1230:
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Index += swprintf(&Buffer[Index], L"Intel-PIIX") + 1;
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break;
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case 0x7010:
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Index += swprintf(&Buffer[Index], L"Intel-PIIX3") + 1;
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break;
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case 0x7111:
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Index += swprintf(&Buffer[Index], L"Intel-PIIX4") + 1;
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break;
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default:
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Index += swprintf(&Buffer[Index], L"Intel-%04x", FdoDeviceExtension->DeviceId) + 1;
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break;
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}
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break;
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}
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default:
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break;
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}
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if (DeviceExtension->Channel == 0)
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Index += swprintf(&Buffer[Index], L"Primary_IDE_Channel") + 1;
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else
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Index += swprintf(&Buffer[Index], L"Secondary_IDE_Channel") + 1;
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Index += swprintf(&Buffer[Index], L"*PNP0600") + 1;
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Buffer[Index] = UNICODE_NULL;
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SourceString.Length = SourceString.MaximumLength = Index * sizeof(WCHAR);
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SourceString.Buffer = Buffer;
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break;
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}
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case BusQueryCompatibleIDs:
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{
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DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryCompatibleIDs\n");
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Index += swprintf(&Buffer[Index], L"*PNP0600") + 1;
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Buffer[Index] = UNICODE_NULL;
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SourceString.Length = SourceString.MaximumLength = Index * sizeof(WCHAR);
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SourceString.Buffer = Buffer;
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break;
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}
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case BusQueryInstanceID:
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{
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DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_ID / BusQueryInstanceID\n");
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swprintf(Buffer, L"%lu", DeviceExtension->Channel);
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RtlInitUnicodeString(&SourceString, Buffer);
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break;
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}
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default:
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DPRINT1("IRP_MJ_PNP / IRP_MN_QUERY_ID / unknown query id type 0x%lx\n", IdType);
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ASSERT(FALSE);
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return STATUS_NOT_SUPPORTED;
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}
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Status = DuplicateUnicodeString(
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RTL_DUPLICATE_UNICODE_STRING_NULL_TERMINATE,
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&SourceString,
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&String);
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*Information = (ULONG_PTR)String.Buffer;
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return Status;
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}
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static NTSTATUS
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GetCurrentResources(
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IN PDEVICE_OBJECT DeviceObject,
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OUT PULONG CommandPortBase,
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OUT PULONG ControlPortBase,
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OUT PULONG BusMasterPortBase,
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OUT PULONG InterruptVector)
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{
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PPDO_DEVICE_EXTENSION DeviceExtension;
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PFDO_DEVICE_EXTENSION FdoDeviceExtension;
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ULONG BaseIndex;
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ULONG BytesRead;
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PCI_COMMON_CONFIG PciConfig;
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NTSTATUS ret = STATUS_UNSUCCESSFUL;
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DeviceExtension = (PPDO_DEVICE_EXTENSION)DeviceObject->DeviceExtension;
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FdoDeviceExtension = (PFDO_DEVICE_EXTENSION)DeviceExtension->ControllerFdo->DeviceExtension;
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BaseIndex = DeviceExtension->Channel * 2;
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BytesRead = (*FdoDeviceExtension->BusInterface->GetBusData)(
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FdoDeviceExtension->BusInterface->Context,
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PCI_WHICHSPACE_CONFIG,
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&PciConfig,
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0,
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PCI_COMMON_HDR_LENGTH);
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if (BytesRead != PCI_COMMON_HDR_LENGTH)
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return STATUS_IO_DEVICE_ERROR;
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/* We have found a known native pci ide controller */
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if ((PciConfig.ProgIf & 0x80) && (PciConfig.u.type0.BaseAddresses[4] & PCI_ADDRESS_IO_SPACE))
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{
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DPRINT("Found IDE Bus Master controller!\n");
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*BusMasterPortBase = PciConfig.u.type0.BaseAddresses[4] & PCI_ADDRESS_IO_ADDRESS_MASK;
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DPRINT(" IDE Bus Master Registers at IO %lx\n", *BusMasterPortBase);
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}
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else
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{
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*BusMasterPortBase = 0;
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}
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if ((PciConfig.ProgIf >> BaseIndex) & 0x1)
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{
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/* Native mode */
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if ((PciConfig.u.type0.BaseAddresses[BaseIndex + 0] & PCI_ADDRESS_IO_SPACE) &&
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(PciConfig.u.type0.BaseAddresses[BaseIndex + 1] & PCI_ADDRESS_IO_SPACE))
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{
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/* Channel is enabled */
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*CommandPortBase = PciConfig.u.type0.BaseAddresses[BaseIndex + 0] & PCI_ADDRESS_IO_ADDRESS_MASK;
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*ControlPortBase = PciConfig.u.type0.BaseAddresses[BaseIndex + 1] & PCI_ADDRESS_IO_ADDRESS_MASK;
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*InterruptVector = PciConfig.u.type0.InterruptLine;
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ret = STATUS_SUCCESS;
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}
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}
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else
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{
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/* Compatibility mode */
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switch (DeviceExtension->Channel)
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{
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case 0:
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if (IoGetConfigurationInformation()->AtDiskPrimaryAddressClaimed)
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ret = STATUS_INSUFFICIENT_RESOURCES;
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else
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{
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*CommandPortBase = 0x1F0;
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*ControlPortBase = 0x3F6;
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*InterruptVector = 14;
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ret = STATUS_SUCCESS;
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}
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break;
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case 1:
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if (IoGetConfigurationInformation()->AtDiskSecondaryAddressClaimed)
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ret = STATUS_INSUFFICIENT_RESOURCES;
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else
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{
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*CommandPortBase = 0x170;
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*ControlPortBase = 0x376;
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*InterruptVector = 15;
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ret = STATUS_SUCCESS;
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}
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break;
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}
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}
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return ret;
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}
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static NTSTATUS
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PciIdeXPdoQueryResourceRequirements(
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IN PDEVICE_OBJECT DeviceObject,
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IN PIRP Irp,
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OUT ULONG_PTR* Information)
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{
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ULONG CommandPortBase;
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ULONG ControlPortBase;
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ULONG BusMasterPortBase;
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ULONG InterruptVector;
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ULONG ListSize;
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PIO_RESOURCE_REQUIREMENTS_LIST RequirementsList;
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PIO_RESOURCE_DESCRIPTOR Descriptor;
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NTSTATUS Status;
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Status = GetCurrentResources(DeviceObject, &CommandPortBase,
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&ControlPortBase, &BusMasterPortBase, &InterruptVector);
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if (!NT_SUCCESS(Status))
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return Status;
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DPRINT("IDE Channel %lu: IO %x and %x, BM %lx, Irq %lu\n",
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((PPDO_DEVICE_EXTENSION)DeviceObject->DeviceExtension)->Channel,
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CommandPortBase, ControlPortBase,
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BusMasterPortBase, InterruptVector);
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/* FIXME: what to do with BusMasterPortBase? */
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ListSize = sizeof(IO_RESOURCE_REQUIREMENTS_LIST)
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+ 2 * sizeof(IO_RESOURCE_DESCRIPTOR);
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RequirementsList = ExAllocatePool(PagedPool, ListSize);
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if (!RequirementsList)
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return STATUS_INSUFFICIENT_RESOURCES;
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RtlZeroMemory(RequirementsList, ListSize);
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RequirementsList->ListSize = ListSize;
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RequirementsList->AlternativeLists = 1;
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RequirementsList->List[0].Version = 1;
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RequirementsList->List[0].Revision = 1;
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RequirementsList->List[0].Count = 3;
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Descriptor = &RequirementsList->List[0].Descriptors[0];
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/* Command port base */
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Descriptor->Option = 0; /* Required */
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Descriptor->Type = CmResourceTypePort;
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Descriptor->ShareDisposition = CmResourceShareDeviceExclusive;
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Descriptor->Flags = CM_RESOURCE_PORT_IO |
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CM_RESOURCE_PORT_16_BIT_DECODE |
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CM_RESOURCE_PORT_POSITIVE_DECODE;
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Descriptor->u.Port.Length = 8;
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Descriptor->u.Port.Alignment = 1;
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Descriptor->u.Port.MinimumAddress.QuadPart = (ULONGLONG)CommandPortBase;
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Descriptor->u.Port.MaximumAddress.QuadPart = (ULONGLONG)(CommandPortBase + Descriptor->u.Port.Length - 1);
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Descriptor++;
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/* Control port base */
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Descriptor->Option = 0; /* Required */
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Descriptor->Type = CmResourceTypePort;
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Descriptor->ShareDisposition = CmResourceShareDeviceExclusive;
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Descriptor->Flags = CM_RESOURCE_PORT_IO |
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CM_RESOURCE_PORT_16_BIT_DECODE |
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CM_RESOURCE_PORT_POSITIVE_DECODE;
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Descriptor->u.Port.Length = 1;
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Descriptor->u.Port.Alignment = 1;
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Descriptor->u.Port.MinimumAddress.QuadPart = (ULONGLONG)ControlPortBase;
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Descriptor->u.Port.MaximumAddress.QuadPart = (ULONGLONG)(ControlPortBase + Descriptor->u.Port.Length - 1);
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Descriptor++;
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/* Interrupt */
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Descriptor->Option = 0; /* Required */
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Descriptor->Type = CmResourceTypeInterrupt;
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Descriptor->ShareDisposition = CmResourceShareShared;
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Descriptor->Flags = CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE;
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Descriptor->u.Interrupt.MinimumVector = InterruptVector;
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Descriptor->u.Interrupt.MaximumVector = InterruptVector;
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*Information = (ULONG_PTR)RequirementsList;
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return STATUS_SUCCESS;
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}
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static NTSTATUS
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PciIdeXPdoQueryDeviceText(
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IN PDEVICE_OBJECT DeviceObject,
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IN PIRP Irp,
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OUT ULONG_PTR* Information)
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{
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PPDO_DEVICE_EXTENSION DeviceExtension;
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ULONG DeviceTextType;
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PCWSTR SourceString;
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UNICODE_STRING String;
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DeviceTextType = IoGetCurrentIrpStackLocation(Irp)->Parameters.QueryDeviceText.DeviceTextType;
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DeviceExtension = (PPDO_DEVICE_EXTENSION)DeviceObject->DeviceExtension;
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switch (DeviceTextType)
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{
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case DeviceTextDescription:
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case DeviceTextLocationInformation:
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{
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DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_TEXT / %S\n",
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DeviceTextType == DeviceTextDescription ? L"DeviceTextDescription" : L"DeviceTextLocationInformation");
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if (DeviceExtension->Channel == 0)
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SourceString = L"Primary channel";
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else
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SourceString = L"Secondary channel";
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break;
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}
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default:
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DPRINT1("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_TEXT / unknown type 0x%lx\n", DeviceTextType);
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ASSERT(FALSE);
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return STATUS_NOT_SUPPORTED;
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}
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if (RtlCreateUnicodeString(&String, SourceString))
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{
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*Information = (ULONG_PTR)String.Buffer;
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return STATUS_SUCCESS;
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}
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else
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return STATUS_INSUFFICIENT_RESOURCES;
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}
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static NTSTATUS
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PciIdeXPdoQueryDeviceRelations(
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IN PDEVICE_OBJECT DeviceObject,
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OUT PDEVICE_RELATIONS* pDeviceRelations)
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{
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PFDO_DEVICE_EXTENSION DeviceExtension;
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PDEVICE_RELATIONS DeviceRelations;
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DeviceExtension = (PFDO_DEVICE_EXTENSION)DeviceObject->DeviceExtension;
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ASSERT(DeviceExtension->Common.IsFDO);
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DeviceRelations = (PDEVICE_RELATIONS)ExAllocatePool(
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PagedPool,
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sizeof(DEVICE_RELATIONS));
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if (!DeviceRelations)
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return STATUS_INSUFFICIENT_RESOURCES;
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ObReferenceObject(DeviceObject);
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DeviceRelations->Count = 1;
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DeviceRelations->Objects[0] = DeviceObject;
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*pDeviceRelations = DeviceRelations;
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return STATUS_SUCCESS;
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}
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NTSTATUS NTAPI
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PciIdeXPdoPnpDispatch(
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IN PDEVICE_OBJECT DeviceObject,
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IN PIRP Irp)
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{
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ULONG MinorFunction;
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PIO_STACK_LOCATION Stack;
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ULONG_PTR Information = Irp->IoStatus.Information;
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NTSTATUS Status;
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Stack = IoGetCurrentIrpStackLocation(Irp);
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MinorFunction = Stack->MinorFunction;
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switch (MinorFunction)
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{
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/* FIXME:
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* Those are required:
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* IRP_MN_START_DEVICE (done)
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* IRP_MN_QUERY_STOP_DEVICE
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* IRP_MN_STOP_DEVICE
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* IRP_MN_CANCEL_STOP_DEVICE
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* IRP_MN_QUERY_REMOVE_DEVICE
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* IRP_MN_REMOVE_DEVICE
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* IRP_MN_CANCEL_REMOVE_DEVICE
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* IRP_MN_SURPRISE_REMOVAL
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* IRP_MN_QUERY_CAPABILITIES (done)
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* IRP_MN_QUERY_DEVICE_RELATIONS / TargetDeviceRelations (done)
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* IRP_MN_QUERY_ID / BusQueryDeviceID (done)
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* Those may be required/optional:
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* IRP_MN_DEVICE_USAGE_NOTIFICATION
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* IRP_MN_QUERY_RESOURCES
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* IRP_MN_QUERY_RESOURCE_REQUIREMENTS (done)
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* IRP_MN_QUERY_DEVICE_TEXT
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* IRP_MN_QUERY_BUS_INFORMATION
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* IRP_MN_QUERY_INTERFACE
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* IRP_MN_READ_CONFIG
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* IRP_MN_WRITE_CONFIG
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* IRP_MN_EJECT
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* IRP_MN_SET_LOCK
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* Those are optional:
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* IRP_MN_QUERY_DEVICE_RELATIONS / EjectionRelations
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* IRP_MN_QUERY_ID / BusQueryHardwareIDs (done)
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* IRP_MN_QUERY_ID / BusQueryCompatibleIDs (done)
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* IRP_MN_QUERY_ID / BusQueryInstanceID (done)
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*/
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case IRP_MN_START_DEVICE: /* 0x00 */
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{
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DPRINT("IRP_MJ_PNP / IRP_MN_START_DEVICE\n");
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Status = STATUS_SUCCESS;
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break;
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}
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case IRP_MN_QUERY_REMOVE_DEVICE: /* 0x01 */
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{
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DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_REMOVE_DEVICE\n");
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Status = STATUS_UNSUCCESSFUL;
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break;
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}
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case IRP_MN_QUERY_DEVICE_RELATIONS: /* 0x07 */
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{
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switch (Stack->Parameters.QueryDeviceRelations.Type)
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{
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case TargetDeviceRelation:
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{
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PDEVICE_RELATIONS DeviceRelations = NULL;
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DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_RELATIONS / TargetDeviceRelation\n");
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Status = PciIdeXPdoQueryDeviceRelations(DeviceObject, &DeviceRelations);
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Information = (ULONG_PTR)DeviceRelations;
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break;
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}
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default:
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{
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DPRINT1("IRP_MJ_PNP / IRP_MN_QUERY_DEVICE_RELATIONS / Unknown type 0x%lx\n",
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Stack->Parameters.QueryDeviceRelations.Type);
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Status = Irp->IoStatus.Status;
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break;
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}
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}
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break;
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}
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case IRP_MN_QUERY_CAPABILITIES: /* 0x09 */
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{
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PDEVICE_CAPABILITIES DeviceCapabilities;
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ULONG i;
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DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_CAPABILITIES\n");
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DeviceCapabilities = (PDEVICE_CAPABILITIES)Stack->Parameters.DeviceCapabilities.Capabilities;
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/* FIXME: capabilities can change with connected device */
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DeviceCapabilities->LockSupported = FALSE;
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DeviceCapabilities->EjectSupported = FALSE;
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DeviceCapabilities->Removable = TRUE;
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DeviceCapabilities->DockDevice = FALSE;
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DeviceCapabilities->UniqueID = FALSE;
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DeviceCapabilities->SilentInstall = FALSE;
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DeviceCapabilities->RawDeviceOK = FALSE;
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DeviceCapabilities->SurpriseRemovalOK = TRUE;
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DeviceCapabilities->HardwareDisabled = FALSE; /* FIXME */
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//DeviceCapabilities->NoDisplayInUI = FALSE; /* FIXME */
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DeviceCapabilities->DeviceState[0] = PowerDeviceD0; /* FIXME */
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for (i = 0; i < PowerSystemMaximum; i++)
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DeviceCapabilities->DeviceState[i] = PowerDeviceD3; /* FIXME */
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//DeviceCapabilities->DeviceWake = PowerDeviceUndefined; /* FIXME */
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DeviceCapabilities->D1Latency = 0; /* FIXME */
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DeviceCapabilities->D2Latency = 0; /* FIXME */
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DeviceCapabilities->D3Latency = 0; /* FIXME */
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Status = STATUS_SUCCESS;
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break;
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}
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case IRP_MN_QUERY_RESOURCES: /* 0x0a */
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{
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/* This IRP is optional; do nothing */
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Information = Irp->IoStatus.Information;
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Status = Irp->IoStatus.Status;
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break;
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}
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case IRP_MN_QUERY_RESOURCE_REQUIREMENTS: /* 0x0b */
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{
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DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_RESOURCE_REQUIREMENTS\n");
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Status = PciIdeXPdoQueryResourceRequirements(DeviceObject, Irp, &Information);
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break;
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}
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case IRP_MN_QUERY_DEVICE_TEXT: /* 0x0c */
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{
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Status = PciIdeXPdoQueryDeviceText(DeviceObject, Irp, &Information);
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break;
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}
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case IRP_MN_FILTER_RESOURCE_REQUIREMENTS: /* 0x0d */
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{
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DPRINT("IRP_MJ_PNP / IRP_MN_FILTER_RESOURCE_REQUIREMENTS\n");
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Information = Irp->IoStatus.Information;
|
|
Status = Irp->IoStatus.Status;
|
|
break;
|
|
}
|
|
case IRP_MN_QUERY_ID: /* 0x13 */
|
|
{
|
|
Status = PciIdeXPdoQueryId(DeviceObject, Irp, &Information);
|
|
break;
|
|
}
|
|
case IRP_MN_QUERY_PNP_DEVICE_STATE: /* 0x14 */
|
|
{
|
|
DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_PNP_DEVICE_STATE\n");
|
|
Information |= PNP_DEVICE_NOT_DISABLEABLE;
|
|
Status = STATUS_SUCCESS;
|
|
break;
|
|
}
|
|
case IRP_MN_QUERY_BUS_INFORMATION: /* 0x15 */
|
|
{
|
|
PPNP_BUS_INFORMATION BusInfo;
|
|
DPRINT("IRP_MJ_PNP / IRP_MN_QUERY_BUS_INFORMATION\n");
|
|
|
|
BusInfo = (PPNP_BUS_INFORMATION)ExAllocatePool(PagedPool, sizeof(PNP_BUS_INFORMATION));
|
|
if (!BusInfo)
|
|
Status = STATUS_INSUFFICIENT_RESOURCES;
|
|
else
|
|
{
|
|
/*RtlCopyMemory(
|
|
&BusInfo->BusTypeGuid,
|
|
&GUID_DEVINTERFACE_XXX,
|
|
sizeof(GUID));*/
|
|
BusInfo->LegacyBusType = PNPBus;
|
|
BusInfo->BusNumber = 0; /* FIXME */
|
|
Information = (ULONG_PTR)BusInfo;
|
|
Status = STATUS_SUCCESS;
|
|
}
|
|
break;
|
|
}
|
|
default:
|
|
{
|
|
/* We can't forward request to the lower driver, because
|
|
* we are a Pdo, so we don't have lower driver... */
|
|
DPRINT1("IRP_MJ_PNP / Unknown minor function 0x%lx\n", MinorFunction);
|
|
Information = Irp->IoStatus.Information;
|
|
Status = Irp->IoStatus.Status;
|
|
}
|
|
}
|
|
|
|
Irp->IoStatus.Information = Information;
|
|
Irp->IoStatus.Status = Status;
|
|
IoCompleteRequest(Irp, IO_NO_INCREMENT);
|
|
return Status;
|
|
}
|