mirror of
https://github.com/reactos/reactos.git
synced 2024-07-06 12:45:16 +00:00
270 lines
6.7 KiB
C
270 lines
6.7 KiB
C
/*
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* COPYRIGHT: GPL - See COPYING in the top level directory
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* PROJECT: ReactOS Virtual DOS Machine
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* FILE: vga.h
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* PURPOSE: VGA hardware emulation (header file)
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* PROGRAMMERS: Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
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*/
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#ifndef _VGA_H_
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#define _VGA_H_
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/* INCLUDES *******************************************************************/
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#include "ntvdm.h"
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/* DEFINES ********************************************************************/
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#define VGA_NUM_BANKS 4
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#define VGA_BANK_SIZE 0x10000
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#define VGA_MAX_COLORS 256
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#define VGA_PALETTE_SIZE (VGA_MAX_COLORS * 3)
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#define VGA_BITMAP_INFO_SIZE (sizeof(BITMAPINFOHEADER) + 2 * (VGA_PALETTE_SIZE / 3))
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#define VGA_MINIMUM_WIDTH 400
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#define VGA_MINIMUM_HEIGHT 300
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#define VGA_DAC_TO_COLOR(x) (((x) << 2) | ((x) >> 4))
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#define VGA_COLOR_TO_DAC(x) ((x) >> 2)
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/* Register I/O ports */
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#define VGA_MISC_READ 0x3CC
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#define VGA_MISC_WRITE 0x3C2
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#define VGA_INSTAT0_READ 0x3C2
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#define VGA_INSTAT1_READ_MONO 0x3BA
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#define VGA_INSTAT1_READ_COLOR 0x3DA
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#define VGA_FEATURE_READ 0x3CA
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#define VGA_FEATURE_WRITE_MONO 0x3BA
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#define VGA_FEATURE_WRITE_COLOR 0x3DA
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#define VGA_AC_INDEX 0x3C0
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#define VGA_AC_WRITE 0x3C0
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#define VGA_AC_READ 0x3C1
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#define VGA_SEQ_INDEX 0x3C4
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#define VGA_SEQ_DATA 0x3C5
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#define VGA_DAC_MASK 0x3C6
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#define VGA_DAC_READ_INDEX 0x3C7
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#define VGA_DAC_WRITE_INDEX 0x3C8
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#define VGA_DAC_DATA 0x3C9
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#define VGA_CRTC_INDEX_MONO 0x3B4
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#define VGA_CRTC_DATA_MONO 0x3B5
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#define VGA_CRTC_INDEX_COLOR 0x3D4
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#define VGA_CRTC_DATA_COLOR 0x3D5
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#define VGA_GC_INDEX 0x3CE
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#define VGA_GC_DATA 0x3CF
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//
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// Miscellaneous and Status Registers
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//
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/* Miscellaneous register bits */
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#define VGA_MISC_COLOR (1 << 0)
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#define VGA_MISC_RAM_ENABLED (1 << 1)
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// #define VGA_MISC_CSEL1 (1 << 2)
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// #define VGA_MISC_CSEL2 (1 << 3)
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#define VGA_MISC_OE_INVERT (1 << 5)
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#define VGA_MISC_HSYNCP (1 << 6)
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#define VGA_MISC_VSYNCP (1 << 7)
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/* Status register flags */
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#define VGA_STAT_DD (1 << 0)
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#define VGA_STAT_VRETRACE (1 << 3)
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//
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// Sequencer Registers
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//
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/* Sequencer reset register bits */
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#define VGA_SEQ_RESET_AR (1 << 0)
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#define VGA_SEQ_RESET_SR (1 << 1)
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/* Sequencer clock register bits */
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#define VGA_SEQ_CLOCK_98DM (1 << 0)
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#define VGA_SEQ_CLOCK_SLR (1 << 2)
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#define VGA_SEQ_CLOCK_DCR (1 << 3)
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#define VGA_SEQ_CLOCK_S4 (1 << 4)
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#define VGA_SEQ_CLOCK_SD (1 << 5)
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/* Sequencer memory register bits */
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#define VGA_SEQ_MEM_EXT (1 << 1)
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#define VGA_SEQ_MEM_OE (1 << 2)
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#define VGA_SEQ_MEM_C4 (1 << 3)
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enum
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{
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VGA_SEQ_RESET_REG,
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VGA_SEQ_CLOCK_REG,
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VGA_SEQ_MASK_REG,
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VGA_SEQ_CHAR_REG,
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VGA_SEQ_MEM_REG,
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VGA_SEQ_MAX_REG
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};
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//
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// CRT Controller Registers
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//
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/* CRTC overflow register bits */
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#define VGA_CRTC_OVERFLOW_VT8 (1 << 0)
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#define VGA_CRTC_OVERFLOW_VDE8 (1 << 1)
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#define VGA_CRTC_OVERFLOW_VRS8 (1 << 2)
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#define VGA_CRTC_OVERFLOW_SVB8 (1 << 3)
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#define VGA_CRTC_OVERFLOW_LC8 (1 << 4)
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#define VGA_CRTC_OVERFLOW_VT9 (1 << 5)
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#define VGA_CRTC_OVERFLOW_VDE9 (1 << 6)
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#define VGA_CRTC_OVERFLOW_VRS9 (1 << 7)
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/* CRTC underline register bits */
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#define VGA_CRTC_UNDERLINE_DWORD (1 << 6)
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/* CRTC max scanline register bits */
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#define VGA_CRTC_MAXSCANLINE_DOUBLE (1 << 7)
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/* CRTC mode control register bits */
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#define VGA_CRTC_MODE_CONTROL_WRAP (1 << 5)
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#define VGA_CRTC_MODE_CONTROL_BYTE (1 << 6)
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#define VGA_CRTC_MODE_CONTROL_SYNC (1 << 7)
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enum
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{
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VGA_CRTC_HORZ_TOTAL_REG,
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VGA_CRTC_END_HORZ_DISP_REG,
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VGA_CRTC_START_HORZ_BLANKING_REG,
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VGA_CRTC_END_HORZ_BLANKING_REG,
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VGA_CRTC_START_HORZ_RETRACE_REG,
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VGA_CRTC_END_HORZ_RETRACE_REG,
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VGA_CRTC_VERT_TOTAL_REG,
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VGA_CRTC_OVERFLOW_REG,
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VGA_CRTC_PRESET_ROW_SCAN_REG,
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VGA_CRTC_MAX_SCAN_LINE_REG,
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VGA_CRTC_CURSOR_START_REG,
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VGA_CRTC_CURSOR_END_REG,
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VGA_CRTC_START_ADDR_HIGH_REG,
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VGA_CRTC_START_ADDR_LOW_REG,
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VGA_CRTC_CURSOR_LOC_HIGH_REG,
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VGA_CRTC_CURSOR_LOC_LOW_REG,
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VGA_CRTC_VERT_RETRACE_START_REG,
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VGA_CRTC_VERT_RETRACE_END_REG,
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VGA_CRTC_VERT_DISP_END_REG,
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VGA_CRTC_OFFSET_REG,
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VGA_CRTC_UNDERLINE_REG,
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VGA_CRTC_START_VERT_BLANKING_REG,
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VGA_CRTC_END_VERT_BLANKING,
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VGA_CRTC_MODE_CONTROL_REG,
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VGA_CRTC_LINE_COMPARE_REG,
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VGA_CRTC_MAX_REG
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};
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//
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// Graphics Controller Registers
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//
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/* Graphics controller mode register bits */
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#define VGA_GC_MODE_READ (1 << 3)
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#define VGA_GC_MODE_OE (1 << 4)
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#define VGA_GC_MODE_SHIFTREG (1 << 5)
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#define VGA_GC_MODE_SHIFT256 (1 << 6)
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/* Graphics controller miscellaneous register bits */
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#define VGA_GC_MISC_NOALPHA (1 << 0)
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#define VGA_GC_MISC_OE (1 << 1)
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enum
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{
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VGA_GC_RESET_REG,
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VGA_GC_ENABLE_RESET_REG,
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VGA_GC_COLOR_COMPARE_REG,
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VGA_GC_ROTATE_REG,
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VGA_GC_READ_MAP_SEL_REG,
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VGA_GC_MODE_REG,
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VGA_GC_MISC_REG,
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VGA_GC_COLOR_IGNORE_REG,
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VGA_GC_BITMASK_REG,
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VGA_GC_MAX_REG
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};
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//
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// Attribute Controller Registers
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// They are a relinquish of the CGA/EGA era.
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//
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/* AC mode control register bits */
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#define VGA_AC_CONTROL_ATGE (1 << 0)
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#define VGA_AC_CONTROL_MONO (1 << 1)
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#define VGA_AC_CONTROL_LGE (1 << 2)
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#define VGA_AC_CONTROL_BLINK (1 << 3)
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#define VGA_AC_CONTROL_PPM (1 << 5)
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#define VGA_AC_CONTROL_8BIT (1 << 6)
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#define VGA_AC_CONTROL_P54S (1 << 7)
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enum
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{
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VGA_AC_PAL_0_REG,
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VGA_AC_PAL_1_REG,
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VGA_AC_PAL_2_REG,
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VGA_AC_PAL_3_REG,
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VGA_AC_PAL_4_REG,
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VGA_AC_PAL_5_REG,
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VGA_AC_PAL_6_REG,
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VGA_AC_PAL_7_REG,
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VGA_AC_PAL_8_REG,
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VGA_AC_PAL_9_REG,
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VGA_AC_PAL_A_REG,
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VGA_AC_PAL_B_REG,
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VGA_AC_PAL_C_REG,
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VGA_AC_PAL_D_REG,
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VGA_AC_PAL_E_REG,
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VGA_AC_PAL_F_REG,
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VGA_AC_CONTROL_REG,
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VGA_AC_OVERSCAN_REG,
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VGA_AC_COLOR_PLANE_REG,
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VGA_AC_HORZ_PANNING_REG,
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VGA_AC_COLOR_SEL_REG,
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VGA_AC_MAX_REG
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};
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typedef struct _VGA_REGISTERS
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{
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UCHAR Misc;
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UCHAR Sequencer[VGA_SEQ_MAX_REG];
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UCHAR CRT[VGA_CRTC_MAX_REG];
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UCHAR Graphics[VGA_GC_MAX_REG];
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UCHAR Attribute[VGA_AC_MAX_REG];
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} VGA_REGISTERS, *PVGA_REGISTERS;
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/* FUNCTIONS ******************************************************************/
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DWORD VgaGetVideoBaseAddress(VOID);
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DWORD VgaGetVideoLimitAddress(VOID);
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COORD VgaGetDisplayResolution(VOID);
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VOID VgaRefreshDisplay(VOID);
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VOID VgaHorizontalRetrace(VOID);
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VOID VgaReadMemory(DWORD Address, LPBYTE Buffer, DWORD Size);
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VOID VgaWriteMemory(DWORD Address, LPBYTE Buffer, DWORD Size);
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VOID VgaClearMemory(VOID);
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VOID VgaResetPalette(VOID);
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BOOLEAN VgaInitialize(HANDLE TextHandle);
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BYTE WINAPI VgaReadPort(ULONG Port);
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VOID WINAPI VgaWritePort(ULONG Port, BYTE Data);
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#endif // _VGA_H_
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/* EOF */
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