This also removes the following warnings, that were present because,
as the ACPICA acpi.h header was used as PCH (instead of none, or the
hal's own main header), it was "included" before any other header
-- and in particular, before hal.h -- and as a result, colliding defines
were still defined even if the #undef tricks were used for them.
rosbuilds\sdk\include\reactos\mc\bugcodes.h(1417): warning C4005: 'ACPI_BIOS_ERROR': macro redefinition
reactos\drivers\bus\acpi\acpica\include\acoutput.h(243): note: see previous definition of 'ACPI_BIOS_ERROR'
reactos\hal\halx86\include\hal.h(41): warning C4109: unexpected identifier '_read'
reactos\hal\halx86\include\hal.h(42): warning C4109: unexpected identifier '_read'
The HalpBiosDisplayReset() function is currently stub-plemented.
Returning FALSE will make bootvid take the route of fully
re-initializing the VGA display all by itself.
Simplify code, instead of adding 2 missing ObDereferenceObject().
(Note that ObInsertObject() always dereferences the object in case of failure.)
CORE-17904
The interval time is now calculated in 0.1ns precision and a running fraction on the 100ns interval is updated on each clock interrupt.
Also adjust minimum, maximum and default clock rate to what Windows uses.
Previously we enabled the timer interrupt, before the kernel was notified of our time increment, so when a clock interrupt happened, it would increment the tick count, but add 0 to the system time, resulting in an invalid state, in which timers would be inserted into the wrong timer table slot. Fixes CORE-16253
* Fix some broken code
* Add some ASSERTs
* Use ApicWriteIORedirectionEntry where appropriate
* Use KeQueryInterruptHandler/KeRegisterInterruptHandler to save/restore the old handler instead of saving the KIDTENTRY
* Move HalpProfileInterruptHandler to apictimer.c and implement it
* Use READ/WRITE_REGISTER macros
* Add some symbolic names
This fixes the recursion when pci.sys attempts to get PCI bridge children
devices, which in fact are non-existing.
Note that the problem in pci.sys itself also deserves a separate fix.
CORE-16319 CORE-16216
- Bridge devices don't have Subsystem ID and Subsystem Vendor ID
- Also they have only two BARs, don't parse data outside of bounds
Addendum to b232efe1. CORE-16319 CORE-16216
Lazy IRQL feature has issues with interrupt delivery on VirtualBox, so disable it for now.
For the feature description, see commit d28eae967a
Meanwhile, merge and clean up APIC headers a bit
- Rename UP -> PIC. The "up" folder in fact contains the code for
managing the Intel 8259 PIC chip
- Move amd64/processor.c -> apic/processor.c. The code is not tied to
amd64
- Remove platform from "halinit*" files. They already reside in the
corresponding folder
Extracted from the pci.ids database at https://pci-ids.ucw.cz/ from 2020-11-14 03:15:02 .
Maintained by Albert Pool, Martin Mares, and other volunteers from the PCI ID Project.
Co-authored-by: Hermès BÉLUSCA - MAÏTO <hermes.belusca-maito@reactos.org>
Our PnP manager handles OS boot in a synchronous manner thus we don't
need it anymore.
This effectively reverts f23e722, d974e84, 3aff101 and 4a9fcb6
CORE-5686
* Call HalInitializeBios both in phase 0 and 1
* In phase 0 allocate some physical memory, instead of using arbitrary hardcoded pages, that then end up as page tables and get filled with VESA tables
- Change INIT_FUNCTION and INIT_SECTION to CODE_SEG("INIT") and DATA_SEG("INIT") respectively
- Remove INIT_FUNCTION from function prototypes
- Remove alloc_text pragma calls as they are not needed anymore
