Commit graph

55327 commits

Author SHA1 Message Date
Aleksandar Andrejevic 4b005f11bf [FAST486]
- When accessing memory using ESP, make the SS segment default.
- The INT instructions always pushes 16-bit values in real mode, regardless
  of the operand/address size attributes.


svn path=/branches/ntvdm/; revision=61000
2013-11-15 20:49:48 +00:00
Aleksandar Andrejevic f5d0d3e784 [FAST486]
The CS cached descriptor has the default operand size, even for stack
operations.


svn path=/branches/ntvdm/; revision=60996
2013-11-15 04:16:25 +00:00
Aleksandar Andrejevic bbc9efd2d9 [FAST486]
- Fix the privilege checks.
- Store the CPL in a special field, so that it doesn't get mixed up
  with the lowest 2 bits of real mode selectors while switching
  into protected mode.
- Reset the exception count after a successful ISR call.
- In Fast486OpcodeGroup0F01, check for prefix overrides after parsing
  the Mod-Reg-R/M, which might add a SS: prefix override in some cases.


svn path=/branches/ntvdm/; revision=60995
2013-11-15 02:32:08 +00:00
Aleksandar Andrejevic 5e54387a9c [FAST486]
Fix the previous fix. ESI was already updated earlier in the function.


svn path=/branches/ntvdm/; revision=60990
2013-11-14 03:11:33 +00:00
Aleksandar Andrejevic 14a31007fc [FAST486]
Fix previous fix.


svn path=/branches/ntvdm/; revision=60989
2013-11-14 03:03:23 +00:00
Aleksandar Andrejevic 9c66549845 [FAST486]
Update the register values in REP LODS.


svn path=/branches/ntvdm/; revision=60988
2013-11-14 02:54:20 +00:00
Aleksandar Andrejevic cdf876ead9 [FAST486]
Fix the BSF and BSR instructions. Partially fix SHLD and SHRD.


svn path=/branches/ntvdm/; revision=60987
2013-11-14 02:39:54 +00:00
Aleksandar Andrejevic a3513c8f18 [FAST486]
Fix previous fix.


svn path=/branches/ntvdm/; revision=60985
2013-11-13 22:34:38 +00:00
Aleksandar Andrejevic cd496c8e21 [FAST486]
XADD: Fix the order of operations.
POP <modrm>: The value must be popped from the stack before parsing the
Mod-Reg-R/M, because of the "POP DWORD [ESP]" case.


svn path=/branches/ntvdm/; revision=60984
2013-11-13 22:33:37 +00:00
Aleksandar Andrejevic 53dfb7da48 [FAST486]
LOOP and JECXZ use the ADSIZE attribute, not OPSIZE.


svn path=/branches/ntvdm/; revision=60977
2013-11-13 19:20:04 +00:00
Aleksandar Andrejevic ace025dca9 [FAST486]
The bit number should be normalized to [0, DataSize- 1], not [0, 2 ^ DataSize - 1].


svn path=/branches/ntvdm/; revision=60975
2013-11-13 18:14:01 +00:00
Aleksandar Andrejevic acccaf3a90 [FAST486]
Fix a bug in the ROL and ROR instructions.


svn path=/branches/ntvdm/; revision=60972
2013-11-13 13:32:00 +00:00
Aleksandar Andrejevic c7de214d81 [FAST486]
Fix several bugs in Fast486RotateOperation.


svn path=/branches/ntvdm/; revision=60969
2013-11-13 02:38:36 +00:00
Aleksandar Andrejevic 677810ea95 [FAST486]
Don't return uninitialized variables.


svn path=/branches/ntvdm/; revision=60967
2013-11-12 21:55:05 +00:00
Aleksandar Andrejevic 2da0e38fbc [FAST486]
In rotate operations, the count is always masked with 0x1F, regardless
of the operand size.


svn path=/branches/ntvdm/; revision=60966
2013-11-12 19:25:50 +00:00
Aleksandar Andrejevic ac9f8a81e3 [FAST486]
Don't forget to check for the operand/address size prefix.


svn path=/branches/ntvdm/; revision=60964
2013-11-12 18:40:13 +00:00
Aleksandar Andrejevic 0aed89f779 [FAST486]
Fix the 3-byte IMUL instruction. If the operand size is 16-bit, the
result should be written in 16-bit too.


svn path=/branches/ntvdm/; revision=60963
2013-11-12 18:21:30 +00:00
Aleksandar Andrejevic cf559336a1 [NTVDM]
The command line in the PSP consists only of the parameters, the program
name is omitted.


svn path=/branches/ntvdm/; revision=60959
2013-11-12 01:56:18 +00:00
Aleksandar Andrejevic 1ff6bc0f8f [NTVDM]
Report the correct number of paragraphs in the PSP of a COM program.


svn path=/branches/ntvdm/; revision=60958
2013-11-12 00:49:02 +00:00
Aleksandar Andrejevic 92d4dd2b64 [FAST486]
Check for interrupts at the end of a cycle, to avoid confusing
debug output.


svn path=/branches/ntvdm/; revision=60956
2013-11-11 20:55:33 +00:00
Aleksandar Andrejevic b781febbfe [NTVDM]
Implement vertical scrolling in BiosScrollWindow.


svn path=/branches/ntvdm/; revision=60955
2013-11-11 20:41:55 +00:00
Aleksandar Andrejevic c7a7dbe7e2 [FAST486]
Fix the previous fix in the Mod-Reg-R/M parser. EBP is still used
if the mode is 1 or 2.


svn path=/branches/ntvdm/; revision=60948
2013-11-11 19:08:28 +00:00
Aleksandar Andrejevic eaf248fe87 [NTVDM]
Implement CMOS registers 15h, 16h, 17h and 18h.


svn path=/branches/ntvdm/; revision=60946
2013-11-11 17:59:04 +00:00
Aleksandar Andrejevic 1d21bb125f [FAST486]
Fix the Mod-Reg-R/M parser. EBP cannot be used as a SIB byte base,
instead it's used to mark that the base is an immediate operand.


svn path=/branches/ntvdm/; revision=60944
2013-11-11 17:24:22 +00:00
Hermès Bélusca-Maïto 0d174d717c [NTVDM]: Display more detailed information about which unknown interruption was called.
svn path=/branches/ntvdm/; revision=60943
2013-11-11 17:05:02 +00:00
Aleksandar Andrejevic 9ccaa9f1c4 [NTVDM]
Implement INT 15h, AH = 87h, "Copy Extended Memory".


svn path=/branches/ntvdm/; revision=60942
2013-11-11 16:47:10 +00:00
Hermès Bélusca-Maïto 77930f2a21 [FAST486]: Put the inlined function in its proper file. No code changes.
svn path=/branches/ntvdm/; revision=60940
2013-11-11 15:34:18 +00:00
Aleksandar Andrejevic 8389b692ea [FAST486]
Fix Fast486GetCurrentPrivLevel.


svn path=/branches/ntvdm/; revision=60939
2013-11-11 15:27:54 +00:00
Aleksandar Andrejevic e53821aed0 [NTVDM]
Implement the miscellaneous BIOS system service (INT 15h) handler.
Implement INT 15h, AH = 88h, "Get Extended Memory Size".


svn path=/branches/ntvdm/; revision=60938
2013-11-11 04:00:10 +00:00
Aleksandar Andrejevic 442302eeb3 [NTVDM]
Give the virtual machine 16 MB of memory, for DOS extenders,
protected mode programs, etc...
EMS is still not implemented.


svn path=/branches/ntvdm/; revision=60937
2013-11-11 03:45:39 +00:00
Aleksandar Andrejevic e3c68b1796 [FAST486]
Fix a bug in the LDS and LES instructions.


svn path=/branches/ntvdm/; revision=60936
2013-11-11 03:16:07 +00:00
Aleksandar Andrejevic f3df799dc2 [FAST486]
Implement the LSS instruction.
Fix a bug in LFS and LGS.


svn path=/branches/ntvdm/; revision=60935
2013-11-11 03:14:18 +00:00
Hermès Bélusca-Maïto ff2d706fb5 [NTVDM]: Fix CMOS file sharing access (so that we allow multiple ntvdm running with the same cmos data).
svn path=/branches/ntvdm/; revision=60934
2013-11-11 02:35:06 +00:00
Aleksandar Andrejevic cc1f7c6985 [NTVDM]
To make debugging easier, put the interrupt handlers at offset 0x1000,
and reserve 16 bytes for each. Also, move the common stub to offset
0x2000. That way the entry point of, for example, INT 0x21 is at
F000:1210.


svn path=/branches/ntvdm/; revision=60933
2013-11-11 02:27:29 +00:00
Aleksandar Andrejevic 153e815f93 [FAST486]
We don't support in-circuit emulation opcodes such as USERMOV.
The 486 does not have the JMPE or POPCNT instructions.


svn path=/branches/ntvdm/; revision=60932
2013-11-11 01:14:24 +00:00
Hermès Bélusca-Maïto 045f939e5c [FAST486]: Remove an extra "return TRUE;"
svn path=/branches/ntvdm/; revision=60931
2013-11-11 01:02:48 +00:00
Aleksandar Andrejevic 83b597be5a [FAST486]
Implement SHLD and SHRD.


svn path=/branches/ntvdm/; revision=60930
2013-11-11 00:57:59 +00:00
Aleksandar Andrejevic 43bbc0afb4 [FAST486]
Implement the two operand version of IMUL.


svn path=/branches/ntvdm/; revision=60929
2013-11-11 00:10:46 +00:00
Aleksandar Andrejevic 9677ec13ad [FAST486]
Don't mix up ADSIZE and OPSIZE (continued).


svn path=/branches/ntvdm/; revision=60927
2013-11-10 23:42:57 +00:00
Aleksandar Andrejevic a2f3c339f4 [FAST486]
Don't mix up ADSIZE and OPSIZE.


svn path=/branches/ntvdm/; revision=60926
2013-11-10 23:34:34 +00:00
Aleksandar Andrejevic 7ec93e81ff [FAST486]
Increment SP, not ESP for 16-bit stacks.


svn path=/branches/ntvdm/; revision=60925
2013-11-10 22:49:19 +00:00
Aleksandar Andrejevic c3c7bb89c1 [FAST486]
Modularize linear memory access by adding two new functions:
Fast486ReadLinearMemory and Fast486WriteLinearMemory.
Implement Fast486GetPageTableEntry.


svn path=/branches/ntvdm/; revision=60923
2013-11-10 22:27:24 +00:00
Aleksandar Andrejevic 7c036fd0f7 [NTVDM]
Remove unnecessary indentation and clarify the code a bit.


svn path=/branches/ntvdm/; revision=60919
2013-11-10 18:14:40 +00:00
Hermès Bélusca-Maïto e4946e8b85 [NTVDM]
Instead of reassembling each time the very same common stub code for each interrupt, do it once, and then assemble just a little part for each interrupt and jump to the common stub.
Now the 4DOS Ctrl-C exception bug changes, but I have an idea what's happening in there...

svn path=/branches/ntvdm/; revision=60917
2013-11-10 16:22:33 +00:00
Hermès Bélusca-Maïto bf2731fb9f [NTVDM]
- BIOS: Reorganize a bit the header, and close the input thread before closing the input handle (and not after).
- INT32: Fix a comment.
- CMOS: Put CMOS data into a structure called CMOS_MEMORY, introduce READ/WRITE_CMOS_DATA macros for simplifying code. Save CMOS memory into a file (à la Windows' NTVDM), which is loaded at startup.

svn path=/branches/ntvdm/; revision=60913
2013-11-10 13:12:02 +00:00
Aleksandar Andrejevic fda5745543 [FAST486]
The number of bit places in a shift operation is ANDed by the width of the type
when it is in a register, so (1 << c), when c is 32, is actually 1, and not 0.
Fix the calculation of MaxValue by using SignFlag | (SignFlag - 1) instead.


svn path=/branches/ntvdm/; revision=60912
2013-11-10 03:11:56 +00:00
Aleksandar Andrejevic e62c987917 [NTVDM]
Fix the jump instruction offset. Spotted by Hermes Belusca-Maito.


svn path=/branches/ntvdm/; revision=60911
2013-11-10 01:19:50 +00:00
Aleksandar Andrejevic cc89902e00 [NTVDM]
Don't enable interrupts unless it's necessary in the interrupt handler.
[FAST486]
When handling interrupt signals, make sure at least one instruction is executed,
to prevent the CPU from being completely blocked by interrupt signals.


svn path=/branches/ntvdm/; revision=60910
2013-11-10 00:53:05 +00:00
Hermès Bélusca-Maïto dd9dafc7ff [NTVDM]
Finish my Interruption revamp.
- Move interrupt-related code from bop.c to int32.c
- Introduce InitializeInt32 helper so that one can initialize all the needed 16-bit stubs for the 32-bit interrupts.
- Remove unneeded defines in emulator.h and an exported variable in ntvdm.h.

svn path=/branches/ntvdm/; revision=60908
2013-11-09 23:01:11 +00:00
Hermès Bélusca-Maïto 6da6a5ce56 [NTVDM]
Start my work on modularizing registration of "32-bit" interrupts, i.e.
interrupts that are implemented in 32-bit mode, but are stubbed with 16-bit
code (so that 16-bit apps can call them).
The 16-bit stub code uses a BOP call to our Control BOP function (BOP 0xFF) which
can handle in theory many sub-functions (as the BOP 0x58 documented here: http://www.ragestorm.net/tutorial?id=27)
specified as an additional BYTE in the call:
0xC4 0xC4 bop_code <optional_bop_subfunction>
Here, for calling 32-bit interrupts we use our BOP 0xFF, subfunction 0xFF.
The final aim would be to generate the 16-bit stub code when one calls the RegisterInt32 helper function
(contrary to what's happening now, that is, the 16-bit stub code is generated for all of the interrupts
at BIOS initialization time, and we use it for BIOS and DOS interrupts).

svn path=/branches/ntvdm/; revision=60907
2013-11-09 22:15:40 +00:00