While PROFILE_LEVEL is defined as 27 on x86, this does not match the vector for the profiling interrupt, which is 0xFD (see https://community.osr.com/t/odd-ioapic-output/45216), implying IRQL 31.
Fixes boot with x86 APIC hal (CORE-20093)
Write both high and low 32 bits of ICR in ApicRequestSelfInterrupt. In VMs we get away with only writing the low 32 bits, but actual hardware doesn't always accept that.
* [FREELDR] Mark noreturn functions
* [FREELDR] Compile hw debugging support code only in debug builds
- Make BREAKPOINT() portable
* [FREELDR] Consolidate identical names into a single string
* [FREELDR] Use intrinsics for string I/O operations on x86 and x64
Stop them being pulled in from a static minihal library
* [MINIHAL] Exclude unnecessary portio dependency
This is required, so that the definition is available when preprocessing asm files on MSVC builds. Otherwise systimer.s will contain KeStallExecutionProcessor, which must not be used in freeldr.
URLs are getting old. We have to
update URLs for documentation
purpose.
JIRA issue: CORE-19963
- Refresh old URLs.
- Add " (DEAD_LINK)" labels
to dead links.
- Use MS Learn links rather
than MSDN ones.
- Some dead links revived by
Web Archive.
- Don't change Wine Tests
and Wine Sync.
- Don't change 3rd party libraries.
- Don't append "redirected" labels.
While the BIOS support for INT10h emulation has been set up, any
modification of the display should wait until the kernel requests
video initialization with INBV/bootvid.
The latter will call HalResetDisplay() (that calls HalpBiosDisplayReset())
at the correct time.
This avoids an useless video mode change and reset when booting ReactOS.
- Don't use CONFIG_SMP, this isn't handled in (most of) hal
- Add a dummy HalpSetupProcessorsTable for UP
- Call HalpRegisterKdSupportFunctions only for processor 0
Co-authored-by: Victor Perevertkin <victor.perevertkin@reactos.org>
Introduce the initial changes needed to get other processors up and into kernel mode.
This only supports x86 as of now but is the first real step towards using other system processors.
This will be needed for compatibility with x86 Windows Vista/7 videoprt.sys builds.
Might be also useful in future for platforms (x86 , ...) where V86 mode is not available or buggy.
CORE-11954, CORE-18185
Extracted from the pci.ids database at https://pci-ids.ucw.cz/ from 2023-06-19 03:15:02.
Maintained by Albert Pool, Martin Mares, and other volunteers from the PCI ID Project.
This allows to somewhat reduce their size, and the resulting size
of the generated hal.dll file.
pci_classes.ids
Before: 6,207 bytes
After : 5,968 bytes
Reduction: 239 bytes --> 4%
pci_vendors.ids
Before: 1,370,248 bytes
After : 1,334,622 bytes
Reduction: 35,626 bytes --> 2.6%
Co-authored-by: Stanislav Motylkov <x86corez@gmail.com>
Only done in our own code, not in 3rd-party or in PSDK headers
(official ones also have such typos in defines...)
(NOTE: apparent "Uknown" typo in dll/cpl/sysdm/smbios.c is on-purpose:
typo by the manufacturer.)
- Remove ContextValue variable. This variable erroneously truncated
*Context value (that can contain a pointer value) to 32 bits.
- Gracefully fail instead of asserting.
Extracted from the pci.ids database at https://pci-ids.ucw.cz/ from 2022-11-25 03:15:01 .
Maintained by Albert Pool, Martin Mares, and other volunteers from the PCI ID Project.
Use an INT call stub and exit on the address after the stub instead or using iret (some BIOS code uses int / iret internally). This fixes the messed up display when trying to switch modes.
