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[HALX86] Fix SYNCH_LEVEL differences between UP and SMP in HAL (#5874)

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First step to fixing the multiprocessor kernel when booting on a single core.
This commit is contained in:
Justin Miller 2024-01-20 06:26:59 -08:00 committed by GitHub
parent 9c1cfe0587
commit 3306a16e84
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GPG key ID: B5690EEEBB952194
2 changed files with 15 additions and 1 deletions
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8
hal/halx86/generic/buildtype.c
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@ -1,7 +1,7 @@
/*
* PROJECT: ReactOS Hardware Abstraction Layer
* LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
* PURPOSE: Defines HalpBuildType for either UP or SMP
* PURPOSE: Defines differences for either UP or SMP
* COPYRIGHT: Copyright 2021 Timo Kreuzer <timo.kreuzer@reactos.org>
*/
@ -12,3 +12,9 @@
/* GLOBALS ******************************************************************/
const USHORT HalpBuildType = HAL_BUILD_TYPE;
#ifdef CONFIG_SMP
KIRQL HalpIrqlSynchLevel = IPI_LEVEL - 2;
#else
KIRQL HalpIrqlSynchLevel = DISPATCH_LEVEL;
#endif

8
hal/halx86/include/halp.h
View file

@ -10,6 +10,14 @@
#define HAL_BUILD_TYPE ((DBG ? PRCB_BUILD_DEBUG : 0) | PRCB_BUILD_UNIPROCESSOR)
#endif
/* Don't include this in freeloader */
#ifndef _BLDR_
extern KIRQL HalpIrqlSynchLevel;
#undef SYNCH_LEVEL
#define SYNCH_LEVEL HalpIrqlSynchLevel
#endif
typedef struct _HAL_BIOS_FRAME
{
ULONG SegSs;