Call KiUpdateSystemTime from KiInterruptDispatch if on first processor.

Mask correct interrupts at each IRQ level
Fixed APIC error on initialization

svn path=/trunk/; revision=1812
This commit is contained in:
Casper Hornstrup 2001-04-20 12:42:23 +00:00
parent e344bc3faa
commit f0e807621f
5 changed files with 49 additions and 58 deletions

View file

@ -1,4 +1,4 @@
/* $Id: display.c,v 1.14 2001/04/18 03:31:19 dwelch Exp $ /* $Id: display.c,v 1.15 2001/04/20 12:42:23 chorns Exp $
* *
* COPYRIGHT: See COPYING in the top level directory * COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel * PROJECT: ReactOS kernel
@ -10,7 +10,7 @@
*/ */
#include <ddk/ntddk.h> #include <ddk/ntddk.h>
#include <internal/hal/mps.h>
#define SCREEN_SYNCHRONIZATION #define SCREEN_SYNCHRONIZATION
@ -195,9 +195,11 @@ HalDisplayString (IN PCH String)
int offset; int offset;
#endif #endif
static KSPIN_LOCK Lock; static KSPIN_LOCK Lock;
ULONG Flags;
pch = String; pch = String;
pushfl(Flags);
__asm__ ("cli\n\t"); __asm__ ("cli\n\t");
KeAcquireSpinLockAtDpcLevel(&Lock); KeAcquireSpinLockAtDpcLevel(&Lock);
@ -253,7 +255,7 @@ HalDisplayString (IN PCH String)
WRITE_PORT_UCHAR((PUCHAR)CRTC_DATA, (offset >> 8) & 0xff); WRITE_PORT_UCHAR((PUCHAR)CRTC_DATA, (offset >> 8) & 0xff);
#endif #endif
KeReleaseSpinLockFromDpcLevel(&Lock); KeReleaseSpinLockFromDpcLevel(&Lock);
__asm__ ("sti\n\t"); popfl(Flags);
} }

View file

@ -1,4 +1,4 @@
/* $Id: mp.c,v 1.12 2001/04/18 03:31:19 dwelch Exp $ /* $Id: mp.c,v 1.13 2001/04/20 12:42:23 chorns Exp $
* *
* COPYRIGHT: See COPYING in the top level directory * COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel * PROJECT: ReactOS kernel
@ -1236,8 +1236,8 @@ VOID APICCalibrateTimer(
/* Setup timer for normal operation */ /* Setup timer for normal operation */
//APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 100); // 100ns //APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 100); // 100ns
//APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 10000); // 10ms APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 15000); // 15ms
APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 100000); // 100ms //APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 100000); // 100ms
DPRINT("CPU clock speed is %ld.%04ld MHz.\n", DPRINT("CPU clock speed is %ld.%04ld MHz.\n",
CPUMap[CPU].CoreSpeed/1000000, CPUMap[CPU].CoreSpeed/1000000,
@ -1373,43 +1373,35 @@ static VOID SetInterruptGate(
VOID MpsTimerHandler( VOID MpsTimerHandler(
VOID) VOID)
{ {
#if 0
KIRQL OldIrql; KIRQL OldIrql;
#endif
/* FIXME: Pass EIP for profiling */ DPRINT("T1");
/* /*
* Acknowledge the interrupt * Acknowledge the interrupt
*/ */
APICSendEOI(); APICSendEOI();
#if 0
/* /*
* Notify the rest of the kernel of the raised irq level * Notify the rest of the kernel of the raised irq level
*/ */
OldIrql = KeRaiseIrqlToSynchLevel(); OldIrql = KeRaiseIrqlToSynchLevel();
#endif
/*
* Enable interrupts
*/
__asm__("sti\n\t"); __asm__("sti\n\t");
KiUpdateSystemTime(OldIrql, 0);
/*
* Disable interrupts
*/
__asm__("cli\n\t");
/*
* Lower irq level
*/
KeLowerIrql(OldIrql);
/* /*
* Call the dispatcher * Call the dispatcher
*/ */
/* FIXME: Does not seem to work */
PsDispatchThread(THREAD_STATE_RUNNABLE); PsDispatchThread(THREAD_STATE_RUNNABLE);
#if 0
/*
* Lower irq level
*/
KeLowerIrql(OldIrql);
#endif
} }
@ -1440,7 +1432,7 @@ VOID MpsErrorHandler(
7: Illegal register address 7: Illegal register address
*/ */
DPRINT1("APIC error on CPU(%d) ESR(%x)(%x)\n", ThisCPU(), tmp1, tmp2); DPRINT1("APIC error on CPU(%d) ESR(%x)(%x)\n", ThisCPU(), tmp1, tmp2);
KeBugCheck(0); for (;;);
} }
@ -1453,9 +1445,8 @@ VOID MpsSpuriousHandler(
* Acknowledge the interrupt * Acknowledge the interrupt
*/ */
APICSendEOI(); APICSendEOI();
APICDump(); APICDump();
KeBugCheck(0); for (;;);
} }
@ -2322,7 +2313,7 @@ HalpInitMPS(
DPRINT("CPU %d says it is now booted.\n", CPU); DPRINT("CPU %d says it is now booted.\n", CPU);
APICSetup(); APICSetup();
//APICCalibrateTimer(CPU); APICCalibrateTimer(CPU);
/* This processor is now booted */ /* This processor is now booted */
CPUMap[CPU].Flags |= CPU_ENABLED; CPUMap[CPU].Flags |= CPU_ENABLED;
@ -2357,17 +2348,17 @@ HalpInitMPS(
/* Setup IRQ to vector translation map */ /* Setup IRQ to vector translation map */
memset(&IRQVectorMap, sizeof(IRQVectorMap), 0); memset(&IRQVectorMap, sizeof(IRQVectorMap), 0);
/* Initialize the bootstrap processor */
HaliInitBSP();
/* Setup I/O APIC */ /* Setup I/O APIC */
IOAPICSetup(); IOAPICSetup();
/* We can now enable interrupts */
__asm__ __volatile__ ("sti\n\t");
/* Setup busy waiting */ /* Setup busy waiting */
HalpCalibrateStallExecution(); HalpCalibrateStallExecution();
/* Initialize the bootstrap processor */ /* We can now enable interrupts */
HaliInitBSP(); __asm__ __volatile__ ("sti\n\t");
NextCPU = 0; NextCPU = 0;
} }

View file

@ -28,12 +28,12 @@ static VOID KeSetCurrentIrql(KIRQL newlvl);
/* FUNCTIONS ****************************************************************/ /* FUNCTIONS ****************************************************************/
#define IRQL2TPR(irql) (APIC_TPR_MIN + ((irql - DISPATCH_LEVEL - 1) << 4)) #define IRQL2TPR(irql) (APIC_TPR_MIN + ((irql - DISPATCH_LEVEL - 1) * 8))
static VOID HiSetCurrentPriority( static VOID HiSetCurrentPriority(
ULONG Priority) ULONG Priority)
{ {
// DPRINT(" P(0x%X) \n", Priority); //DbgPrint(" P(0x%X)\n", Priority);
APICWrite(APIC_TPR, Priority & APIC_TPR_PRI); APICWrite(APIC_TPR, Priority & APIC_TPR_PRI);
} }
@ -47,25 +47,20 @@ static VOID HiSwitchIrql(KIRQL OldIrql, ULONG Flags)
PKTHREAD CurrentThread; PKTHREAD CurrentThread;
KIRQL CurrentIrql; KIRQL CurrentIrql;
//DbgPrint("HiSwitchIrql(OldIrql %d)\n", OldIrql);
CurrentIrql = KeGetCurrentKPCR()->Irql; CurrentIrql = KeGetCurrentKPCR()->Irql;
if (CurrentIrql == HIGH_LEVEL) if (CurrentIrql >= IPI_LEVEL)
{ {
/* Block all interrupts */ /* Block all interrupts */
HiSetCurrentPriority(APIC_TPR_MAX); HiSetCurrentPriority(APIC_TPR_MAX);
return; return;
} }
if (CurrentIrql == IPI_LEVEL)
{
HiSetCurrentPriority(APIC_TPR_MAX - 16);
popfl(Flags);
return;
}
if (CurrentIrql == CLOCK2_LEVEL) if (CurrentIrql == CLOCK2_LEVEL)
{ {
HiSetCurrentPriority(APIC_TPR_MAX - 32); HiSetCurrentPriority(APIC_TPR_MAX - 16);
popfl(Flags); popfl(Flags);
return; return;
} }
@ -167,9 +162,7 @@ KfLowerIrql (
KIRQL OldIrql; KIRQL OldIrql;
ULONG Flags; ULONG Flags;
//DPRINT("KfLowerIrql(NewIrql %d)\n", NewIrql);
//DbgPrint("KfLowerIrql(NewIrql %d)\n", NewIrql); //DbgPrint("KfLowerIrql(NewIrql %d)\n", NewIrql);
//KeBugCheck(0);
pushfl(Flags); pushfl(Flags);
__asm__ ("\n\tcli\n\t"); __asm__ ("\n\tcli\n\t");
@ -243,9 +236,7 @@ KfRaiseIrql (
KIRQL OldIrql; KIRQL OldIrql;
ULONG Flags; ULONG Flags;
//DPRINT("KfRaiseIrql(NewIrql %d)\n", NewIrql);
//DbgPrint("KfRaiseIrql(NewIrql %d)\n", NewIrql); //DbgPrint("KfRaiseIrql(NewIrql %d)\n", NewIrql);
//KeBugCheck(0);
pushfl(Flags); pushfl(Flags);
__asm__ ("\n\tcli\n\t"); __asm__ ("\n\tcli\n\t");

View file

@ -2,6 +2,6 @@
#ifndef __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H #ifndef __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H
#define __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H #define __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H
#define DBG #define DBG
#define MP #define UP
#define CONFIG "DBG MP" #define CONFIG "DBG UP"
#endif /* __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H */ #endif /* __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H */

View file

@ -1,4 +1,4 @@
/* $Id: irq.c,v 1.11 2001/04/16 16:29:02 dwelch Exp $ /* $Id: irq.c,v 1.12 2001/04/20 12:42:23 chorns Exp $
* *
* COPYRIGHT: See COPYING in the top level directory * COPYRIGHT: See COPYING in the top level directory
* PROJECT: ReactOS kernel * PROJECT: ReactOS kernel
@ -273,7 +273,15 @@ KiInterruptDispatch (ULONG Vector, PKIRQ_TRAPFRAME Trapframe)
*/ */
__asm__("sti\n\t"); __asm__("sti\n\t");
if (irq == 0)
{
if (KeGetCurrentProcessorNumber() == 0)
{
KiUpdateSystemTime(old_level, Trapframe->Eip);
}
}
else
{
DPRINT("KiInterruptDispatch(Vector %d)\n", Vector); DPRINT("KiInterruptDispatch(Vector %d)\n", Vector);
/* /*
* Iterate the list until one of the isr tells us its device interrupted * Iterate the list until one of the isr tells us its device interrupted
@ -288,7 +296,7 @@ KiInterruptDispatch (ULONG Vector, PKIRQ_TRAPFRAME Trapframe)
isr = CONTAINING_RECORD(current,KINTERRUPT,Entry); isr = CONTAINING_RECORD(current,KINTERRUPT,Entry);
//DPRINT("current %x isr %x\n",current,isr); //DPRINT("current %x isr %x\n",current,isr);
} }
}
/* /*
* Disable interrupts * Disable interrupts
*/ */
@ -309,12 +317,11 @@ KiInterruptDispatch (ULONG Vector, PKIRQ_TRAPFRAME Trapframe)
HalEndSystemInterrupt (DISPATCH_LEVEL, 0); HalEndSystemInterrupt (DISPATCH_LEVEL, 0);
__asm__("sti\n\t"); __asm__("sti\n\t");
if (KeGetCurrentThread() != NULL) if (KeGetCurrentThread() != NULL)
{ {
KeGetCurrentThread()->LastEip = Trapframe->Eip; KeGetCurrentThread()->LastEip = Trapframe->Eip;
} }
KiDispatchInterrupt(); KiDispatchInterrupt();
if (KeGetCurrentThread() != NULL && if (KeGetCurrentThread() != NULL &&
KeGetCurrentThread()->Alerted[1] != 0 && KeGetCurrentThread()->Alerted[1] != 0 &&
Trapframe->Cs != KERNEL_CS) Trapframe->Cs != KERNEL_CS)
@ -322,8 +329,8 @@ KiInterruptDispatch (ULONG Vector, PKIRQ_TRAPFRAME Trapframe)
HalEndSystemInterrupt (APC_LEVEL, 0); HalEndSystemInterrupt (APC_LEVEL, 0);
KiDeliverNormalApc(); KiDeliverNormalApc();
} }
}
}
HalEndSystemInterrupt (old_level, 0); HalEndSystemInterrupt (old_level, 0);
} }