mirror of
https://github.com/reactos/reactos.git
synced 2025-04-19 20:19:26 +00:00
Call KiUpdateSystemTime from KiInterruptDispatch if on first processor.
Mask correct interrupts at each IRQ level Fixed APIC error on initialization svn path=/trunk/; revision=1812
This commit is contained in:
parent
e344bc3faa
commit
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5 changed files with 49 additions and 58 deletions
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@ -1,4 +1,4 @@
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/* $Id: display.c,v 1.14 2001/04/18 03:31:19 dwelch Exp $
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/* $Id: display.c,v 1.15 2001/04/20 12:42:23 chorns Exp $
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*
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*
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* COPYRIGHT: See COPYING in the top level directory
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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* PROJECT: ReactOS kernel
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@ -10,7 +10,7 @@
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*/
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*/
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#include <ddk/ntddk.h>
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#include <ddk/ntddk.h>
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#include <internal/hal/mps.h>
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#define SCREEN_SYNCHRONIZATION
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#define SCREEN_SYNCHRONIZATION
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@ -195,9 +195,11 @@ HalDisplayString (IN PCH String)
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int offset;
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int offset;
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#endif
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#endif
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static KSPIN_LOCK Lock;
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static KSPIN_LOCK Lock;
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ULONG Flags;
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pch = String;
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pch = String;
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pushfl(Flags);
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__asm__ ("cli\n\t");
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__asm__ ("cli\n\t");
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KeAcquireSpinLockAtDpcLevel(&Lock);
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KeAcquireSpinLockAtDpcLevel(&Lock);
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@ -253,7 +255,7 @@ HalDisplayString (IN PCH String)
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WRITE_PORT_UCHAR((PUCHAR)CRTC_DATA, (offset >> 8) & 0xff);
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WRITE_PORT_UCHAR((PUCHAR)CRTC_DATA, (offset >> 8) & 0xff);
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#endif
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#endif
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KeReleaseSpinLockFromDpcLevel(&Lock);
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KeReleaseSpinLockFromDpcLevel(&Lock);
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__asm__ ("sti\n\t");
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popfl(Flags);
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}
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}
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@ -1,4 +1,4 @@
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/* $Id: mp.c,v 1.12 2001/04/18 03:31:19 dwelch Exp $
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/* $Id: mp.c,v 1.13 2001/04/20 12:42:23 chorns Exp $
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*
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*
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* COPYRIGHT: See COPYING in the top level directory
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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* PROJECT: ReactOS kernel
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@ -1236,8 +1236,8 @@ VOID APICCalibrateTimer(
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/* Setup timer for normal operation */
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/* Setup timer for normal operation */
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//APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 100); // 100ns
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//APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 100); // 100ns
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//APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 10000); // 10ms
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APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 15000); // 15ms
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APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 100000); // 100ms
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//APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 100000); // 100ms
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DPRINT("CPU clock speed is %ld.%04ld MHz.\n",
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DPRINT("CPU clock speed is %ld.%04ld MHz.\n",
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CPUMap[CPU].CoreSpeed/1000000,
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CPUMap[CPU].CoreSpeed/1000000,
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@ -1373,43 +1373,35 @@ static VOID SetInterruptGate(
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VOID MpsTimerHandler(
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VOID MpsTimerHandler(
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VOID)
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VOID)
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{
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{
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#if 0
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KIRQL OldIrql;
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KIRQL OldIrql;
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#endif
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/* FIXME: Pass EIP for profiling */
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DPRINT("T1");
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/*
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/*
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* Acknowledge the interrupt
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* Acknowledge the interrupt
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*/
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*/
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APICSendEOI();
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APICSendEOI();
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#if 0
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/*
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/*
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* Notify the rest of the kernel of the raised irq level
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* Notify the rest of the kernel of the raised irq level
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*/
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*/
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OldIrql = KeRaiseIrqlToSynchLevel();
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OldIrql = KeRaiseIrqlToSynchLevel();
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#endif
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/*
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* Enable interrupts
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*/
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__asm__("sti\n\t");
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__asm__("sti\n\t");
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KiUpdateSystemTime(OldIrql, 0);
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/*
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* Disable interrupts
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*/
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__asm__("cli\n\t");
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/*
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* Lower irq level
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*/
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KeLowerIrql(OldIrql);
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/*
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/*
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* Call the dispatcher
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* Call the dispatcher
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*/
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*/
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/* FIXME: Does not seem to work */
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PsDispatchThread(THREAD_STATE_RUNNABLE);
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PsDispatchThread(THREAD_STATE_RUNNABLE);
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#if 0
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/*
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* Lower irq level
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*/
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KeLowerIrql(OldIrql);
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#endif
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}
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}
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@ -1440,7 +1432,7 @@ VOID MpsErrorHandler(
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7: Illegal register address
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7: Illegal register address
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*/
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*/
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DPRINT1("APIC error on CPU(%d) ESR(%x)(%x)\n", ThisCPU(), tmp1, tmp2);
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DPRINT1("APIC error on CPU(%d) ESR(%x)(%x)\n", ThisCPU(), tmp1, tmp2);
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KeBugCheck(0);
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for (;;);
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}
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}
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@ -1453,9 +1445,8 @@ VOID MpsSpuriousHandler(
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* Acknowledge the interrupt
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* Acknowledge the interrupt
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*/
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*/
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APICSendEOI();
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APICSendEOI();
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APICDump();
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APICDump();
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KeBugCheck(0);
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for (;;);
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}
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}
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@ -2322,7 +2313,7 @@ HalpInitMPS(
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DPRINT("CPU %d says it is now booted.\n", CPU);
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DPRINT("CPU %d says it is now booted.\n", CPU);
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APICSetup();
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APICSetup();
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//APICCalibrateTimer(CPU);
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APICCalibrateTimer(CPU);
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/* This processor is now booted */
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/* This processor is now booted */
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CPUMap[CPU].Flags |= CPU_ENABLED;
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CPUMap[CPU].Flags |= CPU_ENABLED;
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@ -2357,17 +2348,17 @@ HalpInitMPS(
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/* Setup IRQ to vector translation map */
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/* Setup IRQ to vector translation map */
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memset(&IRQVectorMap, sizeof(IRQVectorMap), 0);
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memset(&IRQVectorMap, sizeof(IRQVectorMap), 0);
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/* Initialize the bootstrap processor */
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HaliInitBSP();
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/* Setup I/O APIC */
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/* Setup I/O APIC */
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IOAPICSetup();
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IOAPICSetup();
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/* We can now enable interrupts */
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__asm__ __volatile__ ("sti\n\t");
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/* Setup busy waiting */
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/* Setup busy waiting */
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HalpCalibrateStallExecution();
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HalpCalibrateStallExecution();
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/* Initialize the bootstrap processor */
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/* We can now enable interrupts */
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HaliInitBSP();
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__asm__ __volatile__ ("sti\n\t");
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NextCPU = 0;
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NextCPU = 0;
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}
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}
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@ -28,12 +28,12 @@ static VOID KeSetCurrentIrql(KIRQL newlvl);
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/* FUNCTIONS ****************************************************************/
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/* FUNCTIONS ****************************************************************/
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#define IRQL2TPR(irql) (APIC_TPR_MIN + ((irql - DISPATCH_LEVEL - 1) << 4))
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#define IRQL2TPR(irql) (APIC_TPR_MIN + ((irql - DISPATCH_LEVEL - 1) * 8))
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static VOID HiSetCurrentPriority(
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static VOID HiSetCurrentPriority(
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ULONG Priority)
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ULONG Priority)
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{
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{
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// DPRINT(" P(0x%X) \n", Priority);
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//DbgPrint(" P(0x%X)\n", Priority);
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APICWrite(APIC_TPR, Priority & APIC_TPR_PRI);
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APICWrite(APIC_TPR, Priority & APIC_TPR_PRI);
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}
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}
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@ -47,25 +47,20 @@ static VOID HiSwitchIrql(KIRQL OldIrql, ULONG Flags)
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PKTHREAD CurrentThread;
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PKTHREAD CurrentThread;
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KIRQL CurrentIrql;
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KIRQL CurrentIrql;
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//DbgPrint("HiSwitchIrql(OldIrql %d)\n", OldIrql);
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CurrentIrql = KeGetCurrentKPCR()->Irql;
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CurrentIrql = KeGetCurrentKPCR()->Irql;
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if (CurrentIrql == HIGH_LEVEL)
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if (CurrentIrql >= IPI_LEVEL)
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{
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{
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/* Block all interrupts */
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/* Block all interrupts */
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HiSetCurrentPriority(APIC_TPR_MAX);
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HiSetCurrentPriority(APIC_TPR_MAX);
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return;
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return;
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}
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}
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if (CurrentIrql == IPI_LEVEL)
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{
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HiSetCurrentPriority(APIC_TPR_MAX - 16);
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popfl(Flags);
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return;
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}
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if (CurrentIrql == CLOCK2_LEVEL)
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if (CurrentIrql == CLOCK2_LEVEL)
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{
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{
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HiSetCurrentPriority(APIC_TPR_MAX - 32);
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HiSetCurrentPriority(APIC_TPR_MAX - 16);
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popfl(Flags);
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popfl(Flags);
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return;
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return;
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}
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}
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KIRQL OldIrql;
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KIRQL OldIrql;
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ULONG Flags;
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ULONG Flags;
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//DPRINT("KfLowerIrql(NewIrql %d)\n", NewIrql);
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//DbgPrint("KfLowerIrql(NewIrql %d)\n", NewIrql);
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//DbgPrint("KfLowerIrql(NewIrql %d)\n", NewIrql);
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//KeBugCheck(0);
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pushfl(Flags);
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pushfl(Flags);
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__asm__ ("\n\tcli\n\t");
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__asm__ ("\n\tcli\n\t");
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KIRQL OldIrql;
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KIRQL OldIrql;
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ULONG Flags;
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ULONG Flags;
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//DPRINT("KfRaiseIrql(NewIrql %d)\n", NewIrql);
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//DbgPrint("KfRaiseIrql(NewIrql %d)\n", NewIrql);
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//DbgPrint("KfRaiseIrql(NewIrql %d)\n", NewIrql);
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//KeBugCheck(0);
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pushfl(Flags);
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pushfl(Flags);
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__asm__ ("\n\tcli\n\t");
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__asm__ ("\n\tcli\n\t");
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#ifndef __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H
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#ifndef __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H
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#define __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H
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#define __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H
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#define DBG
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#define DBG
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#define MP
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#define UP
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#define CONFIG "DBG MP"
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#define CONFIG "DBG UP"
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#endif /* __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H */
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#endif /* __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H */
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@ -1,4 +1,4 @@
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/* $Id: irq.c,v 1.11 2001/04/16 16:29:02 dwelch Exp $
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/* $Id: irq.c,v 1.12 2001/04/20 12:42:23 chorns Exp $
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*
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*
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* COPYRIGHT: See COPYING in the top level directory
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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* PROJECT: ReactOS kernel
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@ -273,7 +273,15 @@ KiInterruptDispatch (ULONG Vector, PKIRQ_TRAPFRAME Trapframe)
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*/
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*/
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__asm__("sti\n\t");
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__asm__("sti\n\t");
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if (irq == 0)
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{
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if (KeGetCurrentProcessorNumber() == 0)
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{
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KiUpdateSystemTime(old_level, Trapframe->Eip);
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}
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}
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else
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{
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DPRINT("KiInterruptDispatch(Vector %d)\n", Vector);
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DPRINT("KiInterruptDispatch(Vector %d)\n", Vector);
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/*
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/*
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* Iterate the list until one of the isr tells us its device interrupted
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* Iterate the list until one of the isr tells us its device interrupted
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isr = CONTAINING_RECORD(current,KINTERRUPT,Entry);
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isr = CONTAINING_RECORD(current,KINTERRUPT,Entry);
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//DPRINT("current %x isr %x\n",current,isr);
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//DPRINT("current %x isr %x\n",current,isr);
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}
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}
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}
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/*
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/*
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* Disable interrupts
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* Disable interrupts
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*/
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*/
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HalEndSystemInterrupt (DISPATCH_LEVEL, 0);
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HalEndSystemInterrupt (DISPATCH_LEVEL, 0);
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__asm__("sti\n\t");
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__asm__("sti\n\t");
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if (KeGetCurrentThread() != NULL)
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if (KeGetCurrentThread() != NULL)
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{
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{
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KeGetCurrentThread()->LastEip = Trapframe->Eip;
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KeGetCurrentThread()->LastEip = Trapframe->Eip;
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}
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}
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KiDispatchInterrupt();
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KiDispatchInterrupt();
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if (KeGetCurrentThread() != NULL &&
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if (KeGetCurrentThread() != NULL &&
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KeGetCurrentThread()->Alerted[1] != 0 &&
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KeGetCurrentThread()->Alerted[1] != 0 &&
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Trapframe->Cs != KERNEL_CS)
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Trapframe->Cs != KERNEL_CS)
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HalEndSystemInterrupt (APC_LEVEL, 0);
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HalEndSystemInterrupt (APC_LEVEL, 0);
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KiDeliverNormalApc();
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KiDeliverNormalApc();
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}
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}
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}
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}
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HalEndSystemInterrupt (old_level, 0);
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HalEndSystemInterrupt (old_level, 0);
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}
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}
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