From f0e807621f34ba3d437a86fde70804590bcb1add Mon Sep 17 00:00:00 2001 From: Casper Hornstrup Date: Fri, 20 Apr 2001 12:42:23 +0000 Subject: [PATCH] Call KiUpdateSystemTime from KiInterruptDispatch if on first processor. Mask correct interrupts at each IRQ level Fixed APIC error on initialization svn path=/trunk/; revision=1812 --- reactos/ntoskrnl/hal/x86/display.c | 8 ++-- reactos/ntoskrnl/hal/x86/mp.c | 55 +++++++++------------- reactos/ntoskrnl/hal/x86/mpsirql.c | 21 +++------ reactos/ntoskrnl/include/internal/config.h | 4 +- reactos/ntoskrnl/ke/i386/irq.c | 19 +++++--- 5 files changed, 49 insertions(+), 58 deletions(-) diff --git a/reactos/ntoskrnl/hal/x86/display.c b/reactos/ntoskrnl/hal/x86/display.c index ba3aad664e5..c5f6e1c6050 100644 --- a/reactos/ntoskrnl/hal/x86/display.c +++ b/reactos/ntoskrnl/hal/x86/display.c @@ -1,4 +1,4 @@ -/* $Id: display.c,v 1.14 2001/04/18 03:31:19 dwelch Exp $ +/* $Id: display.c,v 1.15 2001/04/20 12:42:23 chorns Exp $ * * COPYRIGHT: See COPYING in the top level directory * PROJECT: ReactOS kernel @@ -10,7 +10,7 @@ */ #include - +#include #define SCREEN_SYNCHRONIZATION @@ -195,9 +195,11 @@ HalDisplayString (IN PCH String) int offset; #endif static KSPIN_LOCK Lock; + ULONG Flags; pch = String; + pushfl(Flags); __asm__ ("cli\n\t"); KeAcquireSpinLockAtDpcLevel(&Lock); @@ -253,7 +255,7 @@ HalDisplayString (IN PCH String) WRITE_PORT_UCHAR((PUCHAR)CRTC_DATA, (offset >> 8) & 0xff); #endif KeReleaseSpinLockFromDpcLevel(&Lock); - __asm__ ("sti\n\t"); + popfl(Flags); } diff --git a/reactos/ntoskrnl/hal/x86/mp.c b/reactos/ntoskrnl/hal/x86/mp.c index 23b76c8a406..2f8f6559ff6 100644 --- a/reactos/ntoskrnl/hal/x86/mp.c +++ b/reactos/ntoskrnl/hal/x86/mp.c @@ -1,4 +1,4 @@ -/* $Id: mp.c,v 1.12 2001/04/18 03:31:19 dwelch Exp $ +/* $Id: mp.c,v 1.13 2001/04/20 12:42:23 chorns Exp $ * * COPYRIGHT: See COPYING in the top level directory * PROJECT: ReactOS kernel @@ -1236,8 +1236,8 @@ VOID APICCalibrateTimer( /* Setup timer for normal operation */ //APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 100); // 100ns - //APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 10000); // 10ms - APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 100000); // 100ms + APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 15000); // 15ms + //APICSetupLVTT((CPUMap[CPU].BusSpeed / 1000000) * 100000); // 100ms DPRINT("CPU clock speed is %ld.%04ld MHz.\n", CPUMap[CPU].CoreSpeed/1000000, @@ -1373,43 +1373,35 @@ static VOID SetInterruptGate( VOID MpsTimerHandler( VOID) { +#if 0 KIRQL OldIrql; +#endif - /* FIXME: Pass EIP for profiling */ + DPRINT("T1"); /* * Acknowledge the interrupt */ APICSendEOI(); - +#if 0 /* * Notify the rest of the kernel of the raised irq level */ OldIrql = KeRaiseIrqlToSynchLevel(); - - /* - * Enable interrupts - */ +#endif __asm__("sti\n\t"); - KiUpdateSystemTime(OldIrql, 0); - - /* - * Disable interrupts - */ - __asm__("cli\n\t"); - - /* - * Lower irq level - */ - KeLowerIrql(OldIrql); - /* * Call the dispatcher */ - - /* FIXME: Does not seem to work */ PsDispatchThread(THREAD_STATE_RUNNABLE); + +#if 0 + /* + * Lower irq level + */ + KeLowerIrql(OldIrql); +#endif } @@ -1440,7 +1432,7 @@ VOID MpsErrorHandler( 7: Illegal register address */ DPRINT1("APIC error on CPU(%d) ESR(%x)(%x)\n", ThisCPU(), tmp1, tmp2); - KeBugCheck(0); + for (;;); } @@ -1453,9 +1445,8 @@ VOID MpsSpuriousHandler( * Acknowledge the interrupt */ APICSendEOI(); - APICDump(); - KeBugCheck(0); + for (;;); } @@ -2322,7 +2313,7 @@ HalpInitMPS( DPRINT("CPU %d says it is now booted.\n", CPU); APICSetup(); - //APICCalibrateTimer(CPU); + APICCalibrateTimer(CPU); /* This processor is now booted */ CPUMap[CPU].Flags |= CPU_ENABLED; @@ -2357,17 +2348,17 @@ HalpInitMPS( /* Setup IRQ to vector translation map */ memset(&IRQVectorMap, sizeof(IRQVectorMap), 0); + /* Initialize the bootstrap processor */ + HaliInitBSP(); + /* Setup I/O APIC */ IOAPICSetup(); - /* We can now enable interrupts */ - __asm__ __volatile__ ("sti\n\t"); - /* Setup busy waiting */ HalpCalibrateStallExecution(); - /* Initialize the bootstrap processor */ - HaliInitBSP(); + /* We can now enable interrupts */ + __asm__ __volatile__ ("sti\n\t"); NextCPU = 0; } diff --git a/reactos/ntoskrnl/hal/x86/mpsirql.c b/reactos/ntoskrnl/hal/x86/mpsirql.c index 94fd1e6d712..0a619162331 100644 --- a/reactos/ntoskrnl/hal/x86/mpsirql.c +++ b/reactos/ntoskrnl/hal/x86/mpsirql.c @@ -28,12 +28,12 @@ static VOID KeSetCurrentIrql(KIRQL newlvl); /* FUNCTIONS ****************************************************************/ -#define IRQL2TPR(irql) (APIC_TPR_MIN + ((irql - DISPATCH_LEVEL - 1) << 4)) +#define IRQL2TPR(irql) (APIC_TPR_MIN + ((irql - DISPATCH_LEVEL - 1) * 8)) static VOID HiSetCurrentPriority( ULONG Priority) { -// DPRINT(" P(0x%X) \n", Priority); + //DbgPrint(" P(0x%X)\n", Priority); APICWrite(APIC_TPR, Priority & APIC_TPR_PRI); } @@ -47,25 +47,20 @@ static VOID HiSwitchIrql(KIRQL OldIrql, ULONG Flags) PKTHREAD CurrentThread; KIRQL CurrentIrql; + //DbgPrint("HiSwitchIrql(OldIrql %d)\n", OldIrql); + CurrentIrql = KeGetCurrentKPCR()->Irql; - if (CurrentIrql == HIGH_LEVEL) + if (CurrentIrql >= IPI_LEVEL) { /* Block all interrupts */ HiSetCurrentPriority(APIC_TPR_MAX); return; } - if (CurrentIrql == IPI_LEVEL) - { - HiSetCurrentPriority(APIC_TPR_MAX - 16); - popfl(Flags); - return; - } - if (CurrentIrql == CLOCK2_LEVEL) { - HiSetCurrentPriority(APIC_TPR_MAX - 32); + HiSetCurrentPriority(APIC_TPR_MAX - 16); popfl(Flags); return; } @@ -167,9 +162,7 @@ KfLowerIrql ( KIRQL OldIrql; ULONG Flags; - //DPRINT("KfLowerIrql(NewIrql %d)\n", NewIrql); //DbgPrint("KfLowerIrql(NewIrql %d)\n", NewIrql); - //KeBugCheck(0); pushfl(Flags); __asm__ ("\n\tcli\n\t"); @@ -243,9 +236,7 @@ KfRaiseIrql ( KIRQL OldIrql; ULONG Flags; - //DPRINT("KfRaiseIrql(NewIrql %d)\n", NewIrql); //DbgPrint("KfRaiseIrql(NewIrql %d)\n", NewIrql); - //KeBugCheck(0); pushfl(Flags); __asm__ ("\n\tcli\n\t"); diff --git a/reactos/ntoskrnl/include/internal/config.h b/reactos/ntoskrnl/include/internal/config.h index 162b05090f0..e1775bd5f39 100644 --- a/reactos/ntoskrnl/include/internal/config.h +++ b/reactos/ntoskrnl/include/internal/config.h @@ -2,6 +2,6 @@ #ifndef __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H #define __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H #define DBG -#define MP -#define CONFIG "DBG MP" +#define UP +#define CONFIG "DBG UP" #endif /* __NTOSKRNL_INCLUDE_INTERNAL_CONFIG_H */ diff --git a/reactos/ntoskrnl/ke/i386/irq.c b/reactos/ntoskrnl/ke/i386/irq.c index 32e6839258a..7c8314dd2ca 100644 --- a/reactos/ntoskrnl/ke/i386/irq.c +++ b/reactos/ntoskrnl/ke/i386/irq.c @@ -1,4 +1,4 @@ -/* $Id: irq.c,v 1.11 2001/04/16 16:29:02 dwelch Exp $ +/* $Id: irq.c,v 1.12 2001/04/20 12:42:23 chorns Exp $ * * COPYRIGHT: See COPYING in the top level directory * PROJECT: ReactOS kernel @@ -273,7 +273,15 @@ KiInterruptDispatch (ULONG Vector, PKIRQ_TRAPFRAME Trapframe) */ __asm__("sti\n\t"); - + if (irq == 0) + { + if (KeGetCurrentProcessorNumber() == 0) + { + KiUpdateSystemTime(old_level, Trapframe->Eip); + } + } + else + { DPRINT("KiInterruptDispatch(Vector %d)\n", Vector); /* * Iterate the list until one of the isr tells us its device interrupted @@ -288,7 +296,7 @@ KiInterruptDispatch (ULONG Vector, PKIRQ_TRAPFRAME Trapframe) isr = CONTAINING_RECORD(current,KINTERRUPT,Entry); //DPRINT("current %x isr %x\n",current,isr); } - + } /* * Disable interrupts */ @@ -309,12 +317,11 @@ KiInterruptDispatch (ULONG Vector, PKIRQ_TRAPFRAME Trapframe) HalEndSystemInterrupt (DISPATCH_LEVEL, 0); __asm__("sti\n\t"); - if (KeGetCurrentThread() != NULL) + if (KeGetCurrentThread() != NULL) { KeGetCurrentThread()->LastEip = Trapframe->Eip; } KiDispatchInterrupt(); - if (KeGetCurrentThread() != NULL && KeGetCurrentThread()->Alerted[1] != 0 && Trapframe->Cs != KERNEL_CS) @@ -322,8 +329,8 @@ KiInterruptDispatch (ULONG Vector, PKIRQ_TRAPFRAME Trapframe) HalEndSystemInterrupt (APC_LEVEL, 0); KiDeliverNormalApc(); } + } - } HalEndSystemInterrupt (old_level, 0); }