[NTOS]: Fix definition of unused MI_MAKE_SOFTWARE_PTE macro.

[NTOS]: Correctly setup the PFN entries for freshly allocated paged pool pages. Fixes a problem where the page could've still had stale/garbage data.
[NTOS]: Add some extra assertions in the code to catch memory corruption and detect invalid logic.
[NTOS]: Fix some typos in the code (comments/whitespace).
[NTOS]: Make the dreaded page fault message that breaks paged pool on some systems more verbose for future debugging.

svn path=/trunk/; revision=47189

reactos/ntoskrnl/mm/ARM3/contmem.c

@@ -491,7 +491,7 @@ MiFreeContiguousMemory(IN PVOID BaseAddress)
     StartPfn = Pfn1;
     Pfn1->u3.e1.StartOfAllocation = 0;
     
-    /* Look the PFNs until we find the one that marks the end of the allocation */
+    /* Loop the PFNs until we find the one that marks the end of the allocation */
     do
     {
         /* Make sure these are the pages we setup in the allocation routine */
@@ -536,8 +536,8 @@ MiFreeContiguousMemory(IN PVOID BaseAddress)
         //
         // Free each one, and move on
         //
-        MmReleasePageMemoryConsumer(MC_NPPOOL, PageFrameIndex);
+        MmReleasePageMemoryConsumer(MC_NPPOOL, PageFrameIndex++);
-    } while (++PageFrameIndex < LastPage);
+    } while (PageFrameIndex < LastPage);
     
     //
     // Release the PFN lock

reactos/ntoskrnl/mm/ARM3/miarm.h

@@ -117,7 +117,7 @@
 //
 // Creates a software PTE with the given protection
 //
-#define MI_MAKE_SOFTWARE_PTE(x)          ((x) << MM_PTE_SOFTWARE_PROTECTION_BITS)
+#define MI_MAKE_SOFTWARE_PTE(p, x)          ((p)->u.Long = (x << MM_PTE_SOFTWARE_PROTECTION_BITS))
 
 //
 // Special values for LoadedImports

reactos/ntoskrnl/mm/ARM3/pagfault.c

@@ -324,7 +324,7 @@ MmArmAccessFault(IN BOOLEAN StoreInstruction,
             //
             // This might happen...not sure yet
             //
-            DPRINT1("FAULT ON PAGE TABLES!\n");
+            DPRINT1("FAULT ON PAGE TABLES: %p %lx %lx!\n", Address, *PointerPte, *PointerPde);
             
             //
             // Map in the page table

reactos/ntoskrnl/mm/ARM3/pool.c

@@ -595,14 +595,15 @@ MiAllocatePoolPages(IN POOL_TYPE PoolType,
         //
         PageFrameNumber = MmAllocPage(MC_NPPOOL);
         
-        //
+        /* Get the PFN entry for it and fill it out */
-        // Get the PFN entry for it
-        //
         Pfn1 = MiGetPfnEntry(PageFrameNumber);
+        Pfn1->u3.e2.ReferenceCount = 1;
+        Pfn1->u2.ShareCount = 1;
+        Pfn1->PteAddress = PointerPte;
+        Pfn1->u3.e1.PageLocation = ActiveAndValid;
+        Pfn1->u4.VerifierAllocation = 0;
         
-        //
+        /* Write the PTE for it */
-        // Write the PTE for it
-        //
         TempPte.u.Hard.PageFrameNumber = PageFrameNumber;
         ASSERT(PointerPte->u.Hard.Valid == 0);
         ASSERT(TempPte.u.Hard.Valid == 1);

reactos/ntoskrnl/mm/ARM3/procsup.c

@@ -153,7 +153,6 @@ MmCreateKernelStack(IN BOOLEAN GuiStack,
         // Next PTE
         //
         PointerPte++;
-        ASSERT(PointerPte->u.Hard.Valid == 0);
         
         //
         // Get a page
@@ -164,6 +163,8 @@ MmCreateKernelStack(IN BOOLEAN GuiStack,
         //
         // Write it
         //
+        ASSERT(PointerPte->u.Hard.Valid == 0);
+        ASSERT(TempPte.u.Hard.Valid == 1);
         *PointerPte = TempPte;
     }
 
@@ -249,20 +250,15 @@ MmGrowKernelStackEx(IN PVOID StackPointer,
     //
     while (LimitPte >= NewLimitPte)
     {
-        //
-        // Sanity check
-        //
-        ASSERT(LimitPte->u.Hard.Valid == 0);
-        
         //
         // Get a page
         //
         PageFrameIndex = MmAllocPage(MC_NPPOOL);
         TempPte.u.Hard.PageFrameNumber = PageFrameIndex;
         
-        //
+        /* Write the valid PTE */
-        // Write it
+        ASSERT(LimitPte->u.Hard.Valid == 0);
-        //
+        ASSERT(TempPte.u.Hard.Valid == 1);
         *LimitPte-- = TempPte;
     }