diff --git a/reactos/ntoskrnl/mm/ARM3/contmem.c b/reactos/ntoskrnl/mm/ARM3/contmem.c index 1ce57d01d9a..0d7628bf88f 100644 --- a/reactos/ntoskrnl/mm/ARM3/contmem.c +++ b/reactos/ntoskrnl/mm/ARM3/contmem.c @@ -491,7 +491,7 @@ MiFreeContiguousMemory(IN PVOID BaseAddress) StartPfn = Pfn1; Pfn1->u3.e1.StartOfAllocation = 0; - /* Look the PFNs until we find the one that marks the end of the allocation */ + /* Loop the PFNs until we find the one that marks the end of the allocation */ do { /* Make sure these are the pages we setup in the allocation routine */ @@ -530,14 +530,14 @@ MiFreeContiguousMemory(IN PVOID BaseAddress) // // Loop all the pages // - LastPage = PageFrameIndex + PageCount; + LastPage = PageFrameIndex + PageCount; do { // // Free each one, and move on // - MmReleasePageMemoryConsumer(MC_NPPOOL, PageFrameIndex); - } while (++PageFrameIndex < LastPage); + MmReleasePageMemoryConsumer(MC_NPPOOL, PageFrameIndex++); + } while (PageFrameIndex < LastPage); // // Release the PFN lock diff --git a/reactos/ntoskrnl/mm/ARM3/miarm.h b/reactos/ntoskrnl/mm/ARM3/miarm.h index cb6c0dc2f2f..193eb04e698 100644 --- a/reactos/ntoskrnl/mm/ARM3/miarm.h +++ b/reactos/ntoskrnl/mm/ARM3/miarm.h @@ -117,7 +117,7 @@ // // Creates a software PTE with the given protection // -#define MI_MAKE_SOFTWARE_PTE(x) ((x) << MM_PTE_SOFTWARE_PROTECTION_BITS) +#define MI_MAKE_SOFTWARE_PTE(p, x) ((p)->u.Long = (x << MM_PTE_SOFTWARE_PROTECTION_BITS)) // // Special values for LoadedImports diff --git a/reactos/ntoskrnl/mm/ARM3/pagfault.c b/reactos/ntoskrnl/mm/ARM3/pagfault.c index 94363c0f670..7455a100af1 100644 --- a/reactos/ntoskrnl/mm/ARM3/pagfault.c +++ b/reactos/ntoskrnl/mm/ARM3/pagfault.c @@ -324,7 +324,7 @@ MmArmAccessFault(IN BOOLEAN StoreInstruction, // // This might happen...not sure yet // - DPRINT1("FAULT ON PAGE TABLES!\n"); + DPRINT1("FAULT ON PAGE TABLES: %p %lx %lx!\n", Address, *PointerPte, *PointerPde); // // Map in the page table diff --git a/reactos/ntoskrnl/mm/ARM3/pool.c b/reactos/ntoskrnl/mm/ARM3/pool.c index 2ae4006a4a3..17c99223e00 100644 --- a/reactos/ntoskrnl/mm/ARM3/pool.c +++ b/reactos/ntoskrnl/mm/ARM3/pool.c @@ -595,14 +595,15 @@ MiAllocatePoolPages(IN POOL_TYPE PoolType, // PageFrameNumber = MmAllocPage(MC_NPPOOL); - // - // Get the PFN entry for it - // + /* Get the PFN entry for it and fill it out */ Pfn1 = MiGetPfnEntry(PageFrameNumber); + Pfn1->u3.e2.ReferenceCount = 1; + Pfn1->u2.ShareCount = 1; + Pfn1->PteAddress = PointerPte; + Pfn1->u3.e1.PageLocation = ActiveAndValid; + Pfn1->u4.VerifierAllocation = 0; - // - // Write the PTE for it - // + /* Write the PTE for it */ TempPte.u.Hard.PageFrameNumber = PageFrameNumber; ASSERT(PointerPte->u.Hard.Valid == 0); ASSERT(TempPte.u.Hard.Valid == 1); diff --git a/reactos/ntoskrnl/mm/ARM3/procsup.c b/reactos/ntoskrnl/mm/ARM3/procsup.c index 24bd11a2586..8f1e6b732c1 100644 --- a/reactos/ntoskrnl/mm/ARM3/procsup.c +++ b/reactos/ntoskrnl/mm/ARM3/procsup.c @@ -153,7 +153,6 @@ MmCreateKernelStack(IN BOOLEAN GuiStack, // Next PTE // PointerPte++; - ASSERT(PointerPte->u.Hard.Valid == 0); // // Get a page @@ -164,6 +163,8 @@ MmCreateKernelStack(IN BOOLEAN GuiStack, // // Write it // + ASSERT(PointerPte->u.Hard.Valid == 0); + ASSERT(TempPte.u.Hard.Valid == 1); *PointerPte = TempPte; } @@ -243,26 +244,21 @@ MmGrowKernelStackEx(IN PVOID StackPointer, // Acquire the PFN DB lock // OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock); - + // // Loop each stack page // while (LimitPte >= NewLimitPte) { - // - // Sanity check - // - ASSERT(LimitPte->u.Hard.Valid == 0); - // // Get a page // PageFrameIndex = MmAllocPage(MC_NPPOOL); TempPte.u.Hard.PageFrameNumber = PageFrameIndex; - // - // Write it - // + /* Write the valid PTE */ + ASSERT(LimitPte->u.Hard.Valid == 0); + ASSERT(TempPte.u.Hard.Valid == 1); *LimitPte-- = TempPte; }