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[HALX86]
Properly declare with FORCEINLINE svn path=/trunk/; revision=63147
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@ -89,8 +89,8 @@ HalVectorToIRQL[16] =
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/* PRIVATE FUNCTIONS **********************************************************/
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/* PRIVATE FUNCTIONS **********************************************************/
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ULONG
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FORCEINLINE
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FORCEINLINE
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ULONG
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IOApicRead(UCHAR Register)
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IOApicRead(UCHAR Register)
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{
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{
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/* Select the register, then do the read */
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/* Select the register, then do the read */
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@ -98,8 +98,8 @@ IOApicRead(UCHAR Register)
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return *(volatile ULONG *)(IOAPIC_BASE + IOAPIC_IOWIN);
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return *(volatile ULONG *)(IOAPIC_BASE + IOAPIC_IOWIN);
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}
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}
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VOID
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FORCEINLINE
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FORCEINLINE
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VOID
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IOApicWrite(UCHAR Register, ULONG Value)
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IOApicWrite(UCHAR Register, ULONG Value)
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{
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{
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/* Select the register, then do the write */
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/* Select the register, then do the write */
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@ -107,8 +107,8 @@ IOApicWrite(UCHAR Register, ULONG Value)
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*(volatile ULONG *)(IOAPIC_BASE + IOAPIC_IOWIN) = Value;
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*(volatile ULONG *)(IOAPIC_BASE + IOAPIC_IOWIN) = Value;
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}
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}
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VOID
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FORCEINLINE
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FORCEINLINE
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VOID
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ApicWriteIORedirectionEntry(
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ApicWriteIORedirectionEntry(
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UCHAR Index,
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UCHAR Index,
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IOAPIC_REDIRECTION_REGISTER ReDirReg)
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IOAPIC_REDIRECTION_REGISTER ReDirReg)
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@ -117,8 +117,8 @@ ApicWriteIORedirectionEntry(
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IOApicWrite(IOAPIC_REDTBL + 2 * Index + 1, ReDirReg.Long1);
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IOApicWrite(IOAPIC_REDTBL + 2 * Index + 1, ReDirReg.Long1);
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}
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}
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IOAPIC_REDIRECTION_REGISTER
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FORCEINLINE
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FORCEINLINE
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IOAPIC_REDIRECTION_REGISTER
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ApicReadIORedirectionEntry(
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ApicReadIORedirectionEntry(
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UCHAR Index)
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UCHAR Index)
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{
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{
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@ -130,8 +130,8 @@ ApicReadIORedirectionEntry(
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return ReDirReg;
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return ReDirReg;
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}
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}
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VOID
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FORCEINLINE
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FORCEINLINE
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VOID
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ApicRequestInterrupt(IN UCHAR Vector, UCHAR TriggerMode)
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ApicRequestInterrupt(IN UCHAR Vector, UCHAR TriggerMode)
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{
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{
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APIC_COMMAND_REGISTER CommandRegister;
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APIC_COMMAND_REGISTER CommandRegister;
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@ -147,24 +147,24 @@ ApicRequestInterrupt(IN UCHAR Vector, UCHAR TriggerMode)
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ApicWrite(APIC_ICR0, CommandRegister.Long0);
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ApicWrite(APIC_ICR0, CommandRegister.Long0);
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}
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}
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VOID
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FORCEINLINE
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FORCEINLINE
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VOID
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ApicSendEOI(void)
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ApicSendEOI(void)
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{
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{
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//ApicWrite(APIC_EOI, 0);
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//ApicWrite(APIC_EOI, 0);
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HackEoi();
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HackEoi();
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}
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}
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KIRQL
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FORCEINLINE
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FORCEINLINE
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KIRQL
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ApicGetProcessorIrql(VOID)
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ApicGetProcessorIrql(VOID)
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{
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{
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/* Read the TPR and convert it to an IRQL */
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/* Read the TPR and convert it to an IRQL */
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return TprToIrql(ApicRead(APIC_PPR));
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return TprToIrql(ApicRead(APIC_PPR));
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}
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}
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KIRQL
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FORCEINLINE
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FORCEINLINE
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KIRQL
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ApicGetCurrentIrql(VOID)
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ApicGetCurrentIrql(VOID)
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{
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{
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#ifdef _M_AMD64
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#ifdef _M_AMD64
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@ -184,8 +184,8 @@ ApicGetCurrentIrql(VOID)
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#endif
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#endif
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}
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}
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VOID
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FORCEINLINE
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FORCEINLINE
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VOID
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ApicSetIrql(KIRQL Irql)
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ApicSetIrql(KIRQL Irql)
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{
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{
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#ifdef _M_AMD64
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#ifdef _M_AMD64
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@ -200,8 +200,8 @@ ApicSetIrql(KIRQL Irql)
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#define ApicRaiseIrql ApicSetIrql
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#define ApicRaiseIrql ApicSetIrql
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#ifdef APIC_LAZY_IRQL
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#ifdef APIC_LAZY_IRQL
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VOID
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FORCEINLINE
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FORCEINLINE
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VOID
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ApicLowerIrql(KIRQL Irql)
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ApicLowerIrql(KIRQL Irql)
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{
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{
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__writefsbyte(FIELD_OFFSET(KPCR, Irql), Irql);
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__writefsbyte(FIELD_OFFSET(KPCR, Irql), Irql);
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@ -258,15 +258,15 @@ typedef union _IOAPIC_REDIRECTION_REGISTER
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};
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};
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} IOAPIC_REDIRECTION_REGISTER;
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} IOAPIC_REDIRECTION_REGISTER;
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ULONG
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FORCEINLINE
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FORCEINLINE
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ULONG
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ApicRead(ULONG Offset)
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ApicRead(ULONG Offset)
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{
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{
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return *(volatile ULONG *)(APIC_BASE + Offset);
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return *(volatile ULONG *)(APIC_BASE + Offset);
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}
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}
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VOID
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FORCEINLINE
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FORCEINLINE
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VOID
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ApicWrite(ULONG Offset, ULONG Value)
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ApicWrite(ULONG Offset, ULONG Value)
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{
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{
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*(volatile ULONG *)(APIC_BASE + Offset) = Value;
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*(volatile ULONG *)(APIC_BASE + Offset) = Value;
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@ -25,8 +25,8 @@ static UCHAR RtcMinimumClockRate = 6; /* Minimum rate 6: 16 Hz / 62.5 ms */
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static UCHAR RtcMaximumClockRate = 10; /* Maximum rate 10: 256 Hz / 3.9 ms */
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static UCHAR RtcMaximumClockRate = 10; /* Maximum rate 10: 256 Hz / 3.9 ms */
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ULONG
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FORCEINLINE
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FORCEINLINE
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ULONG
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RtcClockRateToIncrement(UCHAR Rate)
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RtcClockRateToIncrement(UCHAR Rate)
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{
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{
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ULONG Freqency = ((32768 << 1) >> Rate);
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ULONG Freqency = ((32768 << 1) >> Rate);
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@ -782,8 +782,8 @@ HalpEndSoftwareInterrupt(IN KIRQL OldIrql,
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/* EDGE INTERRUPT DISMISSAL FUNCTIONS *****************************************/
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/* EDGE INTERRUPT DISMISSAL FUNCTIONS *****************************************/
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BOOLEAN
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FORCEINLINE
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FORCEINLINE
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BOOLEAN
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_HalpDismissIrqGeneric(IN KIRQL Irql,
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_HalpDismissIrqGeneric(IN KIRQL Irql,
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IN ULONG Irq,
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IN ULONG Irq,
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OUT PKIRQL OldIrql)
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OUT PKIRQL OldIrql)
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@ -925,8 +925,8 @@ HalpDismissIrq07(IN KIRQL Irql,
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/* LEVEL INTERRUPT DISMISSAL FUNCTIONS ****************************************/
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/* LEVEL INTERRUPT DISMISSAL FUNCTIONS ****************************************/
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BOOLEAN
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FORCEINLINE
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FORCEINLINE
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BOOLEAN
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_HalpDismissIrqLevel(IN KIRQL Irql,
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_HalpDismissIrqLevel(IN KIRQL Irql,
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IN ULONG Irq,
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IN ULONG Irq,
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OUT PKIRQL OldIrql)
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OUT PKIRQL OldIrql)
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@ -1248,8 +1248,8 @@ HalEndSystemInterrupt(IN KIRQL OldIrql,
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/* SOFTWARE INTERRUPT TRAPS ***************************************************/
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/* SOFTWARE INTERRUPT TRAPS ***************************************************/
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VOID
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FORCEINLINE
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FORCEINLINE
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VOID
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DECLSPEC_NORETURN
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DECLSPEC_NORETURN
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_HalpApcInterruptHandler(IN PKTRAP_FRAME TrapFrame)
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_HalpApcInterruptHandler(IN PKTRAP_FRAME TrapFrame)
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{
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{
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@ -1304,8 +1304,8 @@ HalpApcInterruptHandler(IN PKTRAP_FRAME TrapFrame)
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_HalpApcInterruptHandler(TrapFrame);
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_HalpApcInterruptHandler(TrapFrame);
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}
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}
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KIRQL
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FORCEINLINE
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FORCEINLINE
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KIRQL
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_HalpDispatchInterruptHandler(VOID)
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_HalpDispatchInterruptHandler(VOID)
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{
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{
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KIRQL CurrentIrql;
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KIRQL CurrentIrql;
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