diff --git a/reactos/hal/halx86/apic/apic.c b/reactos/hal/halx86/apic/apic.c index dc0e4b83a55..1e98060c3d0 100644 --- a/reactos/hal/halx86/apic/apic.c +++ b/reactos/hal/halx86/apic/apic.c @@ -89,8 +89,8 @@ HalVectorToIRQL[16] = /* PRIVATE FUNCTIONS **********************************************************/ -ULONG FORCEINLINE +ULONG IOApicRead(UCHAR Register) { /* Select the register, then do the read */ @@ -98,8 +98,8 @@ IOApicRead(UCHAR Register) return *(volatile ULONG *)(IOAPIC_BASE + IOAPIC_IOWIN); } -VOID FORCEINLINE +VOID IOApicWrite(UCHAR Register, ULONG Value) { /* Select the register, then do the write */ @@ -107,8 +107,8 @@ IOApicWrite(UCHAR Register, ULONG Value) *(volatile ULONG *)(IOAPIC_BASE + IOAPIC_IOWIN) = Value; } -VOID FORCEINLINE +VOID ApicWriteIORedirectionEntry( UCHAR Index, IOAPIC_REDIRECTION_REGISTER ReDirReg) @@ -117,8 +117,8 @@ ApicWriteIORedirectionEntry( IOApicWrite(IOAPIC_REDTBL + 2 * Index + 1, ReDirReg.Long1); } -IOAPIC_REDIRECTION_REGISTER FORCEINLINE +IOAPIC_REDIRECTION_REGISTER ApicReadIORedirectionEntry( UCHAR Index) { @@ -130,8 +130,8 @@ ApicReadIORedirectionEntry( return ReDirReg; } -VOID FORCEINLINE +VOID ApicRequestInterrupt(IN UCHAR Vector, UCHAR TriggerMode) { APIC_COMMAND_REGISTER CommandRegister; @@ -147,24 +147,24 @@ ApicRequestInterrupt(IN UCHAR Vector, UCHAR TriggerMode) ApicWrite(APIC_ICR0, CommandRegister.Long0); } -VOID FORCEINLINE +VOID ApicSendEOI(void) { //ApicWrite(APIC_EOI, 0); HackEoi(); } -KIRQL FORCEINLINE +KIRQL ApicGetProcessorIrql(VOID) { /* Read the TPR and convert it to an IRQL */ return TprToIrql(ApicRead(APIC_PPR)); } -KIRQL FORCEINLINE +KIRQL ApicGetCurrentIrql(VOID) { #ifdef _M_AMD64 @@ -184,8 +184,8 @@ ApicGetCurrentIrql(VOID) #endif } -VOID FORCEINLINE +VOID ApicSetIrql(KIRQL Irql) { #ifdef _M_AMD64 @@ -200,8 +200,8 @@ ApicSetIrql(KIRQL Irql) #define ApicRaiseIrql ApicSetIrql #ifdef APIC_LAZY_IRQL -VOID FORCEINLINE +VOID ApicLowerIrql(KIRQL Irql) { __writefsbyte(FIELD_OFFSET(KPCR, Irql), Irql); diff --git a/reactos/hal/halx86/apic/apic.h b/reactos/hal/halx86/apic/apic.h index e016599c097..68c0ca6dcd4 100644 --- a/reactos/hal/halx86/apic/apic.h +++ b/reactos/hal/halx86/apic/apic.h @@ -258,15 +258,15 @@ typedef union _IOAPIC_REDIRECTION_REGISTER }; } IOAPIC_REDIRECTION_REGISTER; -ULONG FORCEINLINE +ULONG ApicRead(ULONG Offset) { return *(volatile ULONG *)(APIC_BASE + Offset); } -VOID FORCEINLINE +VOID ApicWrite(ULONG Offset, ULONG Value) { *(volatile ULONG *)(APIC_BASE + Offset) = Value; diff --git a/reactos/hal/halx86/apic/rtctimer.c b/reactos/hal/halx86/apic/rtctimer.c index 5b86a1682a5..654db2baf75 100644 --- a/reactos/hal/halx86/apic/rtctimer.c +++ b/reactos/hal/halx86/apic/rtctimer.c @@ -25,8 +25,8 @@ static UCHAR RtcMinimumClockRate = 6; /* Minimum rate 6: 16 Hz / 62.5 ms */ static UCHAR RtcMaximumClockRate = 10; /* Maximum rate 10: 256 Hz / 3.9 ms */ -ULONG FORCEINLINE +ULONG RtcClockRateToIncrement(UCHAR Rate) { ULONG Freqency = ((32768 << 1) >> Rate); diff --git a/reactos/hal/halx86/up/pic.c b/reactos/hal/halx86/up/pic.c index 8c9a2379265..052dc1bb5f9 100644 --- a/reactos/hal/halx86/up/pic.c +++ b/reactos/hal/halx86/up/pic.c @@ -782,8 +782,8 @@ HalpEndSoftwareInterrupt(IN KIRQL OldIrql, /* EDGE INTERRUPT DISMISSAL FUNCTIONS *****************************************/ -BOOLEAN FORCEINLINE +BOOLEAN _HalpDismissIrqGeneric(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql) @@ -925,8 +925,8 @@ HalpDismissIrq07(IN KIRQL Irql, /* LEVEL INTERRUPT DISMISSAL FUNCTIONS ****************************************/ -BOOLEAN FORCEINLINE +BOOLEAN _HalpDismissIrqLevel(IN KIRQL Irql, IN ULONG Irq, OUT PKIRQL OldIrql) @@ -1248,8 +1248,8 @@ HalEndSystemInterrupt(IN KIRQL OldIrql, /* SOFTWARE INTERRUPT TRAPS ***************************************************/ -VOID FORCEINLINE +VOID DECLSPEC_NORETURN _HalpApcInterruptHandler(IN PKTRAP_FRAME TrapFrame) { @@ -1304,8 +1304,8 @@ HalpApcInterruptHandler(IN PKTRAP_FRAME TrapFrame) _HalpApcInterruptHandler(TrapFrame); } -KIRQL FORCEINLINE +KIRQL _HalpDispatchInterruptHandler(VOID) { KIRQL CurrentIrql;