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[HAL][HALARM] The HAL should only use KPCR.

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And why the ARM HAL uses KPCR::InterruptRoutine, a field only defined
in *powerpc*/ketypes.h, is beyond me, but OK...

See Timo vs. Alex discussion, explaining that KIPCR is a ReactOS-only
thing: https://reactos.org/archives/public/ros-dev/2008-August/010549.html
This commit is contained in:
Hermès Bélusca-Maïto 2022-03-08 04:55:17 +01:00
parent c026b5950e
commit 94c25baf85
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GPG key ID: 3B2539C65E7B93D0
5 changed files with 13 additions and 13 deletions
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6
hal/halarm/generic/pic.c
View file

@ -92,7 +92,7 @@ UCHAR HalpMaskTable[HIGH_LEVEL + 1] =
VOID VOID
HalpInitializeInterrupts(VOID) HalpInitializeInterrupts(VOID)
{ {
PKIPCR Pcr = (PKIPCR)KeGetPcr(); PKPCR Pcr = KeGetPcr();
/* Fill out the IRQL mappings */ /* Fill out the IRQL mappings */
RtlCopyMemory(Pcr->IrqlTable, HalpIrqlTable, sizeof(Pcr->IrqlTable)); RtlCopyMemory(Pcr->IrqlTable, HalpIrqlTable, sizeof(Pcr->IrqlTable));
@ -187,7 +187,7 @@ FASTCALL
KfRaiseIrql(IN KIRQL NewIrql) KfRaiseIrql(IN KIRQL NewIrql)
{ {
ARM_STATUS_REGISTER Flags; ARM_STATUS_REGISTER Flags;
PKIPCR Pcr = (PKIPCR)KeGetPcr(); PKPCR Pcr = KeGetPcr();
KIRQL CurrentIrql; KIRQL CurrentIrql;
ULONG InterruptMask; ULONG InterruptMask;
@ -232,7 +232,7 @@ FASTCALL
KfLowerIrql(IN KIRQL NewIrql) KfLowerIrql(IN KIRQL NewIrql)
{ {
ARM_STATUS_REGISTER Flags; ARM_STATUS_REGISTER Flags;
PKIPCR Pcr = (PKIPCR)KeGetPcr(); PKPCR Pcr = KeGetPcr();
ULONG InterruptMask; ULONG InterruptMask;
/* Disableinterrupts */ /* Disableinterrupts */

2
hal/halarm/generic/timer.c
View file

@ -53,7 +53,7 @@ HalpStallInterrupt(VOID)
VOID VOID
HalpInitializeClock(VOID) HalpInitializeClock(VOID)
{ {
PKIPCR Pcr = (PKIPCR)KeGetPcr(); PKPCR Pcr = KeGetPcr();
ULONG ClockInterval; ULONG ClockInterval;
SP804_CONTROL_REGISTER ControlRegister; SP804_CONTROL_REGISTER ControlRegister;

2
hal/halarm/generic/usage.c
View file

@ -54,7 +54,7 @@ HalpEnableInterruptHandler(IN UCHAR Flags,
IN KINTERRUPT_MODE Mode) IN KINTERRUPT_MODE Mode)
{ {
/* Register the routine */ /* Register the routine */
((PKIPCR)KeGetPcr())->InterruptRoutine[Irql] = Handler; KeGetPcr()->InterruptRoutine[Irql] = Handler;
} }
/* PUBLIC FUNCTIONS ***********************************************************/ /* PUBLIC FUNCTIONS ***********************************************************/

8
hal/halx86/generic/bios.c
View file

@ -302,7 +302,7 @@ HalpBorrowTss(VOID)
// Get the current TSS and its GDT entry // Get the current TSS and its GDT entry
// //
Tss = Ke386GetTr(); Tss = Ke386GetTr();
TssGdt = &((PKIPCR)KeGetPcr())->GDT[Tss / sizeof(KGDTENTRY)]; TssGdt = &KeGetPcr()->GDT[Tss / sizeof(KGDTENTRY)];
// //
// Get the KTSS limit and check if it has IOPM space // Get the KTSS limit and check if it has IOPM space
@ -324,7 +324,7 @@ HalpBorrowTss(VOID)
// //
// Get the "real" TSS // Get the "real" TSS
// //
TssGdt = &((PKIPCR)KeGetPcr())->GDT[KGDT_TSS / sizeof(KGDTENTRY)]; TssGdt = &KeGetPcr()->GDT[KGDT_TSS / sizeof(KGDTENTRY)];
TssBase = (PKTSS)(ULONG_PTR)(TssGdt->BaseLow | TssBase = (PKTSS)(ULONG_PTR)(TssGdt->BaseLow |
TssGdt->HighWord.Bytes.BaseMid << 16 | TssGdt->HighWord.Bytes.BaseMid << 16 |
TssGdt->HighWord.Bytes.BaseHi << 24); TssGdt->HighWord.Bytes.BaseHi << 24);
@ -358,7 +358,7 @@ HalpReturnTss(VOID)
// //
// Get the original TSS // Get the original TSS
// //
TssGdt = &((PKIPCR)KeGetPcr())->GDT[HalpSavedTss / sizeof(KGDTENTRY)]; TssGdt = &KeGetPcr()->GDT[HalpSavedTss / sizeof(KGDTENTRY)];
TssBase = (PKTSS)(ULONG_PTR)(TssGdt->BaseLow | TssBase = (PKTSS)(ULONG_PTR)(TssGdt->BaseLow |
TssGdt->HighWord.Bytes.BaseMid << 16 | TssGdt->HighWord.Bytes.BaseMid << 16 |
TssGdt->HighWord.Bytes.BaseHi << 24); TssGdt->HighWord.Bytes.BaseHi << 24);
@ -670,7 +670,7 @@ HalpBiosDisplayReset(VOID)
// the cmpxchg8b lock errata. Unprotect them here so we can set our custom // the cmpxchg8b lock errata. Unprotect them here so we can set our custom
// invalid op-code handler. // invalid op-code handler.
// //
IdtPte = HalAddressToPte(((PKIPCR)KeGetPcr())->IDT); IdtPte = HalAddressToPte(KeGetPcr()->IDT);
RestoreWriteProtection = IdtPte->Write != 0; RestoreWriteProtection = IdtPte->Write != 0;
IdtPte->Write = 1; IdtPte->Write = 1;

8
hal/halx86/mp/mpsirql.c
View file

@ -84,10 +84,10 @@ HalpLowerIrql(KIRQL NewIrql, BOOLEAN FromHalEndSystemInterrupt)
{ {
KeSetCurrentIrql (DISPATCH_LEVEL); KeSetCurrentIrql (DISPATCH_LEVEL);
APICWrite(APIC_TPR, IRQL2TPR (DISPATCH_LEVEL) & APIC_TPR_PRI); APICWrite(APIC_TPR, IRQL2TPR (DISPATCH_LEVEL) & APIC_TPR_PRI);
DpcRequested = __readfsbyte(FIELD_OFFSET(KIPCR, HalReserved[HAL_DPC_REQUEST])); DpcRequested = __readfsbyte(FIELD_OFFSET(KPCR, HalReserved[HAL_DPC_REQUEST]));
if (FromHalEndSystemInterrupt || DpcRequested) if (FromHalEndSystemInterrupt || DpcRequested)
{ {
__writefsbyte(FIELD_OFFSET(KIPCR, HalReserved[HAL_DPC_REQUEST]), 0); __writefsbyte(FIELD_OFFSET(KPCR, HalReserved[HAL_DPC_REQUEST]), 0);
_enable(); _enable();
KiDispatchInterrupt(); KiDispatchInterrupt();
if (!(Flags & EFLAGS_INTERRUPT_MASK)) if (!(Flags & EFLAGS_INTERRUPT_MASK))
@ -338,11 +338,11 @@ HalRequestSoftwareInterrupt(IN KIRQL Request)
switch (Request) switch (Request)
{ {
case APC_LEVEL: case APC_LEVEL:
__writefsbyte(FIELD_OFFSET(KIPCR, HalReserved[HAL_APC_REQUEST]), 1); __writefsbyte(FIELD_OFFSET(KPCR, HalReserved[HAL_APC_REQUEST]), 1);
break; break;
case DISPATCH_LEVEL: case DISPATCH_LEVEL:
__writefsbyte(FIELD_OFFSET(KIPCR, HalReserved[HAL_DPC_REQUEST]), 1); __writefsbyte(FIELD_OFFSET(KPCR, HalReserved[HAL_DPC_REQUEST]), 1);
break; break;
default: default: