From 94c25baf85ebb409a8a7a26a90df73366ce4dfe8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Herm=C3=A8s=20B=C3=A9lusca-Ma=C3=AFto?= Date: Tue, 8 Mar 2022 04:55:17 +0100 Subject: [PATCH] [HAL][HALARM] The HAL should only use KPCR. And why the ARM HAL uses KPCR::InterruptRoutine, a field only defined in *powerpc*/ketypes.h, is beyond me, but OK... See Timo vs. Alex discussion, explaining that KIPCR is a ReactOS-only thing: https://reactos.org/archives/public/ros-dev/2008-August/010549.html --- hal/halarm/generic/pic.c | 6 +++--- hal/halarm/generic/timer.c | 2 +- hal/halarm/generic/usage.c | 2 +- hal/halx86/generic/bios.c | 8 ++++---- hal/halx86/mp/mpsirql.c | 8 ++++---- 5 files changed, 13 insertions(+), 13 deletions(-) diff --git a/hal/halarm/generic/pic.c b/hal/halarm/generic/pic.c index a8c68cd6f67..8b99e462aa5 100644 --- a/hal/halarm/generic/pic.c +++ b/hal/halarm/generic/pic.c @@ -92,7 +92,7 @@ UCHAR HalpMaskTable[HIGH_LEVEL + 1] = VOID HalpInitializeInterrupts(VOID) { - PKIPCR Pcr = (PKIPCR)KeGetPcr(); + PKPCR Pcr = KeGetPcr(); /* Fill out the IRQL mappings */ RtlCopyMemory(Pcr->IrqlTable, HalpIrqlTable, sizeof(Pcr->IrqlTable)); @@ -187,7 +187,7 @@ FASTCALL KfRaiseIrql(IN KIRQL NewIrql) { ARM_STATUS_REGISTER Flags; - PKIPCR Pcr = (PKIPCR)KeGetPcr(); + PKPCR Pcr = KeGetPcr(); KIRQL CurrentIrql; ULONG InterruptMask; @@ -232,7 +232,7 @@ FASTCALL KfLowerIrql(IN KIRQL NewIrql) { ARM_STATUS_REGISTER Flags; - PKIPCR Pcr = (PKIPCR)KeGetPcr(); + PKPCR Pcr = KeGetPcr(); ULONG InterruptMask; /* Disableinterrupts */ diff --git a/hal/halarm/generic/timer.c b/hal/halarm/generic/timer.c index 0a84b7446ad..b83a64dc205 100644 --- a/hal/halarm/generic/timer.c +++ b/hal/halarm/generic/timer.c @@ -53,7 +53,7 @@ HalpStallInterrupt(VOID) VOID HalpInitializeClock(VOID) { - PKIPCR Pcr = (PKIPCR)KeGetPcr(); + PKPCR Pcr = KeGetPcr(); ULONG ClockInterval; SP804_CONTROL_REGISTER ControlRegister; diff --git a/hal/halarm/generic/usage.c b/hal/halarm/generic/usage.c index 3f44107181e..a302c118558 100644 --- a/hal/halarm/generic/usage.c +++ b/hal/halarm/generic/usage.c @@ -54,7 +54,7 @@ HalpEnableInterruptHandler(IN UCHAR Flags, IN KINTERRUPT_MODE Mode) { /* Register the routine */ - ((PKIPCR)KeGetPcr())->InterruptRoutine[Irql] = Handler; + KeGetPcr()->InterruptRoutine[Irql] = Handler; } /* PUBLIC FUNCTIONS ***********************************************************/ diff --git a/hal/halx86/generic/bios.c b/hal/halx86/generic/bios.c index aac2502a872..be5e082d1fc 100644 --- a/hal/halx86/generic/bios.c +++ b/hal/halx86/generic/bios.c @@ -302,7 +302,7 @@ HalpBorrowTss(VOID) // Get the current TSS and its GDT entry // Tss = Ke386GetTr(); - TssGdt = &((PKIPCR)KeGetPcr())->GDT[Tss / sizeof(KGDTENTRY)]; + TssGdt = &KeGetPcr()->GDT[Tss / sizeof(KGDTENTRY)]; // // Get the KTSS limit and check if it has IOPM space @@ -324,7 +324,7 @@ HalpBorrowTss(VOID) // // Get the "real" TSS // - TssGdt = &((PKIPCR)KeGetPcr())->GDT[KGDT_TSS / sizeof(KGDTENTRY)]; + TssGdt = &KeGetPcr()->GDT[KGDT_TSS / sizeof(KGDTENTRY)]; TssBase = (PKTSS)(ULONG_PTR)(TssGdt->BaseLow | TssGdt->HighWord.Bytes.BaseMid << 16 | TssGdt->HighWord.Bytes.BaseHi << 24); @@ -358,7 +358,7 @@ HalpReturnTss(VOID) // // Get the original TSS // - TssGdt = &((PKIPCR)KeGetPcr())->GDT[HalpSavedTss / sizeof(KGDTENTRY)]; + TssGdt = &KeGetPcr()->GDT[HalpSavedTss / sizeof(KGDTENTRY)]; TssBase = (PKTSS)(ULONG_PTR)(TssGdt->BaseLow | TssGdt->HighWord.Bytes.BaseMid << 16 | TssGdt->HighWord.Bytes.BaseHi << 24); @@ -670,7 +670,7 @@ HalpBiosDisplayReset(VOID) // the cmpxchg8b lock errata. Unprotect them here so we can set our custom // invalid op-code handler. // - IdtPte = HalAddressToPte(((PKIPCR)KeGetPcr())->IDT); + IdtPte = HalAddressToPte(KeGetPcr()->IDT); RestoreWriteProtection = IdtPte->Write != 0; IdtPte->Write = 1; diff --git a/hal/halx86/mp/mpsirql.c b/hal/halx86/mp/mpsirql.c index 604b07b82c2..95ef20799f9 100644 --- a/hal/halx86/mp/mpsirql.c +++ b/hal/halx86/mp/mpsirql.c @@ -84,10 +84,10 @@ HalpLowerIrql(KIRQL NewIrql, BOOLEAN FromHalEndSystemInterrupt) { KeSetCurrentIrql (DISPATCH_LEVEL); APICWrite(APIC_TPR, IRQL2TPR (DISPATCH_LEVEL) & APIC_TPR_PRI); - DpcRequested = __readfsbyte(FIELD_OFFSET(KIPCR, HalReserved[HAL_DPC_REQUEST])); + DpcRequested = __readfsbyte(FIELD_OFFSET(KPCR, HalReserved[HAL_DPC_REQUEST])); if (FromHalEndSystemInterrupt || DpcRequested) { - __writefsbyte(FIELD_OFFSET(KIPCR, HalReserved[HAL_DPC_REQUEST]), 0); + __writefsbyte(FIELD_OFFSET(KPCR, HalReserved[HAL_DPC_REQUEST]), 0); _enable(); KiDispatchInterrupt(); if (!(Flags & EFLAGS_INTERRUPT_MASK)) @@ -338,11 +338,11 @@ HalRequestSoftwareInterrupt(IN KIRQL Request) switch (Request) { case APC_LEVEL: - __writefsbyte(FIELD_OFFSET(KIPCR, HalReserved[HAL_APC_REQUEST]), 1); + __writefsbyte(FIELD_OFFSET(KPCR, HalReserved[HAL_APC_REQUEST]), 1); break; case DISPATCH_LEVEL: - __writefsbyte(FIELD_OFFSET(KIPCR, HalReserved[HAL_DPC_REQUEST]), 1); + __writefsbyte(FIELD_OFFSET(KPCR, HalReserved[HAL_DPC_REQUEST]), 1); break; default: