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[NTVDM] : Implement getMSW and setMSW for getting and setting the Machine Status Word (lower word of CR0).
[FAST486]: MSW = Machine Status Word svn path=/branches/ntvdm/; revision=61044
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2 changed files with 10 additions and 8 deletions
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@ -1803,7 +1803,7 @@ FAST486_OPCODE_HANDLER(Fast486OpcodeGroup0F01)
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/* SMSW */
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case 4:
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{
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/* Store the lower 16 bits of CR0 */
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/* Store the lower 16 bits (Machine Status Word) of CR0 */
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return Fast486WriteModrmWordOperands(State,
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&ModRegRm,
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FALSE,
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@ -1813,7 +1813,7 @@ FAST486_OPCODE_HANDLER(Fast486OpcodeGroup0F01)
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/* LMSW */
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case 6:
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{
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USHORT MasterStatusWord, Dummy;
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USHORT MachineStatusWord, Dummy;
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/* This is a privileged instruction */
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if (Fast486GetCurrentPrivLevel(State) != 0)
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@ -1822,8 +1822,8 @@ FAST486_OPCODE_HANDLER(Fast486OpcodeGroup0F01)
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return FALSE;
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}
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/* Read the new master status word */
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if (!Fast486ReadModrmWordOperands(State, &ModRegRm, &Dummy, &MasterStatusWord))
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/* Read the new Machine Status Word */
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if (!Fast486ReadModrmWordOperands(State, &ModRegRm, &Dummy, &MachineStatusWord))
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{
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/* Exception occurred */
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return FALSE;
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@ -1831,7 +1831,7 @@ FAST486_OPCODE_HANDLER(Fast486OpcodeGroup0F01)
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/* This instruction cannot be used to return to real mode */
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if ((State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE)
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&& !(MasterStatusWord & FAST486_CR0_PE))
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&& !(MachineStatusWord & FAST486_CR0_PE))
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{
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Fast486Exception(State, FAST486_EXCEPTION_GP);
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return FALSE;
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@ -1839,7 +1839,7 @@ FAST486_OPCODE_HANDLER(Fast486OpcodeGroup0F01)
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/* Set the lowest 4 bits */
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State->ControlRegisters[FAST486_REG_CR0] &= 0xFFFFFFF0;
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State->ControlRegisters[FAST486_REG_CR0] |= MasterStatusWord & 0x0F;
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State->ControlRegisters[FAST486_REG_CR0] |= MachineStatusWord & 0x0F;
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return TRUE;
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}
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