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[NTOS]
- fix ExInterlockedPopEntryList and ExInterlockedPushEntryList - Update amd64/mm.h and mm/amd64/init.c to reflect latest trunk changes - make freelist.c compile again svn path=/branches/ros-amd64-bringup/; revision=46403
This commit is contained in:
Timo Kreuzer
parent
5e7490747c
commit
84e3ee3768
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@ -79,11 +79,11 @@ ExInterlockedPopEntryList(IN PSINGLE_LIST_ENTRY ListHead,
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IN PKSPIN_LOCK Lock)
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{
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KIRQL OldIrql;
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PSINGLE_LIST_ENTRY OldHead = NULL;
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PSINGLE_LIST_ENTRY FirstEntry;
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KeAcquireSpinLock(Lock, &OldIrql);
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if (!ListHead->Next) OldHead = PopEntryList(ListHead);
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FirstEntry = PopEntryList(ListHead);
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KeReleaseSpinLock(Lock, OldIrql);
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return OldHead;
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return FirstEntry;
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}
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PSINGLE_LIST_ENTRY
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@ -94,7 +94,8 @@ ExInterlockedPushEntryList(IN PSINGLE_LIST_ENTRY ListHead,
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KIRQL OldIrql;
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PSINGLE_LIST_ENTRY OldHead = NULL;
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KeAcquireSpinLock(Lock, &OldIrql);
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if (!ListHead->Next) OldHead = PushEntryList(ListHead, ListEntry);
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OldHead = ListHead->Next;
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PushEntryList(ListHead, ListEntry);
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KeReleaseSpinLock(Lock, OldIrql);
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return OldHead;
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}
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@ -2,8 +2,7 @@
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* Lowlevel memory managment definitions
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*/
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#ifndef __NTOSKRNL_INCLUDE_INTERNAL_AMD64_MM_H
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#define __NTOSKRNL_INCLUDE_INTERNAL_AMD64_MM_H
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#pragma once
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/* Helper macros */
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#define PAGE_MASK(x) ((x)&(~0xfff))
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@ -22,8 +21,25 @@
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#define MI_NONPAGED_POOL_END (PVOID)0xFFFFFAE000000000ULL
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#define MI_DEBUG_MAPPING (PVOID)0xFFFFFFFF80000000ULL // FIXME
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#define MI_HIGHEST_SYSTEM_ADDRESS (PVOID)0xFFFFFFFFFFFFFFFFULL
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#define MI_SYSTEM_CACHE_WS_START (PVOID)0xFFFFF78000001000ULL // CHECKME
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/* Memory sizes */
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#define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING ((255*1024*1024) >> PAGE_SHIFT)
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#define MI_MIN_PAGES_FOR_SYSPTE_TUNING ((19*1024*1024) >> PAGE_SHIFT)
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#define MI_MIN_PAGES_FOR_SYSPTE_BOOST ((32*1024*1024) >> PAGE_SHIFT)
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#define MI_MAX_INIT_NONPAGED_POOL_SIZE (128ULL * 1024 * 1024 * 1024)
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#define MI_MAX_NONPAGED_POOL_SIZE (128ULL * 1024 * 1024 * 1024)
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#define MI_MAX_FREE_PAGE_LISTS 4
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#define MI_MIN_INIT_PAGED_POOLSIZE (32 * 1024 * 1024)
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#define MI_SESSION_VIEW_SIZE (20 * 1024 * 1024)
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#define MI_SESSION_POOL_SIZE (16 * 1024 * 1024)
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#define MI_SESSION_IMAGE_SIZE (8 * 1024 * 1024)
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#define MI_SESSION_WORKING_SET_SIZE (4 * 1024 * 1024)
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#define MI_SESSION_SIZE (MI_SESSION_VIEW_SIZE + \
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MI_SESSION_POOL_SIZE + \
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MI_SESSION_IMAGE_SIZE + \
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MI_SESSION_WORKING_SET_SIZE)
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#define MI_SYSTEM_VIEW_SIZE (16 * 1024 * 1024)
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#define MI_NUMBER_SYSTEM_PTES 22000
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PULONG64
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@ -53,21 +69,23 @@ MiAddressToPpe(PVOID Address)
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PMMPTE
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FORCEINLINE
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MiAddressToPde(PVOID Address)
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_MiAddressToPde(PVOID Address)
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{
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ULONG64 Offset = (ULONG64)Address >> (PDI_SHIFT - 3);
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Offset &= 0x7FFFFFF << 3;
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return (PMMPTE)(PDE_BASE + Offset);
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}
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#define MiAddressToPde(x) _MiAddressToPde((PVOID)(x))
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PMMPTE
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FORCEINLINE
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MiAddressToPte(PVOID Address)
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_MiAddressToPte(PVOID Address)
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{
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ULONG64 Offset = (ULONG64)Address >> (PTI_SHIFT - 3);
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Offset &= 0xFFFFFFFFFULL << 3;
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return (PMMPTE)(PTE_BASE + Offset);
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}
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#define MiAddressToPte(x) _MiAddressToPte((PVOID)(x))
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/* Convert a PTE into a corresponding address */
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PVOID
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@ -90,9 +108,9 @@ MiIsPdeForAddressValid(PVOID Address)
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(MiAddressToPde(Address)->u.Hard.Valid));
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}
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//#define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE))
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//#define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE)))
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//#define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE)
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#define ADDR_TO_PAGE_TABLE(v) (((ULONG_PTR)(v)) / (512 * PAGE_SIZE))
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#define ADDR_TO_PDE_OFFSET(v) ((((ULONG_PTR)(v)) / (512 * PAGE_SIZE)))
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#define ADDR_TO_PTE_OFFSET(v) ((((ULONG_PTR)(v)) % (512 * PAGE_SIZE)) / PAGE_SIZE)
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#define VAtoPXI(va) ((((ULONG64)va) >> PXI_SHIFT) & 0x1FF)
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#define VAtoPPI(va) ((((ULONG64)va) >> PPI_SHIFT) & 0x1FF)
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@ -117,8 +135,6 @@ MmInitGlobalKernelPageDirectory(VOID)
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#define IS_ALIGNED(addr, align) (((ULONG64)(addr) & (align - 1)) == 0)
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#define IS_PAGE_ALIGNED(addr) IS_ALIGNED(addr, PAGE_SIZE)
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/// MIARM.H
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/* Easy accessing PFN in PTE */
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#define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber)
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@ -128,43 +144,47 @@ MmInitGlobalKernelPageDirectory(VOID)
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#define MI_PAGE_DISABLE_CACHE(x) ((x)->u.Hard.CacheDisable = 1)
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#define MI_PAGE_WRITE_THROUGH(x) ((x)->u.Hard.WriteThrough = 1)
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#define MI_PAGE_WRITE_COMBINED(x) ((x)->u.Hard.WriteThrough = 0)
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#if !defined(CONFIG_SMP)
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#define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.Write == 1)
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#else
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#define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.Writable == 1)
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#endif
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#define MI_IS_PAGE_COPY_ON_WRITE(x)((x)->u.Hard.CopyOnWrite == 1)
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#define MI_IS_PAGE_DIRTY(x) ((x)->u.Hard.Dirty == 1)
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#define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Owner = 1)
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#if !defined(CONFIG_SMP)
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#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Write = 1)
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#else
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#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1)
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#endif
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#if 0 // FIXME
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#define PAGE_TO_SECTION_PAGE_DIRECTORY_OFFSET(x) \
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((x) / (4*1024*1024))
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#define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING ((255*1024*1024) >> PAGE_SHIFT)
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#define MI_MIN_PAGES_FOR_SYSPTE_TUNING ((19*1024*1024) >> PAGE_SHIFT)
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#define MI_MIN_PAGES_FOR_SYSPTE_BOOST ((32*1024*1024) >> PAGE_SHIFT)
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#define MI_MAX_INIT_NONPAGED_POOL_SIZE (128ULL * 1024 * 1024 * 1024)
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#define MI_MAX_NONPAGED_POOL_SIZE (128ULL * 1024 * 1024 * 1024)
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#define MI_MAX_FREE_PAGE_LISTS 4
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#define PAGE_TO_SECTION_PAGE_TABLE_OFFSET(x) \
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((((x)) % (4*1024*1024)) / (4*1024))
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#endif
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#define MI_MIN_INIT_PAGED_POOLSIZE (32 * 1024 * 1024)
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#define NR_SECTION_PAGE_TABLES 1024
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#define NR_SECTION_PAGE_ENTRIES 1024
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#define MI_SESSION_VIEW_SIZE (20 * 1024 * 1024)
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#define MI_SESSION_POOL_SIZE (16 * 1024 * 1024)
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#define MI_SESSION_IMAGE_SIZE (8 * 1024 * 1024)
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#define MI_SESSION_WORKING_SET_SIZE (4 * 1024 * 1024)
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#define MI_SESSION_SIZE (MI_SESSION_VIEW_SIZE + \
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MI_SESSION_POOL_SIZE + \
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MI_SESSION_IMAGE_SIZE + \
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MI_SESSION_WORKING_SET_SIZE)
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//#define TEB_BASE 0x7FFDE000
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#define MI_SYSTEM_VIEW_SIZE (16 * 1024 * 1024)
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#define MI_HYPERSPACE_PTES (256 - 1)
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#define MI_ZERO_PTES (32)
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#define MI_MAPPING_RANGE_START (ULONG)HYPER_SPACE
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#define MI_MAPPING_RANGE_END (MI_MAPPING_RANGE_START + \
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MI_HYPERSPACE_PTES * PAGE_SIZE)
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#define MI_ZERO_PTE (PMMPTE)(MI_MAPPING_RANGE_END + \
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PAGE_SIZE)
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#define MM_HIGHEST_VAD_ADDRESS \
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(PVOID)((ULONG_PTR)MM_HIGHEST_USER_ADDRESS - (16 * PAGE_SIZE))
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/* On x86, these two are the same */
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#define MMPDE MMPTE
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#define PMMPDE PMMPTE
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/*
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* FIXME - different architectures have different cache line sizes...
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*/
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#define MM_CACHE_LINE_SIZE 32
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//
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// FIXFIX: These should go in ex.h after the pool merge
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//
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#define POOL_LISTS_PER_PAGE (PAGE_SIZE / sizeof(LIST_ENTRY))
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#define BASE_POOL_TYPE_MASK 1
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#define POOL_MAX_ALLOC (PAGE_SIZE - (sizeof(POOL_HEADER) + sizeof(LIST_ENTRY)))
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#endif /* __NTOSKRNL_INCLUDE_INTERNAL_AMD64_MM_H */
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@ -27,21 +27,21 @@ HalInitializeBios(ULONG Unknown, PLOADER_PARAMETER_BLOCK LoaderBlock);
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/* GLOBALS *****************************************************************/
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/* Sizes */
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ULONG64 MmBootImageSize;
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ULONG64 MmMinimumNonPagedPoolSize = 256 * 1024;
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ULONG64 MmSizeOfNonPagedPoolInBytes;
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ULONG64 MmMaximumNonPagedPoolInBytes;
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ULONG64 MmMaximumNonPagedPoolPercent;
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ULONG64 MmMinAdditionNonPagedPoolPerMb = 32 * 1024;
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ULONG64 MmMaxAdditionNonPagedPoolPerMb = 400 * 1024;
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ULONG64 MmDefaultMaximumNonPagedPool = 1024 * 1024;
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ULONG64 MmSessionSize = MI_SESSION_SIZE;
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ULONG64 MmSessionViewSize = MI_SESSION_VIEW_SIZE;
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ULONG64 MmSessionPoolSize = MI_SESSION_POOL_SIZE;
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ULONG64 MmSessionImageSize = MI_SESSION_IMAGE_SIZE;
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ULONG64 MmSystemViewSize = MI_SYSTEM_VIEW_SIZE;
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ULONG64 MmSizeOfPagedPoolInBytes = MI_MIN_INIT_PAGED_POOLSIZE;
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ULONG64 MiNonPagedSystemSize;
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//SIZE_T MmBootImageSize;
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//SIZE_T MmMinimumNonPagedPoolSize = 256 * 1024;
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//SIZE_T MmSizeOfNonPagedPoolInBytes;
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//SIZE_T MmMaximumNonPagedPoolInBytes;
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//ULONG MmMaximumNonPagedPoolPercent;
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//ULONG MmMinAdditionNonPagedPoolPerMb = 32 * 1024;
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//ULONG MmMaxAdditionNonPagedPoolPerMb = 400 * 1024;
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//SIZE_T MmDefaultMaximumNonPagedPool = 1024 * 1024;
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//SIZE_T MmSessionSize = MI_SESSION_SIZE;
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SIZE_T MmSessionViewSize = MI_SESSION_VIEW_SIZE;
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SIZE_T MmSessionPoolSize = MI_SESSION_POOL_SIZE;
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SIZE_T MmSessionImageSize = MI_SESSION_IMAGE_SIZE;
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SIZE_T MmSystemViewSize = MI_SYSTEM_VIEW_SIZE;
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//SIZE_T MmSizeOfPagedPoolInBytes = MI_MIN_INIT_PAGED_POOLSIZE;
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SIZE_T MiNonPagedSystemSize;
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/* Address ranges */
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ULONG64 MmUserProbeAddress = 0x7FFFFFF0000ULL;
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@ -57,24 +57,24 @@ PVOID MiSessionImageEnd; // FFFFF98000000000 = MiSessionS
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PVOID MiSessionSpaceEnd = MI_SESSION_SPACE_END; // FFFFF98000000000
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PVOID MmSystemCacheStart; // FFFFF98000000000
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PVOID MmSystemCacheEnd; // FFFFFA8000000000
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PVOID MmPagedPoolStart = MI_PAGED_POOL_START; // FFFFFA8000000000
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/// PVOID MmPagedPoolStart = MI_PAGED_POOL_START; // FFFFFA8000000000
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PVOID MmPagedPoolEnd; // FFFFFAA000000000
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PVOID MiSystemViewStart;
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PVOID MmNonPagedSystemStart; // FFFFFAA000000000
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PVOID MmNonPagedPoolStart;
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PVOID MmNonPagedPoolExpansionStart;
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PVOID MmNonPagedPoolEnd = MI_NONPAGED_POOL_END; // 0xFFFFFAE000000000
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///PVOID MmNonPagedPoolEnd = MI_NONPAGED_POOL_END; // 0xFFFFFAE000000000
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PVOID MmHyperSpaceEnd = (PVOID)HYPER_SPACE_END;
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PPHYSICAL_MEMORY_DESCRIPTOR MmPhysicalMemoryBlock;
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ULONG MmNumberOfPhysicalPages, MmHighestPhysicalPage, MmLowestPhysicalPage = -1; // FIXME: ULONG64
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//PPHYSICAL_MEMORY_DESCRIPTOR MmPhysicalMemoryBlock;
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//ULONG MmNumberOfPhysicalPages, MmHighestPhysicalPage, MmLowestPhysicalPage = -1; // FIXME: ULONG64
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ULONG MmNumberOfSystemPtes;
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PMMPTE MmSystemPagePtes;
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//ULONG MmNumberOfSystemPtes;
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//PMMPTE MmSystemPagePtes;
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MMSUPPORT MmSystemCacheWs;
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RTL_BITMAP MiPfnBitMap;
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ULONG64 MxPfnAllocation;
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//RTL_BITMAP MiPfnBitMap;
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//ULONG64 MxPfnAllocation;
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ULONG64 MxPfnSizeInBytes;
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PMEMORY_ALLOCATION_DESCRIPTOR MxFreeDescriptor;
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@ -86,8 +86,8 @@ BOOLEAN MiIncludeType[LoaderMaximum];
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PFN_NUMBER MxFreePageBase;
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ULONG64 MxFreePageCount = 0;
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PFN_NUMBER MmSystemPageDirectory;
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PFN_NUMBER MmSizeOfPagedPoolInPages = MI_MIN_INIT_PAGED_POOLSIZE / PAGE_SIZE;
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extern PFN_NUMBER MmSystemPageDirectory;
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//PFN_NUMBER MmSizeOfPagedPoolInPages = MI_MIN_INIT_PAGED_POOLSIZE / PAGE_SIZE;
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BOOLEAN MiPfnsInitialized = FALSE;
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@ -187,7 +187,7 @@ MiEarlyAllocPage()
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if (MiPfnsInitialized)
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{
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return MmAllocPage(MC_SYSTEM, 0);
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return MmAllocPage(MC_SYSTEM);
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}
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/* Make sure we have enough pages */
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@ -308,7 +308,7 @@ MiPreparePfnDatabse(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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MxPfnAllocation = MxPfnSizeInBytes >> PAGE_SHIFT;
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/* Simply start at hardcoded address */
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MmPfnDatabase = MI_PFN_DATABASE;
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MmPfnDatabase[1] = MI_PFN_DATABASE;
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/* Loop the memory descriptors */
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for (ListEntry = LoaderBlock->MemoryDescriptorListHead.Flink;
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@ -552,7 +552,7 @@ MiBuildNonPagedPool(VOID)
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}
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/* Initialize the ARM3 nonpaged pool */
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MiInitializeArmPool();
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MiInitializeNonPagedPool();
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/* Initialize the nonpaged pool */
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InitializePool(NonPagedPool, 0);
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@ -693,7 +693,7 @@ MiBuildPhysicalMemoryBlock(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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VOID
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NTAPI
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MiBuildPagedPool(VOID)
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MiBuildPagedPool_x(VOID)
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{
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PMMPTE Pte;
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MMPTE TmplPte;
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@ -737,7 +737,7 @@ MiBuildPagedPool(VOID)
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if (!Pte->u.Flush.Valid)
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{
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/* Map it! */
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TmplPte.u.Flush.PageFrameNumber = MmAllocPage(MC_SYSTEM, 0);
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TmplPte.u.Flush.PageFrameNumber = MmAllocPage(MC_SYSTEM);
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*Pte = TmplPte;
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}
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@ -817,7 +817,7 @@ MiBuildPagedPool(VOID)
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NTSTATUS
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NTAPI
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MmArmInitSystem(IN ULONG Phase,
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MmArmInitSystem_x(IN ULONG Phase,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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if (Phase == 0)
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@ -829,7 +829,7 @@ MmArmInitSystem(IN ULONG Phase,
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MiEvaluateMemoryDescriptors(LoaderBlock);
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/* Start PFN database at hardcoded address */
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MmPfnDatabase = MI_PFN_DATABASE;
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MmPfnDatabase[1] = MI_PFN_DATABASE;
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/* Prepare PFN database mappings */
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MiPreparePfnDatabse(LoaderBlock);
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@ -15,7 +15,7 @@
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#undef InterlockedExchangePte
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#define InterlockedExchangePte(pte1, pte2) \
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InterlockedExchange64(&pte1->u.Long, pte2.u.Long)
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InterlockedExchange64((LONG64*)&pte1->u.Long, pte2.u.Long)
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#define PAGE_EXECUTE_ANY (PAGE_EXECUTE|PAGE_EXECUTE_READ|PAGE_EXECUTE_READWRITE|PAGE_EXECUTE_WRITECOPY)
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#define PAGE_WRITE_ANY (PAGE_EXECUTE_READWRITE|PAGE_READWRITE|PAGE_EXECUTE_WRITECOPY|PAGE_WRITECOPY)
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@ -251,7 +251,6 @@ NTAPI
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MmGetPageProtect(PEPROCESS Process, PVOID Address)
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{
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MMPTE Pte;
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ULONG Protect;
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Pte.u.Long = MiGetPteValueForProcess(Process, Address);
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@ -362,7 +361,7 @@ MmDeleteVirtualMapping(
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if (Pte)
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{
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/* Atomically set the entry to zero and get the old value. */
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OldPte.u.Long = InterlockedExchange64(&Pte->u.Long, 0);
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OldPte.u.Long = InterlockedExchange64((LONG64*)&Pte->u.Long, 0);
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if (OldPte.u.Hard.Valid)
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{
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@ -27,14 +27,9 @@
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//
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// ReactOS to NT Physical Page Descriptor Entry Legacy Mapping Definitions
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//
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// REACTOS NT
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//
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#define RmapListHead AweReferenceCount
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#define PHYSICAL_PAGE MMPFN
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#define PPHYSICAL_PAGE PMMPFN
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/* The first array contains ReactOS PFNs, the second contains ARM3 PFNs */
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PPHYSICAL_PAGE MmPfnDatabase[2];
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typedef union
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{
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MMPFN;// Pfn;
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struct
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{
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@ -61,18 +56,22 @@ PPHYSICAL_PAGE MmPfnDatabase[2];
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|||
|
||||
C_ASSERT(sizeof(PHYSICAL_PAGE) == sizeof(MMPFN));
|
||||
|
||||
#define MiGetPfnEntry(Pfn) ((PPHYSICAL_PAGE)MiGetPfnEntry(Pfn))
|
||||
//#define MiGetPfnEntry(Pfn) ((PPHYSICAL_PAGE)MiGetPfnEntry(Pfn))
|
||||
#define MiGetPfnEntryIndex(x) MiGetPfnEntryIndex((struct _MMPFN*)x)
|
||||
#define LockCount Flags.LockCount
|
||||
|
||||
PMMPFN MmPfnDatabase;
|
||||
#define MmPfnDatabase ((PPHYSICAL_PAGE)MmPfnDatabase)
|
||||
/* The first array contains ReactOS PFNs, the second contains ARM3 PFNs */
|
||||
PMMPFN MmPfnDatabase[2];
|
||||
#define MmPfnDatabase ((PPHYSICAL_PAGE*)MmPfnDatabase)
|
||||
|
||||
#define MMPFN PHYSICAL_PAGE
|
||||
#define PMMPFN PPHYSICAL_PAGE
|
||||
//#define MMPFN PHYSICAL_PAGE
|
||||
//#define PMMPFN PPHYSICAL_PAGE
|
||||
|
||||
ULONG MmAvailablePages;
|
||||
ULONG MmResidentAvailablePages;
|
||||
/* The first array contains ReactOS PFNs, the second contains ARM3 PFNs */
|
||||
//PPHYSICAL_PAGE MmPfnDatabase[2];
|
||||
|
||||
PFN_NUMBER MmAvailablePages;
|
||||
PFN_NUMBER MmResidentAvailablePages;
|
||||
|
||||
SIZE_T MmTotalCommitLimit;
|
||||
SIZE_T MmTotalCommittedPages;
|
||||
|
|
@ -108,7 +107,7 @@ MiInitializeUserPfnBitmap(VOID)
|
|||
RtlClearAllBits(&MiUserPfnBitMap);
|
||||
}
|
||||
|
||||
PFN_TYPE
|
||||
PFN_NUMBER
|
||||
NTAPI
|
||||
MmGetLRUFirstUserPage(VOID)
|
||||
{
|
||||
|
|
@ -371,7 +370,7 @@ MiAllocatePagesForMdl(IN PHYSICAL_ADDRESS LowAddress,
|
|||
PFN_NUMBER PageCount, LowPage, HighPage, SkipPages, PagesFound = 0, Page;
|
||||
PPFN_NUMBER MdlPage, LastMdlPage;
|
||||
KIRQL OldIrql;
|
||||
PPHYSICAL_PAGE Pfn1;
|
||||
PMMPFN Pfn1;
|
||||
INT LookForZeroedPages;
|
||||
ASSERT (KeGetCurrentIrql() <= APC_LEVEL);
|
||||
|
||||
|
|
@ -608,7 +607,7 @@ NTAPI
|
|||
MmDumpPfnDatabase(VOID)
|
||||
{
|
||||
ULONG i;
|
||||
PPHYSICAL_PAGE Pfn1;
|
||||
PMMPFN Pfn1;
|
||||
PCHAR State = "????", Type = "Unknown";
|
||||
KIRQL OldIrql;
|
||||
ULONG Totals[5] = {0}, FreePages = 0;
|
||||
|
|
@ -646,7 +645,7 @@ MmDumpPfnDatabase(VOID)
|
|||
State,
|
||||
Type,
|
||||
Pfn1->u3.e2.ReferenceCount,
|
||||
Pfn1->RmapListHead);
|
||||
((PPHYSICAL_PAGE)Pfn1)->RmapListHead);
|
||||
}
|
||||
|
||||
DbgPrint("Nonpaged Pool: %d pages\t[%d KB]\n", Totals[MC_NPPOOL], (Totals[MC_NPPOOL] << PAGE_SHIFT) / 1024);
|
||||
|
|
@ -742,7 +741,7 @@ MmSetRmapListHeadPage(PFN_NUMBER Pfn, struct _MM_RMAP_ENTRY* ListHead)
|
|||
KIRQL oldIrql;
|
||||
|
||||
oldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
|
||||
MiGetPfnEntry(Pfn)->RmapListHead = (LONG_PTR)ListHead;
|
||||
((PPHYSICAL_PAGE)MiGetPfnEntry(Pfn))->RmapListHead = (LONG_PTR)ListHead;
|
||||
KeReleaseQueuedSpinLock(LockQueuePfnLock, oldIrql);
|
||||
}
|
||||
|
||||
|
|
@ -754,7 +753,7 @@ MmGetRmapListHeadPage(PFN_NUMBER Pfn)
|
|||
struct _MM_RMAP_ENTRY* ListHead;
|
||||
|
||||
oldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
|
||||
ListHead = (struct _MM_RMAP_ENTRY*)MiGetPfnEntry(Pfn)->RmapListHead;
|
||||
ListHead = (struct _MM_RMAP_ENTRY*)((PPHYSICAL_PAGE)MiGetPfnEntry(Pfn))->RmapListHead;
|
||||
KeReleaseQueuedSpinLock(LockQueuePfnLock, oldIrql);
|
||||
|
||||
return(ListHead);
|
||||
|
|
@ -833,7 +832,7 @@ MmIsPageInUse(PFN_NUMBER Pfn)
|
|||
|
||||
VOID
|
||||
NTAPI
|
||||
MiSetConsumer(IN PFN_TYPE Pfn,
|
||||
MiSetConsumer(IN PFN_NUMBER Pfn,
|
||||
IN ULONG Type)
|
||||
{
|
||||
MiGetPfnEntry(Pfn)->u3.e1.PageLocation = ActiveAndValid;
|
||||
|
|
|
|||
Loading…
Reference in a new issue