[HALX86] Print the correct size of the BAR in HalpDebugPciDumpBus()

Reference: https://wiki.osdev.org/PCI#Address_and_size_of_the_BAR

To determine the amount of address space needed by a PCI device,
you must save the original value of the BAR, write a value
of all 1's to the register, then read it back.

Note: 64-bit BARs are not supported yet.
This commit is contained in:
Dmitry Borisov 2022-05-26 19:40:17 +06:00 committed by GitHub
parent 11e0ed3c2b
commit 6f4be52a1c
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
2 changed files with 28 additions and 6 deletions

View file

@ -516,6 +516,8 @@ CODE_SEG("INIT")
VOID VOID
NTAPI NTAPI
HalpDebugPciDumpBus( HalpDebugPciDumpBus(
IN PBUS_HANDLER BusHandler,
IN PCI_SLOT_NUMBER PciSlot,
IN ULONG i, IN ULONG i,
IN ULONG j, IN ULONG j,
IN ULONG k, IN ULONG k,

View file

@ -787,7 +787,9 @@ ShowSize(ULONG x)
CODE_SEG("INIT") CODE_SEG("INIT")
VOID VOID
NTAPI NTAPI
HalpDebugPciDumpBus(IN ULONG i, HalpDebugPciDumpBus(IN PBUS_HANDLER BusHandler,
IN PCI_SLOT_NUMBER PciSlot,
IN ULONG i,
IN ULONG j, IN ULONG j,
IN ULONG k, IN ULONG k,
IN PPCI_COMMON_CONFIG PciData) IN PPCI_COMMON_CONFIG PciData)
@ -963,12 +965,30 @@ HalpDebugPciDumpBus(IN ULONG i,
Mem = 0; Mem = 0;
if (Mem) if (Mem)
{ {
ULONG PciBar = 0xFFFFFFFF;
HalpWritePCIConfig(BusHandler,
PciSlot,
&PciBar,
FIELD_OFFSET(PCI_COMMON_HEADER, u.type0.BaseAddresses[b]),
sizeof(ULONG));
HalpReadPCIConfig(BusHandler,
PciSlot,
&PciBar,
FIELD_OFFSET(PCI_COMMON_HEADER, u.type0.BaseAddresses[b]),
sizeof(ULONG));
HalpWritePCIConfig(BusHandler,
PciSlot,
&Mem,
FIELD_OFFSET(PCI_COMMON_HEADER, u.type0.BaseAddresses[b]),
sizeof(ULONG));
/* Decode the address type */ /* Decode the address type */
if (Mem & PCI_ADDRESS_IO_SPACE) if (PciBar & PCI_ADDRESS_IO_SPACE)
{ {
/* Guess the size */ /* Guess the size */
Size = 1 << 2; Size = 1 << 2;
while (!(Mem & Size) && (Size)) Size <<= 1; while (!(PciBar & Size) && (Size)) Size <<= 1;
/* Print it out */ /* Print it out */
DbgPrint("\tI/O ports at %04lx", Mem & PCI_ADDRESS_IO_ADDRESS_MASK); DbgPrint("\tI/O ports at %04lx", Mem & PCI_ADDRESS_IO_ADDRESS_MASK);
@ -977,8 +997,8 @@ HalpDebugPciDumpBus(IN ULONG i,
else else
{ {
/* Guess the size */ /* Guess the size */
Size = 1 << 8; Size = 1 << 4;
while (!(Mem & Size) && (Size)) Size <<= 1; while (!(PciBar & Size) && (Size)) Size <<= 1;
/* Print it out */ /* Print it out */
DbgPrint("\tMemory at %08lx (%d-bit, %sprefetchable)", DbgPrint("\tMemory at %08lx (%d-bit, %sprefetchable)",
@ -1102,7 +1122,7 @@ HalpInitializePciBus(VOID)
if (PciData->VendorID == PCI_INVALID_VENDORID) continue; if (PciData->VendorID == PCI_INVALID_VENDORID) continue;
/* Print out the entry */ /* Print out the entry */
HalpDebugPciDumpBus(i, j, k, PciData); HalpDebugPciDumpBus(BusHandler, PciSlot, i, j, k, PciData);
/* Check if this is a Cardbus bridge */ /* Check if this is a Cardbus bridge */
if (PCI_CONFIGURATION_TYPE(PciData) == PCI_CARDBUS_BRIDGE_TYPE) if (PCI_CONFIGURATION_TYPE(PciData) == PCI_CARDBUS_BRIDGE_TYPE)