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https://github.com/reactos/reactos.git
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6f4be52a1c
Reference: https://wiki.osdev.org/PCI#Address_and_size_of_the_BAR To determine the amount of address space needed by a PCI device, you must save the original value of the BAR, write a value of all 1's to the register, then read it back. Note: 64-bit BARs are not supported yet.
594 lines
9.5 KiB
C
594 lines
9.5 KiB
C
/*
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*
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*/
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#pragma once
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#ifdef CONFIG_SMP
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#define HAL_BUILD_TYPE (DBG ? PRCB_BUILD_DEBUG : 0)
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#else
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#define HAL_BUILD_TYPE ((DBG ? PRCB_BUILD_DEBUG : 0) | PRCB_BUILD_UNIPROCESSOR)
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#endif
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typedef struct _HAL_BIOS_FRAME
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{
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ULONG SegSs;
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ULONG Esp;
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ULONG EFlags;
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ULONG SegCs;
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ULONG Eip;
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PKTRAP_FRAME TrapFrame;
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ULONG CsLimit;
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ULONG CsBase;
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ULONG CsFlags;
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ULONG SsLimit;
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ULONG SsBase;
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ULONG SsFlags;
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ULONG Prefix;
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} HAL_BIOS_FRAME, *PHAL_BIOS_FRAME;
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typedef
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VOID
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(__cdecl *PHAL_SW_INTERRUPT_HANDLER)(
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VOID
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);
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typedef
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VOID
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(FASTCALL *PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY)(
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IN PKTRAP_FRAME TrapFrame
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);
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#define HAL_APC_REQUEST 0
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#define HAL_DPC_REQUEST 1
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/* HAL profiling offsets in KeGetPcr()->HalReserved[] */
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#define HAL_PROFILING_INTERVAL 0
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#define HAL_PROFILING_MULTIPLIER 1
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/* Usage flags */
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#define IDT_REGISTERED 0x01
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#define IDT_LATCHED 0x02
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#define IDT_READ_ONLY 0x04
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#define IDT_INTERNAL 0x11
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#define IDT_DEVICE 0x21
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/* Conversion functions */
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#define BCD_INT(bcd) \
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(((bcd & 0xF0) >> 4) * 10 + (bcd & 0x0F))
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#define INT_BCD(int) \
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(UCHAR)(((int / 10) << 4) + (int % 10))
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typedef
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BOOLEAN
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(NTAPI *PHAL_DISMISS_INTERRUPT)(
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IN KIRQL Irql,
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IN ULONG Irq,
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OUT PKIRQL OldIrql
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);
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BOOLEAN
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NTAPI
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HalpDismissIrqGeneric(
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IN KIRQL Irql,
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IN ULONG Irq,
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OUT PKIRQL OldIrql
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);
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BOOLEAN
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NTAPI
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HalpDismissIrq15(
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IN KIRQL Irql,
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IN ULONG Irq,
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OUT PKIRQL OldIrql
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);
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BOOLEAN
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NTAPI
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HalpDismissIrq13(
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IN KIRQL Irql,
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IN ULONG Irq,
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OUT PKIRQL OldIrql
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);
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BOOLEAN
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NTAPI
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HalpDismissIrq07(
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IN KIRQL Irql,
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IN ULONG Irq,
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OUT PKIRQL OldIrql
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);
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BOOLEAN
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NTAPI
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HalpDismissIrqLevel(
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IN KIRQL Irql,
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IN ULONG Irq,
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OUT PKIRQL OldIrql
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);
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BOOLEAN
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NTAPI
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HalpDismissIrq15Level(
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IN KIRQL Irql,
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IN ULONG Irq,
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OUT PKIRQL OldIrql
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);
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BOOLEAN
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NTAPI
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HalpDismissIrq13Level(
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IN KIRQL Irql,
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IN ULONG Irq,
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OUT PKIRQL OldIrql
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);
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BOOLEAN
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NTAPI
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HalpDismissIrq07Level(
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IN KIRQL Irql,
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IN ULONG Irq,
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OUT PKIRQL OldIrql
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);
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VOID
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__cdecl
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HalpHardwareInterruptLevel(
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VOID
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);
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//
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// Hack Flags
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//
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#define HALP_REVISION_FROM_HACK_FLAGS(x) ((x) >> 24)
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#define HALP_REVISION_HACK_FLAGS(x) ((x) >> 12)
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#define HALP_HACK_FLAGS(x) ((x) & 0xFFF)
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//
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// Feature flags
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//
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#define HALP_CARD_FEATURE_FULL_DECODE 0x0001
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//
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// Match Flags
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//
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#define HALP_CHECK_CARD_REVISION_ID 0x10000
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#define HALP_CHECK_CARD_SUBVENDOR_ID 0x20000
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#define HALP_CHECK_CARD_SUBSYSTEM_ID 0x40000
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//
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// Mm PTE/PDE to Hal PTE/PDE
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//
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#define HalAddressToPde(x) (PHARDWARE_PTE)MiAddressToPde(x)
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#define HalAddressToPte(x) (PHARDWARE_PTE)MiAddressToPte(x)
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typedef struct _IDTUsageFlags
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{
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UCHAR Flags;
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} IDTUsageFlags;
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typedef struct
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{
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KIRQL Irql;
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UCHAR BusReleativeVector;
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} IDTUsage;
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typedef struct _HalAddressUsage
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{
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struct _HalAddressUsage *Next;
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CM_RESOURCE_TYPE Type;
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UCHAR Flags;
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struct
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{
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ULONG Start;
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ULONG Length;
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} Element[];
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} ADDRESS_USAGE, *PADDRESS_USAGE;
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/* adapter.c */
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PADAPTER_OBJECT NTAPI HalpAllocateAdapterEx(ULONG NumberOfMapRegisters,BOOLEAN IsMaster, BOOLEAN Dma32BitAddresses);
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/* sysinfo.c */
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CODE_SEG("INIT")
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VOID
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NTAPI
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HalpRegisterVector(IN UCHAR Flags,
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IN ULONG BusVector,
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IN ULONG SystemVector,
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IN KIRQL Irql);
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CODE_SEG("INIT")
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VOID
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NTAPI
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HalpEnableInterruptHandler(IN UCHAR Flags,
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IN ULONG BusVector,
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IN ULONG SystemVector,
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IN KIRQL Irql,
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IN PVOID Handler,
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IN KINTERRUPT_MODE Mode);
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/* pic.c */
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VOID NTAPI HalpInitializePICs(IN BOOLEAN EnableInterrupts);
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VOID __cdecl HalpApcInterrupt(VOID);
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VOID __cdecl HalpDispatchInterrupt(VOID);
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PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2(VOID);
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DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame);
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DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame);
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/* profil.c */
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extern BOOLEAN HalpProfilingStopped;
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/* timer.c */
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CODE_SEG("INIT") VOID NTAPI HalpInitializeClock(VOID);
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VOID __cdecl HalpClockInterrupt(VOID);
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VOID __cdecl HalpProfileInterrupt(VOID);
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typedef struct _HALP_ROLLOVER
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{
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ULONG RollOver;
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ULONG Increment;
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} HALP_ROLLOVER, *PHALP_ROLLOVER;
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VOID
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NTAPI
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HalpCalibrateStallExecution(VOID);
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/* pci.c */
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VOID HalpInitPciBus (VOID);
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/* dma.c */
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CODE_SEG("INIT") VOID HalpInitDma (VOID);
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/* Non-generic initialization */
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VOID HalpInitPhase0 (PLOADER_PARAMETER_BLOCK LoaderBlock);
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VOID HalpInitPhase1(VOID);
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VOID
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NTAPI
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HalpFlushTLB(VOID);
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//
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// KD Support
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//
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VOID
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NTAPI
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HalpCheckPowerButton(
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VOID
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);
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CODE_SEG("INIT")
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VOID
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NTAPI
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HalpRegisterKdSupportFunctions(
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VOID
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);
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CODE_SEG("INIT")
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NTSTATUS
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NTAPI
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HalpSetupPciDeviceForDebugging(
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IN PVOID LoaderBlock,
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IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice
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);
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CODE_SEG("INIT")
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NTSTATUS
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NTAPI
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HalpReleasePciDeviceForDebugging(
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IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice
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);
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//
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// Memory routines
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//
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ULONG64
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NTAPI
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HalpAllocPhysicalMemory(
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IN PLOADER_PARAMETER_BLOCK LoaderBlock,
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IN ULONG64 MaxAddress,
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IN PFN_NUMBER PageCount,
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IN BOOLEAN Aligned
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);
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PVOID
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NTAPI
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HalpMapPhysicalMemory64Vista(
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IN PHYSICAL_ADDRESS PhysicalAddress,
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IN PFN_COUNT PageCount,
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IN BOOLEAN FlushCurrentTLB
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);
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VOID
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NTAPI
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HalpUnmapVirtualAddressVista(
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IN PVOID VirtualAddress,
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IN PFN_COUNT NumberPages,
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IN BOOLEAN FlushCurrentTLB
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);
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PVOID
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NTAPI
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HalpMapPhysicalMemory64(
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IN PHYSICAL_ADDRESS PhysicalAddress,
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IN PFN_COUNT PageCount
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);
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VOID
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NTAPI
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HalpUnmapVirtualAddress(
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IN PVOID VirtualAddress,
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IN PFN_COUNT NumberPages
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);
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/* sysinfo.c */
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NTSTATUS
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NTAPI
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HaliHandlePCIConfigSpaceAccess(
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_In_ BOOLEAN IsRead,
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_In_ ULONG Port,
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_In_ ULONG Length,
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_Inout_ PULONG Buffer
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);
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NTSTATUS
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NTAPI
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HaliQuerySystemInformation(
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IN HAL_QUERY_INFORMATION_CLASS InformationClass,
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IN ULONG BufferSize,
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IN OUT PVOID Buffer,
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OUT PULONG ReturnedLength
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);
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NTSTATUS
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NTAPI
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HaliSetSystemInformation(
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IN HAL_SET_INFORMATION_CLASS InformationClass,
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IN ULONG BufferSize,
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IN OUT PVOID Buffer
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);
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//
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// BIOS Routines
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//
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BOOLEAN
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NTAPI
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HalpBiosDisplayReset(
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VOID
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);
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VOID
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FASTCALL
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HalpExitToV86(
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PKTRAP_FRAME TrapFrame
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);
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VOID
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__cdecl
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HalpRealModeStart(
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VOID
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);
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//
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// Processor Halt Routine
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//
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VOID
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NTAPI
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HaliHaltSystem(
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VOID
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);
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//
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// CMOS Routines
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//
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CODE_SEG("INIT")
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VOID
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NTAPI
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HalpInitializeCmos(
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VOID
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);
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_Requires_lock_held_(HalpSystemHardwareLock)
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UCHAR
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NTAPI
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HalpReadCmos(
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IN UCHAR Reg
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);
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_Requires_lock_held_(HalpSystemHardwareLock)
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VOID
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NTAPI
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HalpWriteCmos(
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IN UCHAR Reg,
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IN UCHAR Value
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);
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//
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// Spinlock for protecting CMOS access
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//
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_Acquires_lock_(HalpSystemHardwareLock)
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VOID
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NTAPI
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HalpAcquireCmosSpinLock(
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VOID
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);
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_Releases_lock_(HalpSystemHardwareLock)
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VOID
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NTAPI
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HalpReleaseCmosSpinLock(
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VOID
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);
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VOID
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NTAPI
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HalpInitializeLegacyPICs(
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VOID
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);
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NTSTATUS
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NTAPI
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HalpOpenRegistryKey(
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IN PHANDLE KeyHandle,
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IN HANDLE RootKey,
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IN PUNICODE_STRING KeyName,
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IN ACCESS_MASK DesiredAccess,
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IN BOOLEAN Create
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);
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CODE_SEG("INIT")
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VOID
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NTAPI
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HalpGetNMICrashFlag(
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VOID
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);
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CODE_SEG("INIT")
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BOOLEAN
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NTAPI
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HalpGetDebugPortTable(
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VOID
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);
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CODE_SEG("INIT")
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VOID
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NTAPI
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HalpReportSerialNumber(
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VOID
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);
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CODE_SEG("INIT")
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NTSTATUS
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NTAPI
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HalpMarkAcpiHal(
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VOID
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);
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CODE_SEG("INIT")
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VOID
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NTAPI
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HalpBuildAddressMap(
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VOID
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);
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CODE_SEG("INIT")
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VOID
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NTAPI
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HalpReportResourceUsage(
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IN PUNICODE_STRING HalName,
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IN INTERFACE_TYPE InterfaceType
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);
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CODE_SEG("INIT")
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ULONG
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NTAPI
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HalpIs16BitPortDecodeSupported(
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VOID
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);
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NTSTATUS
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NTAPI
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HalpQueryAcpiResourceRequirements(
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OUT PIO_RESOURCE_REQUIREMENTS_LIST *Requirements
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);
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VOID
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FASTCALL
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KeUpdateSystemTime(
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IN PKTRAP_FRAME TrapFrame,
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IN ULONG Increment,
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IN KIRQL OldIrql
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);
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CODE_SEG("INIT")
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VOID
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NTAPI
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HalpInitBusHandlers(
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VOID
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);
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NTSTATUS
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NTAPI
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HaliInitPnpDriver(
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VOID
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);
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CODE_SEG("INIT")
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VOID
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NTAPI
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HalpDebugPciDumpBus(
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IN PBUS_HANDLER BusHandler,
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IN PCI_SLOT_NUMBER PciSlot,
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IN ULONG i,
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IN ULONG j,
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IN ULONG k,
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IN PPCI_COMMON_CONFIG PciData
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);
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VOID
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NTAPI
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HalpInitProcessor(
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IN ULONG ProcessorNumber,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock
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);
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#if defined(SARCH_PC98)
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BOOLEAN
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NTAPI
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HalpDismissIrq08(
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_In_ KIRQL Irql,
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_In_ ULONG Irq,
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_Out_ PKIRQL OldIrql
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);
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BOOLEAN
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NTAPI
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HalpDismissIrq08Level(
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_In_ KIRQL Irql,
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_In_ ULONG Irq,
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_Out_ PKIRQL OldIrql
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);
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VOID
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NTAPI
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HalpInitializeClockPc98(VOID);
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extern ULONG PIT_FREQUENCY;
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#endif /* SARCH_PC98 */
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#ifdef _M_AMD64
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VOID
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NTAPI
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HalInitializeBios(
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_In_ ULONG Phase,
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_In_ PLOADER_PARAMETER_BLOCK LoaderBlock
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);
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#define KfLowerIrql KeLowerIrql
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#define KiEnterInterruptTrap(TrapFrame) /* We do all neccessary in asm code */
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#define KiEoiHelper(TrapFrame) return /* Just return to the caller */
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#define HalBeginSystemInterrupt(Irql, Vector, OldIrql) ((*(OldIrql) = PASSIVE_LEVEL), TRUE)
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#endif // _M_AMD64
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extern BOOLEAN HalpNMIInProgress;
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extern ADDRESS_USAGE HalpDefaultIoSpace;
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extern KSPIN_LOCK HalpSystemHardwareLock;
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extern PADDRESS_USAGE HalpAddressUsageList;
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extern LARGE_INTEGER HalpPerfCounter;
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extern KAFFINITY HalpActiveProcessors;
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extern BOOLEAN HalDisableFirmwareMapper;
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extern PWCHAR HalHardwareIdString;
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extern PWCHAR HalName;
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extern KAFFINITY HalpDefaultInterruptAffinity;
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extern IDTUsageFlags HalpIDTUsageFlags[MAXIMUM_IDTVECTOR+1];
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extern const USHORT HalpBuildType;
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