[NTOS] Inline writing to PTEs through MI_WRITE_VALID/INVALID_PTE.

svn path=/trunk/; revision=47633

reactos/ntoskrnl/mm/ARM3/hypermap.c

@@ -82,9 +82,7 @@ MiMapPageInHyperSpace(IN PEPROCESS Process,
     // Write the current PTE
     //
     PointerPte += Offset;
-    ASSERT(PointerPte->u.Hard.Valid == 0);
+    MI_WRITE_VALID_PTE(PointerPte, TempPte);
-    ASSERT(TempPte.u.Hard.Valid == 1);
-    *PointerPte = TempPte;
 
     //
     // Return the address
@@ -176,9 +174,7 @@ MiMapPagesToZeroInHyperSpace(IN PMMPFN *Pages,
         // Set the correct PTE to write to, and set its new value
         //
         PointerPte--;
-        ASSERT(PointerPte->u.Hard.Valid == 0);
+        MI_WRITE_VALID_PTE(PointerPte, TempPte);
-        ASSERT(TempPte.u.Hard.Valid == 1);
-        *PointerPte = TempPte;
     } while (--NumberOfPages);
     
     //

reactos/ntoskrnl/mm/ARM3/i386/init.c

@@ -410,17 +410,11 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
     EndPde = MiAddressToPde((PVOID)((ULONG_PTR)MmNonPagedPoolEnd - 1));
     while (StartPde <= EndPde)
     {
-        //
-        // Sanity check
-        //
-        ASSERT(StartPde->u.Hard.Valid == 0);
-        
         //
         // Get a page
         //
         TempPde.u.Hard.PageFrameNumber = MxGetNextPage(1);
-        ASSERT(TempPde.u.Hard.Valid == 1);
+        MI_WRITE_VALID_PTE(StartPde, TempPde);
-        *StartPde = TempPde;
         
         //
         // Zero out the page table
@@ -442,17 +436,11 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
                                     MmSizeOfNonPagedPoolInBytes - 1));
     while (StartPde <= EndPde)
     {
-        //
-        // Sanity check
-        //
-        ASSERT(StartPde->u.Hard.Valid == 0);
-        
         //
         // Get a page
         //
         TempPde.u.Hard.PageFrameNumber = MxGetNextPage(1);
-        ASSERT(TempPde.u.Hard.Valid == 1);
+        MI_WRITE_VALID_PTE(StartPde, TempPde);
-        *StartPde = TempPde;
 
         //
         // Zero out the page table
@@ -483,9 +471,7 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
         // Use one of our contigous pages
         //
         TempPte.u.Hard.PageFrameNumber = PageFrameIndex++;
-        ASSERT(PointerPte->u.Hard.Valid == 0);
+        MI_WRITE_VALID_PTE(PointerPte++, TempPte);
-        ASSERT(TempPte.u.Hard.Valid == 1);
-        *PointerPte++ = TempPte;
     }
     
     //
@@ -548,9 +534,7 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
     PageFrameIndex = MiRemoveAnyPage(0);
     TempPde.u.Hard.PageFrameNumber = PageFrameIndex;
     TempPde.u.Hard.Global = FALSE; // Hyperspace is local!
-    ASSERT(StartPde->u.Hard.Valid == 0);
+    MI_WRITE_VALID_PTE(StartPde, TempPde);
-    ASSERT(TempPde.u.Hard.Valid == 1);
-    *StartPde = TempPde;
     
     /* Flush the TLB */
     KeFlushCurrentTb();

reactos/ntoskrnl/mm/ARM3/iosup.c

@@ -171,16 +171,11 @@ MmMapIoSpace(IN PHYSICAL_ADDRESS PhysicalAddress,
     //
     do
     {
-        //
-        // Start out with nothing
-        //
-        ASSERT(PointerPte->u.Hard.Valid == 0);
-        
         //
         // Write the PFN
         //
         TempPte.u.Hard.PageFrameNumber = Pfn++;
-        *PointerPte++ = TempPte;
+        MI_WRITE_VALID_PTE(PointerPte++, TempPte);
     } while (--PageCount);
     
     //

reactos/ntoskrnl/mm/ARM3/mdlsup.c

@@ -416,9 +416,8 @@ MmMapLockedPagesSpecifyCache(IN PMDL Mdl,
             //
             // Write the PTE
             //
-            ASSERT(PointerPte->u.Hard.Valid == 0);
             TempPte.u.Hard.PageFrameNumber = *MdlPages;
-            *PointerPte++ = TempPte;
+            MI_WRITE_VALID_PTE(PointerPte++, TempPte);
         } while (++MdlPages < LastPage);
         
         //

reactos/ntoskrnl/mm/ARM3/miarm.h

@@ -499,6 +499,33 @@ MI_IS_PHYSICAL_ADDRESS(IN PVOID Address)
     return ((PointerPde->u.Hard.LargePage) && (PointerPde->u.Hard.Valid));
 }
 
+//
+// Writes a valid PTE
+//
+VOID
+FORCEINLINE
+MI_WRITE_VALID_PTE(IN PMMPTE PointerPte,
+                   IN MMPTE TempPte)
+{
+    /* Write the valid PTE */
+    ASSERT(PointerPte->u.Hard.Valid == 0);
+    ASSERT(TempPte.u.Hard.Valid == 1);
+    *PointerPte = TempPte;
+}
+
+//
+// Writes an invalid PTE
+//
+VOID
+FORCEINLINE
+MI_WRITE_INVALID_PTE(IN PMMPTE PointerPte,
+                     IN MMPTE InvalidPte)
+{
+    /* Write the invalid PTE */
+    ASSERT(InvalidPte.u.Hard.Valid == 0);
+    *PointerPte = InvalidPte;
+}
+
 NTSTATUS
 NTAPI
 MmArmInitSystem(

reactos/ntoskrnl/mm/ARM3/mminit.c

@@ -453,8 +453,7 @@ MiInitializeColorTables(VOID)
         {
             /* Get a page and map it */
             TempPte.u.Hard.PageFrameNumber = MxGetNextPage(1);
-            ASSERT(TempPte.u.Hard.Valid == 1);
+            MI_WRITE_VALID_PTE(PointerPte, TempPte);
-            *PointerPte = TempPte;
 
             /* Zero out the page */
             RtlZeroMemory(MiPteToAddress(PointerPte), PAGE_SIZE);
@@ -614,9 +613,7 @@ MiMapPfnDatabase(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
                 
                 /* Write out this PTE */
                 PagesLeft++;
-                ASSERT(PointerPte->u.Hard.Valid == 0);
+                MI_WRITE_VALID_PTE(PointerPte, TempPte);
-                ASSERT(TempPte.u.Hard.Valid == 1);
-                *PointerPte = TempPte;
                 
                 /* Zero this page */
                 RtlZeroMemory(MiPteToAddress(PointerPte), PAGE_SIZE);
@@ -1482,9 +1479,7 @@ MiBuildPagedPool(VOID)
     TempPte = ValidKernelPte;
     ASSERT(PD_COUNT == 1);
     TempPte.u.Hard.PageFrameNumber = MmSystemPageDirectory[0];
-    ASSERT(PointerPte->u.Hard.Valid == 0);
+    MI_WRITE_VALID_PTE(PointerPte, TempPte);
-    ASSERT(TempPte.u.Hard.Valid == 1);
-    *PointerPte = TempPte;
 
     //
     // Let's get back to paged pool work: size it up.
@@ -1555,9 +1550,7 @@ MiBuildPagedPool(VOID)
     /* Allocate a page and map the first paged pool PDE */
     PageFrameIndex = MiRemoveZeroPage(0);
     TempPte.u.Hard.PageFrameNumber = PageFrameIndex;
-    ASSERT(PointerPde->u.Hard.Valid == 0);
+    MI_WRITE_VALID_PTE(PointerPde, TempPte);
-    ASSERT(TempPte.u.Hard.Valid == 1);
-    *PointerPde = TempPte;
 
     /* Initialize the PFN entry for it */
     MiInitializePfnForOtherProcess(PageFrameIndex,

reactos/ntoskrnl/mm/ARM3/ncache.c

@@ -154,9 +154,7 @@ MmAllocateNonCachedMemory(IN ULONG NumberOfBytes)
         // Set the PFN in the page and write it
         //
         TempPte.u.Hard.PageFrameNumber = PageFrameIndex;
-        ASSERT(PointerPte->u.Hard.Valid == 0);
+        MI_WRITE_VALID_PTE(PointerPte++, TempPte);
-        ASSERT(TempPte.u.Hard.Valid == 1);
-        *PointerPte++ = TempPte;
     } while (--PageCount);
     
     //

reactos/ntoskrnl/mm/ARM3/pagfault.c

@@ -127,10 +127,7 @@ MiResolveDemandZeroFault(IN PVOID Address,
     
     /* Build the PTE */
     MI_MAKE_HARDWARE_PTE(&TempPte, PointerPte, PointerPte->u.Soft.Protection, PageFrameNumber);
-    ASSERT(TempPte.u.Hard.Valid == 1);
+    MI_WRITE_VALID_PTE(PointerPte, TempPte);
-    ASSERT(PointerPte->u.Hard.Valid == 0);
-    *PointerPte = TempPte;
-    ASSERT(PointerPte->u.Hard.Valid == 1);
 
     //
     // It's all good now

reactos/ntoskrnl/mm/ARM3/pfnlist.c

@@ -748,6 +748,9 @@ MiAllocatePfn(IN PMMPTE PointerPte,
     PFN_NUMBER PageFrameIndex;
     MMPTE TempPte;
 
+    /* Sanity check that we aren't passed a valid PTE */
+    ASSERT(PointerPte->u.Hard.Valid == 0);
+    
     /* Make an empty software PTE */
     MI_MAKE_SOFTWARE_PTE(&TempPte, MM_READWRITE);
     
@@ -767,8 +770,7 @@ MiAllocatePfn(IN PMMPTE PointerPte,
     PageFrameIndex = MiRemoveAnyPage(0);
 
     /* Write the software PTE */
-    ASSERT(PointerPte->u.Hard.Valid == 0);
+    MI_WRITE_INVALID_PTE(PointerPte, TempPte);
-    *PointerPte = TempPte;
     PointerPte->u.Soft.Protection |= Protection;
     
     /* Initialize its PFN entry */

reactos/ntoskrnl/mm/ARM3/pool.c

@@ -344,8 +344,7 @@ MiAllocatePoolPages(IN POOL_TYPE PoolType,
                                                MmSystemPageDirectory[(PointerPte - (PMMPTE)PDE_BASE) / PDE_COUNT]);
                              
                 /* Write the actual PTE now */
-                ASSERT(TempPte.u.Hard.Valid == 1);
+                MI_WRITE_VALID_PTE(PointerPte++, TempPte);
-                *PointerPte++ = TempPte;
                 
                 //
                 // Move on to the next expansion address
@@ -604,9 +603,7 @@ MiAllocatePoolPages(IN POOL_TYPE PoolType,
         
         /* Write the PTE for it */
         TempPte.u.Hard.PageFrameNumber = PageFrameNumber;
-        ASSERT(PointerPte->u.Hard.Valid == 0);
+        MI_WRITE_VALID_PTE(PointerPte++, TempPte);
-        ASSERT(TempPte.u.Hard.Valid == 1);
-        *PointerPte++ = TempPte;
     } while (--SizeInPages > 0);
     
     //

reactos/ntoskrnl/mm/ARM3/procsup.c

@@ -175,17 +175,14 @@ MmCreateKernelStack(IN BOOLEAN GuiStack,
         
         /* Get a page and write the current invalid PTE */
         PageFrameIndex = MiRemoveAnyPage(0);
-        ASSERT(InvalidPte.u.Hard.Valid == 0);
+        MI_WRITE_INVALID_PTE(PointerPte, InvalidPte);
-        *PointerPte = InvalidPte;
 
         /* Initialize the PFN entry for this page */
         MiInitializePfn(PageFrameIndex, PointerPte, 1);
         
         /* Write the valid PTE */
         TempPte.u.Hard.PageFrameNumber = PageFrameIndex;
-        ASSERT(PointerPte->u.Hard.Valid == 0);
+        MI_WRITE_VALID_PTE(PointerPte, TempPte);
-        ASSERT(TempPte.u.Hard.Valid == 1);
-        *PointerPte = TempPte;
     }
 
     // Bug #4835
@@ -267,8 +264,7 @@ MmGrowKernelStackEx(IN PVOID StackPointer,
     {
         /* Get a page and write the current invalid PTE */
         PageFrameIndex = MiRemoveAnyPage(0);
-        ASSERT(InvalidPte.u.Hard.Valid == 0);
+        MI_WRITE_INVALID_PTE(LimitPte, InvalidPte);
-        *LimitPte = InvalidPte;
 
         /* Initialize the PFN entry for this page */
         MiInitializePfn(PageFrameIndex, LimitPte, 1);
@@ -277,9 +273,7 @@ MmGrowKernelStackEx(IN PVOID StackPointer,
         MI_MAKE_HARDWARE_PTE(&TempPte, LimitPte, MM_READWRITE, PageFrameIndex);
         
         /* Write the valid PTE */
-        ASSERT(LimitPte->u.Hard.Valid == 0);
+        MI_WRITE_VALID_PTE(LimitPte--, TempPte);
-        ASSERT(TempPte.u.Hard.Valid == 1);
-        *LimitPte-- = TempPte;
     }
     
     //

reactos/ntoskrnl/mm/ARM3/sysldr.c

@@ -175,9 +175,7 @@ MiLoadImageSection(IN OUT PVOID *SectionPtr,
         TempPte.u.Hard.PageFrameNumber = MiAllocatePfn(PointerPte, MM_EXECUTE);
 
         /* Write it */
-        ASSERT(PointerPte->u.Hard.Valid == 0);
+        MI_WRITE_VALID_PTE(PointerPte, TempPte);
-        ASSERT(TempPte.u.Hard.Valid == 1);
-        *PointerPte = TempPte;
 
         /* Move on */
         PointerPte++;
@@ -1456,9 +1454,7 @@ MiReloadBootLoadedDrivers(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
             TempPte.u.Hard.PageFrameNumber = OldPte.u.Hard.PageFrameNumber;
 
             /* Write it */
-            ASSERT(PointerPte->u.Hard.Valid == 0);
+            MI_WRITE_VALID_PTE(PointerPte, TempPte);
-            ASSERT(TempPte.u.Hard.Valid == 1);
-            *PointerPte = TempPte;
 
             /* Move on */
             PointerPte++;