diff --git a/reactos/ntoskrnl/mm/ARM3/hypermap.c b/reactos/ntoskrnl/mm/ARM3/hypermap.c index 80f371620a0..fca9e03929b 100644 --- a/reactos/ntoskrnl/mm/ARM3/hypermap.c +++ b/reactos/ntoskrnl/mm/ARM3/hypermap.c @@ -82,9 +82,7 @@ MiMapPageInHyperSpace(IN PEPROCESS Process, // Write the current PTE // PointerPte += Offset; - ASSERT(PointerPte->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte = TempPte; + MI_WRITE_VALID_PTE(PointerPte, TempPte); // // Return the address @@ -176,9 +174,7 @@ MiMapPagesToZeroInHyperSpace(IN PMMPFN *Pages, // Set the correct PTE to write to, and set its new value // PointerPte--; - ASSERT(PointerPte->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte = TempPte; + MI_WRITE_VALID_PTE(PointerPte, TempPte); } while (--NumberOfPages); // diff --git a/reactos/ntoskrnl/mm/ARM3/i386/init.c b/reactos/ntoskrnl/mm/ARM3/i386/init.c index ed15b402192..7b7f6c4e7db 100644 --- a/reactos/ntoskrnl/mm/ARM3/i386/init.c +++ b/reactos/ntoskrnl/mm/ARM3/i386/init.c @@ -410,17 +410,11 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock) EndPde = MiAddressToPde((PVOID)((ULONG_PTR)MmNonPagedPoolEnd - 1)); while (StartPde <= EndPde) { - // - // Sanity check - // - ASSERT(StartPde->u.Hard.Valid == 0); - // // Get a page // TempPde.u.Hard.PageFrameNumber = MxGetNextPage(1); - ASSERT(TempPde.u.Hard.Valid == 1); - *StartPde = TempPde; + MI_WRITE_VALID_PTE(StartPde, TempPde); // // Zero out the page table @@ -442,18 +436,12 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock) MmSizeOfNonPagedPoolInBytes - 1)); while (StartPde <= EndPde) { - // - // Sanity check - // - ASSERT(StartPde->u.Hard.Valid == 0); - // // Get a page // TempPde.u.Hard.PageFrameNumber = MxGetNextPage(1); - ASSERT(TempPde.u.Hard.Valid == 1); - *StartPde = TempPde; - + MI_WRITE_VALID_PTE(StartPde, TempPde); + // // Zero out the page table // @@ -483,9 +471,7 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock) // Use one of our contigous pages // TempPte.u.Hard.PageFrameNumber = PageFrameIndex++; - ASSERT(PointerPte->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte++ = TempPte; + MI_WRITE_VALID_PTE(PointerPte++, TempPte); } // @@ -548,9 +534,7 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock) PageFrameIndex = MiRemoveAnyPage(0); TempPde.u.Hard.PageFrameNumber = PageFrameIndex; TempPde.u.Hard.Global = FALSE; // Hyperspace is local! - ASSERT(StartPde->u.Hard.Valid == 0); - ASSERT(TempPde.u.Hard.Valid == 1); - *StartPde = TempPde; + MI_WRITE_VALID_PTE(StartPde, TempPde); /* Flush the TLB */ KeFlushCurrentTb(); diff --git a/reactos/ntoskrnl/mm/ARM3/iosup.c b/reactos/ntoskrnl/mm/ARM3/iosup.c index 5d8cb2e12da..d02d7d41847 100644 --- a/reactos/ntoskrnl/mm/ARM3/iosup.c +++ b/reactos/ntoskrnl/mm/ARM3/iosup.c @@ -171,16 +171,11 @@ MmMapIoSpace(IN PHYSICAL_ADDRESS PhysicalAddress, // do { - // - // Start out with nothing - // - ASSERT(PointerPte->u.Hard.Valid == 0); - // // Write the PFN // TempPte.u.Hard.PageFrameNumber = Pfn++; - *PointerPte++ = TempPte; + MI_WRITE_VALID_PTE(PointerPte++, TempPte); } while (--PageCount); // diff --git a/reactos/ntoskrnl/mm/ARM3/mdlsup.c b/reactos/ntoskrnl/mm/ARM3/mdlsup.c index 078de3de1c8..7488e52544c 100644 --- a/reactos/ntoskrnl/mm/ARM3/mdlsup.c +++ b/reactos/ntoskrnl/mm/ARM3/mdlsup.c @@ -416,9 +416,8 @@ MmMapLockedPagesSpecifyCache(IN PMDL Mdl, // // Write the PTE // - ASSERT(PointerPte->u.Hard.Valid == 0); TempPte.u.Hard.PageFrameNumber = *MdlPages; - *PointerPte++ = TempPte; + MI_WRITE_VALID_PTE(PointerPte++, TempPte); } while (++MdlPages < LastPage); // diff --git a/reactos/ntoskrnl/mm/ARM3/miarm.h b/reactos/ntoskrnl/mm/ARM3/miarm.h index 759bdabcfc0..2c6e9da01ba 100644 --- a/reactos/ntoskrnl/mm/ARM3/miarm.h +++ b/reactos/ntoskrnl/mm/ARM3/miarm.h @@ -499,6 +499,33 @@ MI_IS_PHYSICAL_ADDRESS(IN PVOID Address) return ((PointerPde->u.Hard.LargePage) && (PointerPde->u.Hard.Valid)); } +// +// Writes a valid PTE +// +VOID +FORCEINLINE +MI_WRITE_VALID_PTE(IN PMMPTE PointerPte, + IN MMPTE TempPte) +{ + /* Write the valid PTE */ + ASSERT(PointerPte->u.Hard.Valid == 0); + ASSERT(TempPte.u.Hard.Valid == 1); + *PointerPte = TempPte; +} + +// +// Writes an invalid PTE +// +VOID +FORCEINLINE +MI_WRITE_INVALID_PTE(IN PMMPTE PointerPte, + IN MMPTE InvalidPte) +{ + /* Write the invalid PTE */ + ASSERT(InvalidPte.u.Hard.Valid == 0); + *PointerPte = InvalidPte; +} + NTSTATUS NTAPI MmArmInitSystem( diff --git a/reactos/ntoskrnl/mm/ARM3/mminit.c b/reactos/ntoskrnl/mm/ARM3/mminit.c index c79b31d4e07..1e79a23c6cf 100644 --- a/reactos/ntoskrnl/mm/ARM3/mminit.c +++ b/reactos/ntoskrnl/mm/ARM3/mminit.c @@ -453,9 +453,8 @@ MiInitializeColorTables(VOID) { /* Get a page and map it */ TempPte.u.Hard.PageFrameNumber = MxGetNextPage(1); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte = TempPte; - + MI_WRITE_VALID_PTE(PointerPte, TempPte); + /* Zero out the page */ RtlZeroMemory(MiPteToAddress(PointerPte), PAGE_SIZE); } @@ -614,9 +613,7 @@ MiMapPfnDatabase(IN PLOADER_PARAMETER_BLOCK LoaderBlock) /* Write out this PTE */ PagesLeft++; - ASSERT(PointerPte->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte = TempPte; + MI_WRITE_VALID_PTE(PointerPte, TempPte); /* Zero this page */ RtlZeroMemory(MiPteToAddress(PointerPte), PAGE_SIZE); @@ -1482,9 +1479,7 @@ MiBuildPagedPool(VOID) TempPte = ValidKernelPte; ASSERT(PD_COUNT == 1); TempPte.u.Hard.PageFrameNumber = MmSystemPageDirectory[0]; - ASSERT(PointerPte->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte = TempPte; + MI_WRITE_VALID_PTE(PointerPte, TempPte); // // Let's get back to paged pool work: size it up. @@ -1555,9 +1550,7 @@ MiBuildPagedPool(VOID) /* Allocate a page and map the first paged pool PDE */ PageFrameIndex = MiRemoveZeroPage(0); TempPte.u.Hard.PageFrameNumber = PageFrameIndex; - ASSERT(PointerPde->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPde = TempPte; + MI_WRITE_VALID_PTE(PointerPde, TempPte); /* Initialize the PFN entry for it */ MiInitializePfnForOtherProcess(PageFrameIndex, diff --git a/reactos/ntoskrnl/mm/ARM3/ncache.c b/reactos/ntoskrnl/mm/ARM3/ncache.c index 659811dc57b..d49d72f3054 100644 --- a/reactos/ntoskrnl/mm/ARM3/ncache.c +++ b/reactos/ntoskrnl/mm/ARM3/ncache.c @@ -154,9 +154,7 @@ MmAllocateNonCachedMemory(IN ULONG NumberOfBytes) // Set the PFN in the page and write it // TempPte.u.Hard.PageFrameNumber = PageFrameIndex; - ASSERT(PointerPte->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte++ = TempPte; + MI_WRITE_VALID_PTE(PointerPte++, TempPte); } while (--PageCount); // diff --git a/reactos/ntoskrnl/mm/ARM3/pagfault.c b/reactos/ntoskrnl/mm/ARM3/pagfault.c index 073b091b7c6..05fdb2dcade 100644 --- a/reactos/ntoskrnl/mm/ARM3/pagfault.c +++ b/reactos/ntoskrnl/mm/ARM3/pagfault.c @@ -127,11 +127,8 @@ MiResolveDemandZeroFault(IN PVOID Address, /* Build the PTE */ MI_MAKE_HARDWARE_PTE(&TempPte, PointerPte, PointerPte->u.Soft.Protection, PageFrameNumber); - ASSERT(TempPte.u.Hard.Valid == 1); - ASSERT(PointerPte->u.Hard.Valid == 0); - *PointerPte = TempPte; - ASSERT(PointerPte->u.Hard.Valid == 1); - + MI_WRITE_VALID_PTE(PointerPte, TempPte); + // // It's all good now // diff --git a/reactos/ntoskrnl/mm/ARM3/pfnlist.c b/reactos/ntoskrnl/mm/ARM3/pfnlist.c index ab72198ed35..fb24d9fdbff 100644 --- a/reactos/ntoskrnl/mm/ARM3/pfnlist.c +++ b/reactos/ntoskrnl/mm/ARM3/pfnlist.c @@ -747,6 +747,9 @@ MiAllocatePfn(IN PMMPTE PointerPte, KIRQL OldIrql; PFN_NUMBER PageFrameIndex; MMPTE TempPte; + + /* Sanity check that we aren't passed a valid PTE */ + ASSERT(PointerPte->u.Hard.Valid == 0); /* Make an empty software PTE */ MI_MAKE_SOFTWARE_PTE(&TempPte, MM_READWRITE); @@ -767,8 +770,7 @@ MiAllocatePfn(IN PMMPTE PointerPte, PageFrameIndex = MiRemoveAnyPage(0); /* Write the software PTE */ - ASSERT(PointerPte->u.Hard.Valid == 0); - *PointerPte = TempPte; + MI_WRITE_INVALID_PTE(PointerPte, TempPte); PointerPte->u.Soft.Protection |= Protection; /* Initialize its PFN entry */ diff --git a/reactos/ntoskrnl/mm/ARM3/pool.c b/reactos/ntoskrnl/mm/ARM3/pool.c index 37cb2e59fcf..849db1c9a91 100644 --- a/reactos/ntoskrnl/mm/ARM3/pool.c +++ b/reactos/ntoskrnl/mm/ARM3/pool.c @@ -344,8 +344,7 @@ MiAllocatePoolPages(IN POOL_TYPE PoolType, MmSystemPageDirectory[(PointerPte - (PMMPTE)PDE_BASE) / PDE_COUNT]); /* Write the actual PTE now */ - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte++ = TempPte; + MI_WRITE_VALID_PTE(PointerPte++, TempPte); // // Move on to the next expansion address @@ -604,9 +603,7 @@ MiAllocatePoolPages(IN POOL_TYPE PoolType, /* Write the PTE for it */ TempPte.u.Hard.PageFrameNumber = PageFrameNumber; - ASSERT(PointerPte->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte++ = TempPte; + MI_WRITE_VALID_PTE(PointerPte++, TempPte); } while (--SizeInPages > 0); // diff --git a/reactos/ntoskrnl/mm/ARM3/procsup.c b/reactos/ntoskrnl/mm/ARM3/procsup.c index 551b685b09a..eb577050a7d 100644 --- a/reactos/ntoskrnl/mm/ARM3/procsup.c +++ b/reactos/ntoskrnl/mm/ARM3/procsup.c @@ -175,17 +175,14 @@ MmCreateKernelStack(IN BOOLEAN GuiStack, /* Get a page and write the current invalid PTE */ PageFrameIndex = MiRemoveAnyPage(0); - ASSERT(InvalidPte.u.Hard.Valid == 0); - *PointerPte = InvalidPte; - + MI_WRITE_INVALID_PTE(PointerPte, InvalidPte); + /* Initialize the PFN entry for this page */ MiInitializePfn(PageFrameIndex, PointerPte, 1); /* Write the valid PTE */ TempPte.u.Hard.PageFrameNumber = PageFrameIndex; - ASSERT(PointerPte->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte = TempPte; + MI_WRITE_VALID_PTE(PointerPte, TempPte); } // Bug #4835 @@ -267,9 +264,8 @@ MmGrowKernelStackEx(IN PVOID StackPointer, { /* Get a page and write the current invalid PTE */ PageFrameIndex = MiRemoveAnyPage(0); - ASSERT(InvalidPte.u.Hard.Valid == 0); - *LimitPte = InvalidPte; - + MI_WRITE_INVALID_PTE(LimitPte, InvalidPte); + /* Initialize the PFN entry for this page */ MiInitializePfn(PageFrameIndex, LimitPte, 1); @@ -277,9 +273,7 @@ MmGrowKernelStackEx(IN PVOID StackPointer, MI_MAKE_HARDWARE_PTE(&TempPte, LimitPte, MM_READWRITE, PageFrameIndex); /* Write the valid PTE */ - ASSERT(LimitPte->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *LimitPte-- = TempPte; + MI_WRITE_VALID_PTE(LimitPte--, TempPte); } // diff --git a/reactos/ntoskrnl/mm/ARM3/sysldr.c b/reactos/ntoskrnl/mm/ARM3/sysldr.c index ef1a8cf265f..d8f7157eb21 100644 --- a/reactos/ntoskrnl/mm/ARM3/sysldr.c +++ b/reactos/ntoskrnl/mm/ARM3/sysldr.c @@ -173,12 +173,10 @@ MiLoadImageSection(IN OUT PVOID *SectionPtr, { /* Allocate a page */ TempPte.u.Hard.PageFrameNumber = MiAllocatePfn(PointerPte, MM_EXECUTE); - + /* Write it */ - ASSERT(PointerPte->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte = TempPte; - + MI_WRITE_VALID_PTE(PointerPte, TempPte); + /* Move on */ PointerPte++; } @@ -1451,15 +1449,13 @@ MiReloadBootLoadedDrivers(IN PLOADER_PARAMETER_BLOCK LoaderBlock) /* Copy the old data */ OldPte = *StartPte; ASSERT(OldPte.u.Hard.Valid == 1); - + /* Set page number from the loader's memory */ TempPte.u.Hard.PageFrameNumber = OldPte.u.Hard.PageFrameNumber; - + /* Write it */ - ASSERT(PointerPte->u.Hard.Valid == 0); - ASSERT(TempPte.u.Hard.Valid == 1); - *PointerPte = TempPte; - + MI_WRITE_VALID_PTE(PointerPte, TempPte); + /* Move on */ PointerPte++; StartPte++;