- Add SecureZeroMemory/RtlSecureZeroMemory

- Add x86 versions of PreFetchCacheLine and MemoryBarrier (TODO for other architectures)

svn path=/trunk/; revision=35821
This commit is contained in:
Stefan Ginsberg 2008-08-30 22:54:27 +00:00
parent a68427fcce
commit 4b96ec60dd
2 changed files with 55 additions and 0 deletions

View file

@ -1208,6 +1208,7 @@ BOOL WINAPI CopyFileExW(LPCWSTR,LPCWSTR,LPPROGRESS_ROUTINE,LPVOID,LPBOOL,DWORD);
#define CopyMemory RtlCopyMemory
#define FillMemory RtlFillMemory
#define ZeroMemory RtlZeroMemory
#define SecureZeroMemory RtlSecureZeroMemory
BOOL WINAPI CopySid(DWORD,PSID,PSID);
#if (_WIN32_WINNT >= 0x0501)
HANDLE WINAPI CreateActCtxA(PCACTCTXA);

View file

@ -4453,6 +4453,23 @@ RtlCompareMemory (
#define RtlFillMemory(d,l,f) memset((d), (f), (l))
#define RtlZeroMemory(d,l) RtlFillMemory((d),(l),0)
FORCEINLINE
PVOID
RtlSecureZeroMemory(IN PVOID ptr,
IN SIZE_T cnt)
{
volatile char *vptr = (volatile char *)ptr;
while (cnt)
{
*vptr = 0;
vptr++;
cnt--;
}
return ptr;
}
typedef struct _OBJECT_TYPE_LIST {
WORD Level;
WORD Sbz;
@ -4656,6 +4673,43 @@ BitScanReverse(OUT ULONG *Index,
#endif
/* TODO: Other architectures than X86 */
#if defined(_M_IX86)
#define PF_TEMPORAL_LEVEL_1
#define PF_NON_TEMPORAL_LEVEL_ALL
#define PreFetchCacheLine(l, a)
#elif defined (_M_AMD64)
#define PreFetchCacheLine(l, a)
#elif defined(_M_PPC)
#define PreFetchCacheLine(l, a)
#elif defined(_M_ARM)
#define PreFetchCacheLine(l, a)
#else
#error Unknown architecture
#endif
/* TODO: Other architectures than X86 */
#if defined(_M_IX86)
FORCEINLINE
VOID
MemoryBarrier(VOID)
{
LONG Barrier;
__asm__ __volatile__
{
xchg Barrier, eax
}
}
#elif defined (_M_AMD64)
#define MemoryBarrier()
#elif defined(_M_PPC)
#define MemoryBarrier()
#elif defined(_M_ARM)
#define MemoryBarrier()
#else
#error Unknown architecture
#endif
#if defined(_M_IX86)
#define YieldProcessor() __asm__ __volatile__("pause");
#elif defined (_M_AMD64)