From 4b96ec60dd8f2e1a81cdc63dd5d09c9ba874f9a9 Mon Sep 17 00:00:00 2001
From: Stefan Ginsberg <stefanginsberg@gmail.com>
Date: Sat, 30 Aug 2008 22:54:27 +0000
Subject: [PATCH] - Add SecureZeroMemory/RtlSecureZeroMemory - Add x86 versions
 of PreFetchCacheLine and MemoryBarrier (TODO for other architectures)

svn path=/trunk/; revision=35821
---
 reactos/include/psdk/winbase.h |  1 +
 reactos/include/psdk/winnt.h   | 54 ++++++++++++++++++++++++++++++++++
 2 files changed, 55 insertions(+)

diff --git a/reactos/include/psdk/winbase.h b/reactos/include/psdk/winbase.h
index 28ece8ba31d..3b129ce1454 100644
--- a/reactos/include/psdk/winbase.h
+++ b/reactos/include/psdk/winbase.h
@@ -1208,6 +1208,7 @@ BOOL WINAPI CopyFileExW(LPCWSTR,LPCWSTR,LPPROGRESS_ROUTINE,LPVOID,LPBOOL,DWORD);
 #define CopyMemory RtlCopyMemory
 #define FillMemory RtlFillMemory
 #define ZeroMemory RtlZeroMemory
+#define SecureZeroMemory RtlSecureZeroMemory
 BOOL WINAPI CopySid(DWORD,PSID,PSID);
 #if (_WIN32_WINNT >= 0x0501)
 HANDLE WINAPI CreateActCtxA(PCACTCTXA);
diff --git a/reactos/include/psdk/winnt.h b/reactos/include/psdk/winnt.h
index 36c20e2925c..5b0a9f3fe9f 100644
--- a/reactos/include/psdk/winnt.h
+++ b/reactos/include/psdk/winnt.h
@@ -4453,6 +4453,23 @@ RtlCompareMemory (
 #define RtlFillMemory(d,l,f) memset((d), (f), (l))
 #define RtlZeroMemory(d,l) RtlFillMemory((d),(l),0)
 
+FORCEINLINE
+PVOID
+RtlSecureZeroMemory(IN PVOID ptr,
+                    IN SIZE_T cnt)
+{
+    volatile char *vptr = (volatile char *)ptr;
+
+    while (cnt)
+    {
+        *vptr = 0;
+        vptr++;
+        cnt--;
+    }
+
+    return ptr;
+}
+
 typedef struct _OBJECT_TYPE_LIST {
     WORD   Level;
     WORD   Sbz;
@@ -4656,6 +4673,43 @@ BitScanReverse(OUT ULONG *Index,
 
 #endif
 
+/* TODO: Other architectures than X86 */
+#if defined(_M_IX86)
+#define PF_TEMPORAL_LEVEL_1 
+#define PF_NON_TEMPORAL_LEVEL_ALL
+#define PreFetchCacheLine(l, a)
+#elif defined (_M_AMD64)
+#define PreFetchCacheLine(l, a)
+#elif defined(_M_PPC)
+#define PreFetchCacheLine(l, a)
+#elif defined(_M_ARM)
+#define PreFetchCacheLine(l, a)
+#else
+#error Unknown architecture
+#endif
+
+/* TODO: Other architectures than X86 */
+#if defined(_M_IX86)
+FORCEINLINE
+VOID
+MemoryBarrier(VOID)
+{
+    LONG Barrier;
+    __asm__ __volatile__
+    {
+        xchg Barrier, eax
+    }
+}
+#elif defined (_M_AMD64)
+#define MemoryBarrier()
+#elif defined(_M_PPC)
+#define MemoryBarrier()
+#elif defined(_M_ARM)
+#define MemoryBarrier()
+#else
+#error Unknown architecture
+#endif
+
 #if defined(_M_IX86)
 #define YieldProcessor() __asm__ __volatile__("pause");
 #elif defined (_M_AMD64)