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[NTOS:MM] Pass page fault code to MmAccessFault
Note: before we had a BOOLEAN parameter called StoreInstruction, but in reality it was not specifying whether the fault was from a store store instruction, but whether it was an access violation rather than a page-not-present fault. On x86 without PAE there are only 2 kinds of access violations: (1) Access of a kernel mode page from user mode, which is handled early and (2) access of a read-only (or COW) page with a writing instruction. Therefore we could get away with this, even though it relied on the wrong assumption that a fault, which was not a page-not-present-fault, was automatically a write access. This commit only changes one thing: we pass the full fault-code to MmAccessFault and handle the rest from there in exactly the same way as before. More changes are coming to make things clear.
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parent
fe50c655aa
commit
3021c2d571
8 changed files with 17 additions and 9 deletions
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@ -106,6 +106,9 @@
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#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1)
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#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1)
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#endif
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#endif
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/* Macros to identify the page fault reason from the error code */
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#define MI_IS_NOT_PRESENT_FAULT(FaultCode) !BooleanFlagOn(FaultCode, 0x1)
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/* On x64, these are the same */
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/* On x64, these are the same */
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#define MI_WRITE_VALID_PPE MI_WRITE_VALID_PTE
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#define MI_WRITE_VALID_PPE MI_WRITE_VALID_PTE
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#define ValidKernelPpe ValidKernelPde
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#define ValidKernelPpe ValidKernelPde
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@ -88,6 +88,9 @@
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#define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Owner = 1)
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#define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Owner = 1)
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#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.ReadOnly = 0)
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#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.ReadOnly = 0)
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/* Macros to identify the page fault reason from the error code */
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#define MI_IS_NOT_PRESENT_FAULT(FaultCode) TRUE
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/* Convert an address to a corresponding PTE */
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/* Convert an address to a corresponding PTE */
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#define MiAddressToPte(x) \
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#define MiAddressToPte(x) \
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((PMMPTE)(PTE_BASE + (((ULONG)(x) >> 12) << 2)))
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((PMMPTE)(PTE_BASE + (((ULONG)(x) >> 12) << 2)))
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@ -111,6 +111,10 @@
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#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1)
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#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1)
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#endif
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#endif
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/* Macros to identify the page fault reason from the error code */
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#define MI_IS_NOT_PRESENT_FAULT(FaultCode) !BooleanFlagOn(FaultCode, 0x1)
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/* On x86, these two are the same */
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/* On x86, these two are the same */
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#define MI_WRITE_VALID_PPE MI_WRITE_VALID_PTE
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#define MI_WRITE_VALID_PPE MI_WRITE_VALID_PTE
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@ -744,7 +744,7 @@ MmFreeSpecialPool(
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NTSTATUS
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NTSTATUS
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NTAPI
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NTAPI
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MmAccessFault(
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MmAccessFault(
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IN BOOLEAN StoreInstruction,
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IN ULONG FaultCode,
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IN PVOID Address,
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IN PVOID Address,
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IN KPROCESSOR_MODE Mode,
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IN KPROCESSOR_MODE Mode,
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IN PVOID TrapInformation
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IN PVOID TrapInformation
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@ -503,8 +503,7 @@ FUNC KiPageFault
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sti
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sti
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/* Call page fault handler */
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/* Call page fault handler */
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mov ecx, [rbp + KTRAP_FRAME_ErrorCode] // StoreInstruction
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mov ecx, [rbp + KTRAP_FRAME_ErrorCode] // FaultCode
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and ecx, 1
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// rdx == Address
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// rdx == Address
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mov r8b, [rbp + KTRAP_FRAME_SegCs] // Mode
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mov r8b, [rbp + KTRAP_FRAME_SegCs] // Mode
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and r8b, 1
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and r8b, 1
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@ -529,7 +529,7 @@ KiDataAbortHandler(IN PKTRAP_FRAME TrapFrame)
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//
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//
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if (KeArmFaultStatusRegisterGet() == 21 || KeArmFaultStatusRegisterGet() == 23)
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if (KeArmFaultStatusRegisterGet() == 21 || KeArmFaultStatusRegisterGet() == 23)
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{
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{
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Status = MmAccessFault(FALSE,
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Status = MmAccessFault(KeArmFaultStatusRegisterGet(),
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Address,
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Address,
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KiGetPreviousMode(TrapFrame),
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KiGetPreviousMode(TrapFrame),
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TrapFrame);
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TrapFrame);
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@ -1199,7 +1199,6 @@ FASTCALL
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KiTrap0EHandler(IN PKTRAP_FRAME TrapFrame)
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KiTrap0EHandler(IN PKTRAP_FRAME TrapFrame)
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{
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{
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PKTHREAD Thread;
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PKTHREAD Thread;
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BOOLEAN Present;
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BOOLEAN StoreInstruction;
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BOOLEAN StoreInstruction;
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ULONG_PTR Cr2;
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ULONG_PTR Cr2;
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NTSTATUS Status;
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NTSTATUS Status;
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@ -1227,7 +1226,6 @@ KiTrap0EHandler(IN PKTRAP_FRAME TrapFrame)
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_enable();
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_enable();
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/* Interpret the error code */
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/* Interpret the error code */
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Present = (TrapFrame->ErrCode & 1) != 0;
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StoreInstruction = (TrapFrame->ErrCode & 2) != 0;
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StoreInstruction = (TrapFrame->ErrCode & 2) != 0;
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/* Check if we came in with interrupts disabled */
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/* Check if we came in with interrupts disabled */
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@ -1237,7 +1235,7 @@ KiTrap0EHandler(IN PKTRAP_FRAME TrapFrame)
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KeBugCheckWithTf(IRQL_NOT_LESS_OR_EQUAL,
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KeBugCheckWithTf(IRQL_NOT_LESS_OR_EQUAL,
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Cr2,
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Cr2,
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(ULONG_PTR)-1,
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(ULONG_PTR)-1,
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StoreInstruction,
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TrapFrame->ErrCode,
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TrapFrame->Eip,
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TrapFrame->Eip,
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TrapFrame);
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TrapFrame);
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}
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}
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@ -1339,7 +1337,7 @@ KiTrap0EHandler(IN PKTRAP_FRAME TrapFrame)
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NotSListFault:
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NotSListFault:
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/* Call the access fault handler */
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/* Call the access fault handler */
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Status = MmAccessFault(Present,
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Status = MmAccessFault(TrapFrame->ErrCode,
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(PVOID)Cr2,
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(PVOID)Cr2,
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KiUserTrap(TrapFrame),
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KiUserTrap(TrapFrame),
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TrapFrame);
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TrapFrame);
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@ -201,12 +201,13 @@ extern BOOLEAN Mmi386MakeKernelPageTableGlobal(PVOID Address);
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NTSTATUS
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NTSTATUS
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NTAPI
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NTAPI
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MmAccessFault(IN BOOLEAN StoreInstruction,
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MmAccessFault(IN ULONG FaultCode,
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IN PVOID Address,
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IN PVOID Address,
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IN KPROCESSOR_MODE Mode,
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IN KPROCESSOR_MODE Mode,
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IN PVOID TrapInformation)
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IN PVOID TrapInformation)
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{
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{
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PMEMORY_AREA MemoryArea = NULL;
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PMEMORY_AREA MemoryArea = NULL;
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BOOLEAN StoreInstruction = !MI_IS_NOT_PRESENT_FAULT(FaultCode);
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/* Cute little hack for ROS */
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/* Cute little hack for ROS */
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if ((ULONG_PTR)Address >= (ULONG_PTR)MmSystemRangeStart)
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if ((ULONG_PTR)Address >= (ULONG_PTR)MmSystemRangeStart)
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