2013-08-16 19:21:02 +00:00
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/*
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2013-10-19 16:55:51 +00:00
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* Fast486 386/486 CPU Emulation Library
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* fast486.c
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2013-09-30 22:01:38 +00:00
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*
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* Copyright (C) 2013 Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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2013-08-16 19:21:02 +00:00
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*/
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/* INCLUDES *******************************************************************/
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2013-08-17 21:15:55 +00:00
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#include <windef.h>
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2013-09-17 23:02:22 +00:00
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// #define NDEBUG
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#include <debug.h>
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2013-10-19 16:55:51 +00:00
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#include <fast486.h>
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2013-08-17 15:20:47 +00:00
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#include "common.h"
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2013-08-22 22:54:59 +00:00
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#include "opcodes.h"
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2013-08-16 19:21:02 +00:00
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/* DEFINES ********************************************************************/
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typedef enum
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{
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2013-10-19 16:55:51 +00:00
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FAST486_STEP_INTO,
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FAST486_STEP_OVER,
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FAST486_STEP_OUT,
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FAST486_CONTINUE
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} FAST486_EXEC_CMD;
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2013-08-16 19:21:02 +00:00
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/* PRIVATE FUNCTIONS **********************************************************/
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static
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2013-08-17 15:20:47 +00:00
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inline
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2013-08-16 19:21:02 +00:00
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VOID
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NTAPI
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2013-10-19 16:55:51 +00:00
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Fast486ExecutionControl(PFAST486_STATE State, INT Command)
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2013-08-16 19:21:02 +00:00
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{
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2013-08-24 11:48:38 +00:00
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UCHAR Opcode;
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2013-08-22 22:54:59 +00:00
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INT ProcedureCallCount = 0;
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/* Main execution loop */
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do
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{
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2013-10-18 22:50:00 +00:00
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/* Check if this is a new instruction */
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if (State->PrefixFlags == 0)
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{
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State->SavedInstPtr = State->InstPtr;
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2013-10-27 00:37:01 +00:00
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/*
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* Check if there is an interrupt to execute, or a hardware interrupt signal
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* while interrupts are enabled.
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*/
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2013-11-10 00:53:05 +00:00
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if (State->IntStatus == FAST486_INT_EXECUTE)
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2013-10-18 22:50:00 +00:00
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{
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2013-10-19 16:55:51 +00:00
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FAST486_IDT_ENTRY IdtEntry;
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2013-10-18 22:50:00 +00:00
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/* Get the interrupt vector */
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2013-10-19 16:55:51 +00:00
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if (Fast486GetIntVector(State, State->PendingIntNum, &IdtEntry))
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2013-10-18 22:50:00 +00:00
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{
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/* Perform the interrupt */
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2013-10-19 16:55:51 +00:00
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Fast486InterruptInternal(State,
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2013-10-18 22:50:00 +00:00
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IdtEntry.Selector,
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MAKELONG(IdtEntry.Offset, IdtEntry.OffsetHigh),
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IdtEntry.Type);
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}
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2013-10-27 00:37:01 +00:00
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/* Clear the interrupt status */
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State->IntStatus = FAST486_INT_NONE;
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2013-10-18 22:50:00 +00:00
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}
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2013-11-10 00:53:05 +00:00
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else if (State->Flags.If
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&& (State->IntAckCallback != NULL)
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&& (State->IntStatus == FAST486_INT_SIGNAL))
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{
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/* Acknowledge the interrupt to get the number */
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State->PendingIntNum = State->IntAckCallback(State);
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/* Set the interrupt status to execute on the next instruction */
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State->IntStatus = FAST486_INT_EXECUTE;
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}
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2013-10-18 22:50:00 +00:00
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}
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2013-10-11 12:24:05 +00:00
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2013-08-22 22:54:59 +00:00
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/* Perform an instruction fetch */
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2013-10-19 16:55:51 +00:00
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if (!Fast486FetchByte(State, &Opcode)) continue;
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2013-08-22 22:54:59 +00:00
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// TODO: Check for CALL/RET to update ProcedureCallCount.
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2013-10-19 16:55:51 +00:00
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if (Fast486OpcodeHandlers[Opcode] != NULL)
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2013-08-22 22:54:59 +00:00
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{
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/* Call the opcode handler */
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2013-10-19 16:55:51 +00:00
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Fast486OpcodeHandlers[Opcode](State, Opcode);
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2013-08-22 22:54:59 +00:00
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}
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else
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{
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/* This is not a valid opcode */
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2013-10-19 16:55:51 +00:00
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Fast486Exception(State, FAST486_EXCEPTION_UD);
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2013-08-22 22:54:59 +00:00
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}
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2013-08-31 19:18:12 +00:00
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2013-10-19 16:55:51 +00:00
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if (Fast486OpcodeHandlers[Opcode] != Fast486OpcodePrefix)
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2013-08-31 19:18:12 +00:00
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{
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/* A non-prefix opcode has been executed, reset the prefix flags */
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State->PrefixFlags = 0;
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}
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2013-10-09 19:11:42 +00:00
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else
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{
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/* This is a prefix, go to the next instruction immediately */
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continue;
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}
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2013-08-22 22:54:59 +00:00
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}
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2013-10-19 16:55:51 +00:00
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while ((Command == FAST486_CONTINUE)
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|| (Command == FAST486_STEP_OVER && ProcedureCallCount > 0)
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|| (Command == FAST486_STEP_OUT && ProcedureCallCount >= 0)
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|| (Fast486OpcodeHandlers[Opcode] == Fast486OpcodePrefix));
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2013-08-16 19:21:02 +00:00
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}
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2013-11-01 01:46:58 +00:00
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/* DEFAULT CALLBACKS **********************************************************/
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2013-08-16 19:21:02 +00:00
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2013-11-01 01:46:58 +00:00
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static VOID
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2013-08-16 19:21:02 +00:00
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NTAPI
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2013-11-01 01:46:58 +00:00
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Fast486MemReadCallback(PFAST486_STATE State, ULONG Address, PVOID Buffer, ULONG Size)
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2013-08-16 19:21:02 +00:00
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{
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2013-11-01 01:46:58 +00:00
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UNREFERENCED_PARAMETER(State);
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RtlMoveMemory(Buffer, (PVOID)Address, Size);
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2013-08-16 19:21:02 +00:00
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}
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2013-11-01 01:46:58 +00:00
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static VOID
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2013-08-16 19:21:02 +00:00
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NTAPI
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2013-11-01 01:46:58 +00:00
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Fast486MemWriteCallback(PFAST486_STATE State, ULONG Address, PVOID Buffer, ULONG Size)
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2013-08-16 19:21:02 +00:00
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{
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2013-11-01 01:46:58 +00:00
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UNREFERENCED_PARAMETER(State);
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RtlMoveMemory((PVOID)Address, Buffer, Size);
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}
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static VOID
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NTAPI
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2013-11-09 15:00:19 +00:00
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Fast486IoReadCallback(PFAST486_STATE State, ULONG Port, PVOID Buffer, ULONG DataCount, UCHAR DataSize)
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2013-11-01 01:46:58 +00:00
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{
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UNREFERENCED_PARAMETER(State);
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UNREFERENCED_PARAMETER(Port);
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UNREFERENCED_PARAMETER(Buffer);
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2013-11-09 15:00:19 +00:00
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UNREFERENCED_PARAMETER(DataCount);
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UNREFERENCED_PARAMETER(DataSize);
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2013-11-01 01:46:58 +00:00
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}
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static VOID
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NTAPI
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2013-11-09 15:00:19 +00:00
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Fast486IoWriteCallback(PFAST486_STATE State, ULONG Port, PVOID Buffer, ULONG DataCount, UCHAR DataSize)
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2013-11-01 01:46:58 +00:00
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{
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UNREFERENCED_PARAMETER(State);
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UNREFERENCED_PARAMETER(Port);
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UNREFERENCED_PARAMETER(Buffer);
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2013-11-09 15:00:19 +00:00
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UNREFERENCED_PARAMETER(DataCount);
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UNREFERENCED_PARAMETER(DataSize);
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2013-11-01 01:46:58 +00:00
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}
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static VOID
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NTAPI
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Fast486IdleCallback(PFAST486_STATE State)
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{
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UNREFERENCED_PARAMETER(State);
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}
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static VOID
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NTAPI
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Fast486BopCallback(PFAST486_STATE State, UCHAR BopCode)
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{
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UNREFERENCED_PARAMETER(State);
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UNREFERENCED_PARAMETER(BopCode);
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}
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static UCHAR
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NTAPI
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Fast486IntAckCallback(PFAST486_STATE State)
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{
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UNREFERENCED_PARAMETER(State);
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/* Return something... */
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return 0;
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2013-08-16 19:21:02 +00:00
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}
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2013-11-01 01:46:58 +00:00
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/* PUBLIC FUNCTIONS ***********************************************************/
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2013-08-16 19:21:02 +00:00
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VOID
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NTAPI
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2013-11-01 01:46:58 +00:00
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Fast486Initialize(PFAST486_STATE State,
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FAST486_MEM_READ_PROC MemReadCallback,
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FAST486_MEM_WRITE_PROC MemWriteCallback,
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FAST486_IO_READ_PROC IoReadCallback,
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FAST486_IO_WRITE_PROC IoWriteCallback,
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FAST486_IDLE_PROC IdleCallback,
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FAST486_BOP_PROC BopCallback,
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2013-11-10 22:27:24 +00:00
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FAST486_INT_ACK_PROC IntAckCallback,
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PULONG Tlb)
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2013-08-16 19:21:02 +00:00
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{
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2013-11-01 01:46:58 +00:00
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/* Set the callbacks (or use default ones if some are NULL) */
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State->MemReadCallback = (MemReadCallback ? MemReadCallback : Fast486MemReadCallback );
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State->MemWriteCallback = (MemWriteCallback ? MemWriteCallback : Fast486MemWriteCallback);
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State->IoReadCallback = (IoReadCallback ? IoReadCallback : Fast486IoReadCallback );
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State->IoWriteCallback = (IoWriteCallback ? IoWriteCallback : Fast486IoWriteCallback );
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State->IdleCallback = (IdleCallback ? IdleCallback : Fast486IdleCallback );
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State->BopCallback = (BopCallback ? BopCallback : Fast486BopCallback );
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State->IntAckCallback = (IntAckCallback ? IntAckCallback : Fast486IntAckCallback );
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2013-11-10 22:27:24 +00:00
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/* Set the TLB (if given) */
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State->Tlb = Tlb;
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2013-11-01 01:46:58 +00:00
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/* Reset the CPU */
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Fast486Reset(State);
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2013-08-16 19:21:02 +00:00
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}
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VOID
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NTAPI
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2013-11-01 01:46:58 +00:00
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Fast486Reset(PFAST486_STATE State)
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2013-08-16 19:21:02 +00:00
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{
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2013-11-01 02:28:47 +00:00
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FAST486_SEG_REGS i;
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2013-11-01 01:46:58 +00:00
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FAST486_MEM_READ_PROC MemReadCallback = State->MemReadCallback;
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FAST486_MEM_WRITE_PROC MemWriteCallback = State->MemWriteCallback;
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FAST486_IO_READ_PROC IoReadCallback = State->IoReadCallback;
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FAST486_IO_WRITE_PROC IoWriteCallback = State->IoWriteCallback;
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FAST486_IDLE_PROC IdleCallback = State->IdleCallback;
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FAST486_BOP_PROC BopCallback = State->BopCallback;
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FAST486_INT_ACK_PROC IntAckCallback = State->IntAckCallback;
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2013-11-10 22:27:24 +00:00
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PULONG Tlb = State->Tlb;
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2013-11-01 01:46:58 +00:00
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/* Clear the entire structure */
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RtlZeroMemory(State, sizeof(*State));
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/* Initialize the registers */
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State->Flags.AlwaysSet = 1;
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State->InstPtr.LowWord = 0xFFF0;
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/* Initialize segments */
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for (i = 0; i < FAST486_NUM_SEG_REGS; i++)
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{
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State->SegmentRegs[i].Selector = 0;
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State->SegmentRegs[i].Base = 0;
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State->SegmentRegs[i].Limit = 0xFFFF;
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2013-11-02 00:47:43 +00:00
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State->SegmentRegs[i].Present = TRUE;
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State->SegmentRegs[i].ReadWrite = TRUE;
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State->SegmentRegs[i].Executable = FALSE;
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State->SegmentRegs[i].DirConf = FALSE;
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State->SegmentRegs[i].SystemType = 1; // Segment descriptor
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State->SegmentRegs[i].Dpl = 0;
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State->SegmentRegs[i].Size = FALSE; // 16-bit
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2013-11-01 01:46:58 +00:00
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}
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/* Initialize the code segment */
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2013-11-02 00:47:43 +00:00
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State->SegmentRegs[FAST486_REG_CS].Executable = TRUE;
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2013-11-01 01:46:58 +00:00
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State->SegmentRegs[FAST486_REG_CS].Selector = 0xF000;
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State->SegmentRegs[FAST486_REG_CS].Base = 0xFFFF0000;
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/* Initialize the IDT */
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State->Idtr.Size = 0x3FF;
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State->Idtr.Address = 0;
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/* Initialize CR0 */
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State->ControlRegisters[FAST486_REG_CR0] |= FAST486_CR0_ET;
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2013-11-10 22:27:24 +00:00
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/* Restore the callbacks and TLB */
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2013-11-01 01:46:58 +00:00
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State->MemReadCallback = MemReadCallback;
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State->MemWriteCallback = MemWriteCallback;
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State->IoReadCallback = IoReadCallback;
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State->IoWriteCallback = IoWriteCallback;
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State->IdleCallback = IdleCallback;
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State->BopCallback = BopCallback;
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State->IntAckCallback = IntAckCallback;
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2013-11-10 22:27:24 +00:00
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State->Tlb = Tlb;
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2013-08-16 19:21:02 +00:00
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}
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VOID
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NTAPI
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2013-10-19 16:55:51 +00:00
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Fast486DumpState(PFAST486_STATE State)
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2013-08-16 19:21:02 +00:00
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{
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2013-10-19 18:28:27 +00:00
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DPRINT1("\nCPU currently executing in %s mode at %04X:%08X\n",
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2013-10-19 16:55:51 +00:00
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(State->ControlRegisters[0] & FAST486_CR0_PE) ? "protected" : "real",
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State->SegmentRegs[FAST486_REG_CS].Selector,
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2013-10-19 18:28:27 +00:00
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State->InstPtr.Long);
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2013-08-17 01:41:22 +00:00
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DPRINT1("\nGeneral purpose registers:\n"
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"EAX = %08X\tECX = %08X\tEDX = %08X\tEBX = %08X\n"
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"ESP = %08X\tEBP = %08X\tESI = %08X\tEDI = %08X\n",
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2013-10-19 16:55:51 +00:00
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State->GeneralRegs[FAST486_REG_EAX].Long,
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State->GeneralRegs[FAST486_REG_ECX].Long,
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State->GeneralRegs[FAST486_REG_EDX].Long,
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State->GeneralRegs[FAST486_REG_EBX].Long,
|
|
|
|
State->GeneralRegs[FAST486_REG_ESP].Long,
|
|
|
|
State->GeneralRegs[FAST486_REG_EBP].Long,
|
|
|
|
State->GeneralRegs[FAST486_REG_ESI].Long,
|
|
|
|
State->GeneralRegs[FAST486_REG_EDI].Long);
|
2013-08-17 01:41:22 +00:00
|
|
|
DPRINT1("\nSegment registers:\n"
|
|
|
|
"ES = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
|
|
|
|
"CS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
|
|
|
|
"SS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
|
|
|
|
"DS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
|
|
|
|
"FS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
|
|
|
|
"GS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n",
|
2013-10-19 16:55:51 +00:00
|
|
|
State->SegmentRegs[FAST486_REG_ES].Selector,
|
|
|
|
State->SegmentRegs[FAST486_REG_ES].Base,
|
|
|
|
State->SegmentRegs[FAST486_REG_ES].Limit,
|
|
|
|
State->SegmentRegs[FAST486_REG_ES].Dpl,
|
|
|
|
State->SegmentRegs[FAST486_REG_CS].Selector,
|
|
|
|
State->SegmentRegs[FAST486_REG_CS].Base,
|
|
|
|
State->SegmentRegs[FAST486_REG_CS].Limit,
|
|
|
|
State->SegmentRegs[FAST486_REG_CS].Dpl,
|
|
|
|
State->SegmentRegs[FAST486_REG_SS].Selector,
|
|
|
|
State->SegmentRegs[FAST486_REG_SS].Base,
|
|
|
|
State->SegmentRegs[FAST486_REG_SS].Limit,
|
|
|
|
State->SegmentRegs[FAST486_REG_SS].Dpl,
|
|
|
|
State->SegmentRegs[FAST486_REG_DS].Selector,
|
|
|
|
State->SegmentRegs[FAST486_REG_DS].Base,
|
|
|
|
State->SegmentRegs[FAST486_REG_DS].Limit,
|
|
|
|
State->SegmentRegs[FAST486_REG_DS].Dpl,
|
|
|
|
State->SegmentRegs[FAST486_REG_FS].Selector,
|
|
|
|
State->SegmentRegs[FAST486_REG_FS].Base,
|
|
|
|
State->SegmentRegs[FAST486_REG_FS].Limit,
|
|
|
|
State->SegmentRegs[FAST486_REG_FS].Dpl,
|
|
|
|
State->SegmentRegs[FAST486_REG_GS].Selector,
|
|
|
|
State->SegmentRegs[FAST486_REG_GS].Base,
|
|
|
|
State->SegmentRegs[FAST486_REG_GS].Limit,
|
|
|
|
State->SegmentRegs[FAST486_REG_GS].Dpl);
|
2013-08-17 01:41:22 +00:00
|
|
|
DPRINT1("\nFlags: %08X (%s %s %s %s %s %s %s %s %s %s %s %s %s %s %s) Iopl: %u\n",
|
|
|
|
State->Flags.Long,
|
|
|
|
State->Flags.Cf ? "CF" : "cf",
|
|
|
|
State->Flags.Pf ? "PF" : "pf",
|
|
|
|
State->Flags.Af ? "AF" : "af",
|
|
|
|
State->Flags.Zf ? "ZF" : "zf",
|
|
|
|
State->Flags.Sf ? "SF" : "sf",
|
|
|
|
State->Flags.Tf ? "TF" : "tf",
|
|
|
|
State->Flags.If ? "IF" : "if",
|
|
|
|
State->Flags.Df ? "DF" : "df",
|
|
|
|
State->Flags.Of ? "OF" : "of",
|
|
|
|
State->Flags.Nt ? "NT" : "nt",
|
|
|
|
State->Flags.Rf ? "RF" : "rf",
|
|
|
|
State->Flags.Vm ? "VM" : "vm",
|
|
|
|
State->Flags.Ac ? "AC" : "ac",
|
|
|
|
State->Flags.Vif ? "VIF" : "vif",
|
|
|
|
State->Flags.Vip ? "VIP" : "vip",
|
|
|
|
State->Flags.Iopl);
|
|
|
|
DPRINT1("\nControl Registers:\n"
|
2013-10-26 00:56:11 +00:00
|
|
|
"CR0 = %08X\tCR2 = %08X\tCR3 = %08X\n",
|
2013-10-19 16:55:51 +00:00
|
|
|
State->ControlRegisters[FAST486_REG_CR0],
|
|
|
|
State->ControlRegisters[FAST486_REG_CR2],
|
2013-10-26 00:56:11 +00:00
|
|
|
State->ControlRegisters[FAST486_REG_CR3]);
|
2013-08-17 01:41:22 +00:00
|
|
|
DPRINT1("\nDebug Registers:\n"
|
2013-10-26 00:56:11 +00:00
|
|
|
"DR0 = %08X\tDR1 = %08X\tDR2 = %08X\n"
|
|
|
|
"DR3 = %08X\tDR4 = %08X\tDR5 = %08X\n",
|
2013-10-19 16:55:51 +00:00
|
|
|
State->DebugRegisters[FAST486_REG_DR0],
|
|
|
|
State->DebugRegisters[FAST486_REG_DR1],
|
|
|
|
State->DebugRegisters[FAST486_REG_DR2],
|
|
|
|
State->DebugRegisters[FAST486_REG_DR3],
|
|
|
|
State->DebugRegisters[FAST486_REG_DR4],
|
2013-10-26 00:56:11 +00:00
|
|
|
State->DebugRegisters[FAST486_REG_DR5]);
|
2013-08-16 19:21:02 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
VOID
|
|
|
|
NTAPI
|
2013-11-01 01:46:58 +00:00
|
|
|
Fast486Continue(PFAST486_STATE State)
|
2013-08-16 19:21:02 +00:00
|
|
|
{
|
2013-11-01 01:46:58 +00:00
|
|
|
/* Call the internal function */
|
|
|
|
Fast486ExecutionControl(State, FAST486_CONTINUE);
|
|
|
|
}
|
2013-08-16 19:21:02 +00:00
|
|
|
|
2013-11-01 01:46:58 +00:00
|
|
|
VOID
|
|
|
|
NTAPI
|
|
|
|
Fast486StepInto(PFAST486_STATE State)
|
|
|
|
{
|
|
|
|
/* Call the internal function */
|
|
|
|
Fast486ExecutionControl(State, FAST486_STEP_INTO);
|
|
|
|
}
|
2013-08-16 19:21:02 +00:00
|
|
|
|
2013-11-01 01:46:58 +00:00
|
|
|
VOID
|
|
|
|
NTAPI
|
|
|
|
Fast486StepOver(PFAST486_STATE State)
|
|
|
|
{
|
|
|
|
/* Call the internal function */
|
|
|
|
Fast486ExecutionControl(State, FAST486_STEP_OVER);
|
|
|
|
}
|
2013-09-21 00:45:28 +00:00
|
|
|
|
2013-11-01 01:46:58 +00:00
|
|
|
VOID
|
|
|
|
NTAPI
|
|
|
|
Fast486StepOut(PFAST486_STATE State)
|
|
|
|
{
|
|
|
|
/* Call the internal function */
|
|
|
|
Fast486ExecutionControl(State, FAST486_STEP_OUT);
|
2013-08-16 19:21:02 +00:00
|
|
|
}
|
2013-08-17 01:41:22 +00:00
|
|
|
|
|
|
|
VOID
|
|
|
|
NTAPI
|
2013-10-19 16:55:51 +00:00
|
|
|
Fast486Interrupt(PFAST486_STATE State, UCHAR Number)
|
2013-08-17 01:41:22 +00:00
|
|
|
{
|
2013-10-27 00:37:01 +00:00
|
|
|
/* Set the interrupt status and the number */
|
|
|
|
State->IntStatus = FAST486_INT_EXECUTE;
|
2013-10-18 22:50:00 +00:00
|
|
|
State->PendingIntNum = Number;
|
2013-08-17 01:41:22 +00:00
|
|
|
}
|
2013-08-17 15:20:47 +00:00
|
|
|
|
2013-10-27 00:37:01 +00:00
|
|
|
VOID
|
|
|
|
NTAPI
|
|
|
|
Fast486InterruptSignal(PFAST486_STATE State)
|
|
|
|
{
|
|
|
|
/* Set the interrupt status */
|
|
|
|
State->IntStatus = FAST486_INT_SIGNAL;
|
|
|
|
}
|
|
|
|
|
2013-08-31 19:18:12 +00:00
|
|
|
VOID
|
|
|
|
NTAPI
|
2013-10-19 16:55:51 +00:00
|
|
|
Fast486ExecuteAt(PFAST486_STATE State, USHORT Segment, ULONG Offset)
|
2013-08-31 19:18:12 +00:00
|
|
|
{
|
|
|
|
/* Load the new CS */
|
2013-10-19 16:55:51 +00:00
|
|
|
if (!Fast486LoadSegment(State, FAST486_REG_CS, Segment))
|
2013-08-31 19:18:12 +00:00
|
|
|
{
|
|
|
|
/* An exception occurred, let the handler execute instead */
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set the new IP */
|
|
|
|
State->InstPtr.Long = Offset;
|
|
|
|
}
|
|
|
|
|
2013-09-21 00:41:41 +00:00
|
|
|
VOID
|
|
|
|
NTAPI
|
2013-10-19 16:55:51 +00:00
|
|
|
Fast486SetStack(PFAST486_STATE State, USHORT Segment, ULONG Offset)
|
2013-09-21 00:41:41 +00:00
|
|
|
{
|
|
|
|
/* Load the new SS */
|
2013-10-19 16:55:51 +00:00
|
|
|
if (!Fast486LoadSegment(State, FAST486_REG_SS, Segment))
|
2013-09-21 00:41:41 +00:00
|
|
|
{
|
|
|
|
/* An exception occurred, let the handler execute instead */
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set the new SP */
|
2013-10-19 16:55:51 +00:00
|
|
|
State->GeneralRegs[FAST486_REG_ESP].Long = Offset;
|
2013-09-21 00:41:41 +00:00
|
|
|
}
|
|
|
|
|
2013-10-09 21:48:52 +00:00
|
|
|
VOID
|
|
|
|
NTAPI
|
2013-10-19 16:55:51 +00:00
|
|
|
Fast486SetSegment(PFAST486_STATE State,
|
|
|
|
FAST486_SEG_REGS Segment,
|
2013-10-09 21:48:52 +00:00
|
|
|
USHORT Selector)
|
|
|
|
{
|
|
|
|
/* Call the internal function */
|
2013-10-19 16:55:51 +00:00
|
|
|
Fast486LoadSegment(State, Segment, Selector);
|
2013-10-09 21:48:52 +00:00
|
|
|
}
|
2013-09-21 00:41:41 +00:00
|
|
|
|
2013-08-17 15:20:47 +00:00
|
|
|
/* EOF */
|