Intravision/reactos
1
0
Fork 0
mirror of https://github.com/reactos/reactos.git synced 2024-08-05 19:11:16 +00:00
Code Issues Packages Projects Releases Wiki Activity

[SOFT386]

Browse source 
Add definition for Soft386Interrupt.
Implement Soft386DumpState.


svn path=/branches/ntvdm/; revision=59757
This commit is contained in:
Aleksandar Andrejevic 2013-08-17 01:41:22 +00:00
parent e1c4d780c1
commit fb158ecbe1
2 changed files with 101 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
include/reactos/libs/soft386/soft386.h
View file

@ -289,6 +289,10 @@ VOID
NTAPI
Soft386Reset(PSOFT386_STATE State);
VOID
NTAPI
Soft386Interrupt(PSOFT386_STATE State, UCHAR Number);
#endif // _SOFT386_H_
/* EOF */

100
lib/soft386/soft386.c
View file

@ -69,8 +69,94 @@ VOID
NTAPI
Soft386DumpState(PSOFT386_STATE State)
{
// TODO: NOT IMPLEMENTED!!!
UNIMPLEMENTED;
DPRINT1("\nCPU currently executing in %s mode at %04X:%08X\n"
"Time Stamp Counter = %016X\n",
(State->ControlRegisters[0] & SOFT386_CR0_PE) ? "protected" : "real",
State->SegmentRegs[SOFT386_REG_CS].Selector,
State->InstPtr.Long,
State->TimeStampCounter);
DPRINT1("\nGeneral purpose registers:\n"
"EAX = %08X\tECX = %08X\tEDX = %08X\tEBX = %08X\n"
"ESP = %08X\tEBP = %08X\tESI = %08X\tEDI = %08X\n",
State->GeneralRegs[SOFT386_REG_EAX].Long,
State->GeneralRegs[SOFT386_REG_ECX].Long,
State->GeneralRegs[SOFT386_REG_EDX].Long,
State->GeneralRegs[SOFT386_REG_EBX].Long,
State->GeneralRegs[SOFT386_REG_ESP].Long,
State->GeneralRegs[SOFT386_REG_EBP].Long,
State->GeneralRegs[SOFT386_REG_ESI].Long,
State->GeneralRegs[SOFT386_REG_EDI].Long);
DPRINT1("\nSegment registers:\n"
"ES = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
"CS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
"SS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
"DS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
"FS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n"
"GS = %04X (Base: %08X, Limit: %08X, Dpl: %u)\n",
State->SegmentRegs[SOFT386_REG_ES].Selector,
State->SegmentRegs[SOFT386_REG_ES].Base,
State->SegmentRegs[SOFT386_REG_ES].Limit,
State->SegmentRegs[SOFT386_REG_ES].Dpl,
State->SegmentRegs[SOFT386_REG_CS].Selector,
State->SegmentRegs[SOFT386_REG_CS].Base,
State->SegmentRegs[SOFT386_REG_CS].Limit,
State->SegmentRegs[SOFT386_REG_CS].Dpl,
State->SegmentRegs[SOFT386_REG_SS].Selector,
State->SegmentRegs[SOFT386_REG_SS].Base,
State->SegmentRegs[SOFT386_REG_SS].Limit,
State->SegmentRegs[SOFT386_REG_SS].Dpl,
State->SegmentRegs[SOFT386_REG_DS].Selector,
State->SegmentRegs[SOFT386_REG_DS].Base,
State->SegmentRegs[SOFT386_REG_DS].Limit,
State->SegmentRegs[SOFT386_REG_DS].Dpl,
State->SegmentRegs[SOFT386_REG_FS].Selector,
State->SegmentRegs[SOFT386_REG_FS].Base,
State->SegmentRegs[SOFT386_REG_FS].Limit,
State->SegmentRegs[SOFT386_REG_FS].Dpl,
State->SegmentRegs[SOFT386_REG_GS].Selector,
State->SegmentRegs[SOFT386_REG_GS].Base,
State->SegmentRegs[SOFT386_REG_GS].Limit,
State->SegmentRegs[SOFT386_REG_GS].Dpl);
DPRINT1("\nFlags: %08X (%s %s %s %s %s %s %s %s %s %s %s %s %s %s %s) Iopl: %u\n",
State->Flags.Long,
State->Flags.Cf ? "CF" : "cf",
State->Flags.Pf ? "PF" : "pf",
State->Flags.Af ? "AF" : "af",
State->Flags.Zf ? "ZF" : "zf",
State->Flags.Sf ? "SF" : "sf",
State->Flags.Tf ? "TF" : "tf",
State->Flags.If ? "IF" : "if",
State->Flags.Df ? "DF" : "df",
State->Flags.Of ? "OF" : "of",
State->Flags.Nt ? "NT" : "nt",
State->Flags.Rf ? "RF" : "rf",
State->Flags.Vm ? "VM" : "vm",
State->Flags.Ac ? "AC" : "ac",
State->Flags.Vif ? "VIF" : "vif",
State->Flags.Vip ? "VIP" : "vip",
State->Flags.Iopl);
DPRINT1("\nControl Registers:\n"
"CR0 = %08X\tCR1 = %08X\tCR2 = %08X\tCR3 = %08X\n"
"CR4 = %08X\tCR5 = %08X\tCR6 = %08X\tCR7 = %08X\n",
State->ControlRegisters[SOFT386_REG_CR0],
State->ControlRegisters[SOFT386_REG_CR1],
State->ControlRegisters[SOFT386_REG_CR2],
State->ControlRegisters[SOFT386_REG_CR3],
State->ControlRegisters[SOFT386_REG_CR4],
State->ControlRegisters[SOFT386_REG_CR5],
State->ControlRegisters[SOFT386_REG_CR6],
State->ControlRegisters[SOFT386_REG_CR7]);
DPRINT1("\nDebug Registers:\n"
"DR0 = %08X\tDR1 = %08X\tDR2 = %08X\tDR3 = %08X\n"
"DR4 = %08X\tDR5 = %08X\tDR6 = %08X\tDR7 = %08X\n",
State->DebugRegisters[SOFT386_REG_DR0],
State->DebugRegisters[SOFT386_REG_DR1],
State->DebugRegisters[SOFT386_REG_DR2],
State->DebugRegisters[SOFT386_REG_DR3],
State->DebugRegisters[SOFT386_REG_DR4],
State->DebugRegisters[SOFT386_REG_DR5],
State->DebugRegisters[SOFT386_REG_DR6],
State->DebugRegisters[SOFT386_REG_DR7]);
}
VOID
@ -108,7 +194,7 @@ Soft386Reset(PSOFT386_STATE State)
State->Idtr.Address = 0;
/* Initialize CR0 */
State->ControlRegisters[0] |= SOFT386_CR0_ET;
State->ControlRegisters[SOFT386_REG_CR0] |= SOFT386_CR0_ET;
/* Restore the callbacks */
State->MemReadCallback = MemReadCallback;
@ -116,3 +202,11 @@ Soft386Reset(PSOFT386_STATE State)
State->IoReadCallback = IoReadCallback;
State->IoWriteCallback = IoWriteCallback;
}
VOID
NTAPI
Soft386Interrupt(PSOFT386_STATE State, UCHAR Number)
{
// TODO: NOT IMPLEMENTED!!!
UNIMPLEMENTED;
}