reactos/hal/halx86/acpi/busemul.c

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- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/*
* PROJECT: ReactOS HAL
[HAL]: Bus support in the HAL actually creates a further wedge between the different x86 HALs: There are actually two dinstinct implementations. On the ACPI HAL, the system is assumed not to have things like special ISA, MCA, EISA buses, and a PCI driver is used in combination with the ACPI Interface for PCI Bus support. On non-ACPI systems, the legacy "Bus Handler" library is used, and the HAL provides a core set of CMOS, EISA, ISA, MCA and PCI bus handlers, each with their own routines and specific code. Additionally, PCI IRQ Routing and other PCI bus internals are handled directly by the HAL -- on the ACPI HAL, the PCI Bus support is implemented through a "Fake"/static bus handler, just to keep the functions shared. On ReactOS, both the ACPI and non-ACPI HAL were currently using a mix of both HAL bus handling types, mostly implemented the "ACPI way" (with a fake PCI bus handler and such). As a result, none of the Hal*Bus HALDISPATCH routines were implemented, which bus drivers expect to find when they're not on ACPI systems (ReactOS today). eVb's new PCI driver was crashing, for example. Furthermore, legacy systems suffer, because the ACPI HAL Bus routines (that we currently have) expect perfect ACPI-style-compliant systems, not the legacy crap from the early 90ies. This works fine in VMs and new hardware, but old hardware is left behind. This patch basically corrects the first part of the problem, by making the bus handling support separate between ACPI and non-ACPI HALs. For now, the code remains 100% the same in functionality between both. However, I have started adding the first few elements: [HAL]: Implement HalRegisterBusHandler HALDISPATCH routine. [HAL]: On legacy HALs, register the CMOS, ISA, SYSTEM handlers. [HAL]: Add cmosbus.c. Stub all bus-specific bus handler routines in the xxxbus.c files. No real functionality change occurs with this patch, yet. svn path=/trunk/; revision=47649
2010-06-07 01:09:41 +00:00
* LICENSE: BSD - See COPYING.ARM in the top level directory
* FILE: hal/halx86/generic/acpi/busemul.c
* PURPOSE: ACPI HAL Bus Handler Emulation Code
* PROGRAMMERS: ReactOS Portable Systems Group
*/
[HAL]: Bus support in the HAL actually creates a further wedge between the different x86 HALs: There are actually two dinstinct implementations. On the ACPI HAL, the system is assumed not to have things like special ISA, MCA, EISA buses, and a PCI driver is used in combination with the ACPI Interface for PCI Bus support. On non-ACPI systems, the legacy "Bus Handler" library is used, and the HAL provides a core set of CMOS, EISA, ISA, MCA and PCI bus handlers, each with their own routines and specific code. Additionally, PCI IRQ Routing and other PCI bus internals are handled directly by the HAL -- on the ACPI HAL, the PCI Bus support is implemented through a "Fake"/static bus handler, just to keep the functions shared. On ReactOS, both the ACPI and non-ACPI HAL were currently using a mix of both HAL bus handling types, mostly implemented the "ACPI way" (with a fake PCI bus handler and such). As a result, none of the Hal*Bus HALDISPATCH routines were implemented, which bus drivers expect to find when they're not on ACPI systems (ReactOS today). eVb's new PCI driver was crashing, for example. Furthermore, legacy systems suffer, because the ACPI HAL Bus routines (that we currently have) expect perfect ACPI-style-compliant systems, not the legacy crap from the early 90ies. This works fine in VMs and new hardware, but old hardware is left behind. This patch basically corrects the first part of the problem, by making the bus handling support separate between ACPI and non-ACPI HALs. For now, the code remains 100% the same in functionality between both. However, I have started adding the first few elements: [HAL]: Implement HalRegisterBusHandler HALDISPATCH routine. [HAL]: On legacy HALs, register the CMOS, ISA, SYSTEM handlers. [HAL]: Add cmosbus.c. Stub all bus-specific bus handler routines in the xxxbus.c files. No real functionality change occurs with this patch, yet. svn path=/trunk/; revision=47649
2010-06-07 01:09:41 +00:00
/* INCLUDES *******************************************************************/
#include <hal.h>
#define NDEBUG
#include <debug.h>
[HAL]: Bus support in the HAL actually creates a further wedge between the different x86 HALs: There are actually two dinstinct implementations. On the ACPI HAL, the system is assumed not to have things like special ISA, MCA, EISA buses, and a PCI driver is used in combination with the ACPI Interface for PCI Bus support. On non-ACPI systems, the legacy "Bus Handler" library is used, and the HAL provides a core set of CMOS, EISA, ISA, MCA and PCI bus handlers, each with their own routines and specific code. Additionally, PCI IRQ Routing and other PCI bus internals are handled directly by the HAL -- on the ACPI HAL, the PCI Bus support is implemented through a "Fake"/static bus handler, just to keep the functions shared. On ReactOS, both the ACPI and non-ACPI HAL were currently using a mix of both HAL bus handling types, mostly implemented the "ACPI way" (with a fake PCI bus handler and such). As a result, none of the Hal*Bus HALDISPATCH routines were implemented, which bus drivers expect to find when they're not on ACPI systems (ReactOS today). eVb's new PCI driver was crashing, for example. Furthermore, legacy systems suffer, because the ACPI HAL Bus routines (that we currently have) expect perfect ACPI-style-compliant systems, not the legacy crap from the early 90ies. This works fine in VMs and new hardware, but old hardware is left behind. This patch basically corrects the first part of the problem, by making the bus handling support separate between ACPI and non-ACPI HALs. For now, the code remains 100% the same in functionality between both. However, I have started adding the first few elements: [HAL]: Implement HalRegisterBusHandler HALDISPATCH routine. [HAL]: On legacy HALs, register the CMOS, ISA, SYSTEM handlers. [HAL]: Add cmosbus.c. Stub all bus-specific bus handler routines in the xxxbus.c files. No real functionality change occurs with this patch, yet. svn path=/trunk/; revision=47649
2010-06-07 01:09:41 +00:00
/* GLOBALS ********************************************************************/
[HAL]: Bus support in the HAL actually creates a further wedge between the different x86 HALs: There are actually two dinstinct implementations. On the ACPI HAL, the system is assumed not to have things like special ISA, MCA, EISA buses, and a PCI driver is used in combination with the ACPI Interface for PCI Bus support. On non-ACPI systems, the legacy "Bus Handler" library is used, and the HAL provides a core set of CMOS, EISA, ISA, MCA and PCI bus handlers, each with their own routines and specific code. Additionally, PCI IRQ Routing and other PCI bus internals are handled directly by the HAL -- on the ACPI HAL, the PCI Bus support is implemented through a "Fake"/static bus handler, just to keep the functions shared. On ReactOS, both the ACPI and non-ACPI HAL were currently using a mix of both HAL bus handling types, mostly implemented the "ACPI way" (with a fake PCI bus handler and such). As a result, none of the Hal*Bus HALDISPATCH routines were implemented, which bus drivers expect to find when they're not on ACPI systems (ReactOS today). eVb's new PCI driver was crashing, for example. Furthermore, legacy systems suffer, because the ACPI HAL Bus routines (that we currently have) expect perfect ACPI-style-compliant systems, not the legacy crap from the early 90ies. This works fine in VMs and new hardware, but old hardware is left behind. This patch basically corrects the first part of the problem, by making the bus handling support separate between ACPI and non-ACPI HALs. For now, the code remains 100% the same in functionality between both. However, I have started adding the first few elements: [HAL]: Implement HalRegisterBusHandler HALDISPATCH routine. [HAL]: On legacy HALs, register the CMOS, ISA, SYSTEM handlers. [HAL]: Add cmosbus.c. Stub all bus-specific bus handler routines in the xxxbus.c files. No real functionality change occurs with this patch, yet. svn path=/trunk/; revision=47649
2010-06-07 01:09:41 +00:00
/* PRIVATE FUNCTIONS **********************************************************/
VOID
NTAPI
HalpRegisterKdSupportFunctions(VOID)
{
/* Register PCI Device Functions */
KdSetupPciDeviceForDebugging = HalpSetupPciDeviceForDebugging;
KdReleasePciDeviceforDebugging = HalpReleasePciDeviceForDebugging;
/* Register memory functions */
#ifndef _MINIHAL_
KdMapPhysicalMemory64 = HalpMapPhysicalMemory64;
KdUnmapVirtualAddress = HalpUnmapVirtualAddress;
#endif
/* Register ACPI stub */
KdCheckPowerButton = HalpCheckPowerButton;
}
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
NTSTATUS
NTAPI
HalpAssignSlotResources(IN PUNICODE_STRING RegistryPath,
IN PUNICODE_STRING DriverClassName,
IN PDRIVER_OBJECT DriverObject,
IN PDEVICE_OBJECT DeviceObject,
IN INTERFACE_TYPE BusType,
IN ULONG BusNumber,
IN ULONG SlotNumber,
IN OUT PCM_RESOURCE_LIST *AllocatedResources)
{
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
BUS_HANDLER BusHandler;
PAGED_CODE();
/* Only PCI is supported */
if (BusType != PCIBus) return STATUS_NOT_IMPLEMENTED;
/* Setup fake PCI Bus handler */
RtlCopyMemory(&BusHandler, &HalpFakePciBusHandler, sizeof(BUS_HANDLER));
BusHandler.BusNumber = BusNumber;
/* Call the PCI function */
return HalpAssignPCISlotResources(&BusHandler,
&BusHandler,
RegistryPath,
DriverClassName,
DriverObject,
DeviceObject,
SlotNumber,
AllocatedResources);
}
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
BOOLEAN
NTAPI
HalpTranslateBusAddress(IN INTERFACE_TYPE InterfaceType,
IN ULONG BusNumber,
IN PHYSICAL_ADDRESS BusAddress,
IN OUT PULONG AddressSpace,
OUT PPHYSICAL_ADDRESS TranslatedAddress)
{
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/* Translation is easy */
TranslatedAddress->QuadPart = BusAddress.QuadPart;
return TRUE;
}
ULONG
NTAPI
[HAL]: Bus support in the HAL actually creates a further wedge between the different x86 HALs: There are actually two dinstinct implementations. On the ACPI HAL, the system is assumed not to have things like special ISA, MCA, EISA buses, and a PCI driver is used in combination with the ACPI Interface for PCI Bus support. On non-ACPI systems, the legacy "Bus Handler" library is used, and the HAL provides a core set of CMOS, EISA, ISA, MCA and PCI bus handlers, each with their own routines and specific code. Additionally, PCI IRQ Routing and other PCI bus internals are handled directly by the HAL -- on the ACPI HAL, the PCI Bus support is implemented through a "Fake"/static bus handler, just to keep the functions shared. On ReactOS, both the ACPI and non-ACPI HAL were currently using a mix of both HAL bus handling types, mostly implemented the "ACPI way" (with a fake PCI bus handler and such). As a result, none of the Hal*Bus HALDISPATCH routines were implemented, which bus drivers expect to find when they're not on ACPI systems (ReactOS today). eVb's new PCI driver was crashing, for example. Furthermore, legacy systems suffer, because the ACPI HAL Bus routines (that we currently have) expect perfect ACPI-style-compliant systems, not the legacy crap from the early 90ies. This works fine in VMs and new hardware, but old hardware is left behind. This patch basically corrects the first part of the problem, by making the bus handling support separate between ACPI and non-ACPI HALs. For now, the code remains 100% the same in functionality between both. However, I have started adding the first few elements: [HAL]: Implement HalRegisterBusHandler HALDISPATCH routine. [HAL]: On legacy HALs, register the CMOS, ISA, SYSTEM handlers. [HAL]: Add cmosbus.c. Stub all bus-specific bus handler routines in the xxxbus.c files. No real functionality change occurs with this patch, yet. svn path=/trunk/; revision=47649
2010-06-07 01:09:41 +00:00
HalpGetSystemInterruptVector_Acpi(IN ULONG BusNumber,
IN ULONG BusInterruptLevel,
IN ULONG BusInterruptVector,
OUT PKIRQL Irql,
OUT PKAFFINITY Affinity)
{
UCHAR Vector = IRQ2VECTOR((UCHAR)BusInterruptLevel);
*Irql = VECTOR2IRQL(Vector);
*Affinity = 0xFFFFFFFF;
return Vector;
}
BOOLEAN
NTAPI
HalpFindBusAddressTranslation(IN PHYSICAL_ADDRESS BusAddress,
IN OUT PULONG AddressSpace,
OUT PPHYSICAL_ADDRESS TranslatedAddress,
IN OUT PULONG_PTR Context,
IN BOOLEAN NextBus)
{
/* Make sure we have a context */
if (!Context) return FALSE;
/* If we have data in the context, then this shouldn't be a new lookup */
if ((*Context) && (NextBus == TRUE)) return FALSE;
/* Return bus data */
TranslatedAddress->QuadPart = BusAddress.QuadPart;
/* Set context value and return success */
*Context = 1;
return TRUE;
}
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/* PUBLIC FUNCTIONS **********************************************************/
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/*
* @implemented
*/
NTSTATUS
NTAPI
HalAdjustResourceList(IN OUT PIO_RESOURCE_REQUIREMENTS_LIST* pRequirementsList)
{
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/* Deprecated, return success */
return STATUS_SUCCESS;
}
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/*
* @implemented
*/
NTSTATUS
NTAPI
HalAssignSlotResources(IN PUNICODE_STRING RegistryPath,
IN PUNICODE_STRING DriverClassName,
IN PDRIVER_OBJECT DriverObject,
IN PDEVICE_OBJECT DeviceObject,
IN INTERFACE_TYPE BusType,
IN ULONG BusNumber,
IN ULONG SlotNumber,
IN OUT PCM_RESOURCE_LIST *AllocatedResources)
{
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/* Check the bus type */
if (BusType != PCIBus)
{
/* Call our internal handler */
return HalpAssignSlotResources(RegistryPath,
DriverClassName,
DriverObject,
DeviceObject,
BusType,
BusNumber,
SlotNumber,
AllocatedResources);
}
else
{
/* Call the PCI registered function */
return HalPciAssignSlotResources(RegistryPath,
DriverClassName,
DriverObject,
DeviceObject,
PCIBus,
BusNumber,
SlotNumber,
AllocatedResources);
}
}
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/*
* @implemented
*/
ULONG
NTAPI
HalGetBusData(IN BUS_DATA_TYPE BusDataType,
IN ULONG BusNumber,
IN ULONG SlotNumber,
IN PVOID Buffer,
IN ULONG Length)
{
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/* Call the extended function */
return HalGetBusDataByOffset(BusDataType,
BusNumber,
SlotNumber,
Buffer,
0,
Length);
}
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/*
* @implemented
*/
ULONG
NTAPI
HalGetBusDataByOffset(IN BUS_DATA_TYPE BusDataType,
IN ULONG BusNumber,
IN ULONG SlotNumber,
IN PVOID Buffer,
IN ULONG Offset,
IN ULONG Length)
{
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
BUS_HANDLER BusHandler;
/* Look as the bus type */
if (BusDataType == Cmos)
{
/* Call CMOS Function */
return HalpGetCmosData(0, SlotNumber, Buffer, Length);
}
else if (BusDataType == EisaConfiguration)
{
/* FIXME: TODO */
ASSERT(FALSE);
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
}
else if ((BusDataType == PCIConfiguration) &&
(HalpPCIConfigInitialized) &&
((BusNumber >= HalpMinPciBus) && (BusNumber <= HalpMaxPciBus)))
{
/* Setup fake PCI Bus handler */
RtlCopyMemory(&BusHandler, &HalpFakePciBusHandler, sizeof(BUS_HANDLER));
BusHandler.BusNumber = BusNumber;
/* Call PCI function */
return HalpGetPCIData(&BusHandler,
&BusHandler,
*(PPCI_SLOT_NUMBER)&SlotNumber,
Buffer,
Offset,
Length);
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
}
/* Invalid bus */
return 0;
}
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/*
* @implemented
*/
ULONG
NTAPI
HalGetInterruptVector(IN INTERFACE_TYPE InterfaceType,
IN ULONG BusNumber,
IN ULONG BusInterruptLevel,
IN ULONG BusInterruptVector,
OUT PKIRQL Irql,
OUT PKAFFINITY Affinity)
{
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/* Call the system bus translator */
[HAL]: Bus support in the HAL actually creates a further wedge between the different x86 HALs: There are actually two dinstinct implementations. On the ACPI HAL, the system is assumed not to have things like special ISA, MCA, EISA buses, and a PCI driver is used in combination with the ACPI Interface for PCI Bus support. On non-ACPI systems, the legacy "Bus Handler" library is used, and the HAL provides a core set of CMOS, EISA, ISA, MCA and PCI bus handlers, each with their own routines and specific code. Additionally, PCI IRQ Routing and other PCI bus internals are handled directly by the HAL -- on the ACPI HAL, the PCI Bus support is implemented through a "Fake"/static bus handler, just to keep the functions shared. On ReactOS, both the ACPI and non-ACPI HAL were currently using a mix of both HAL bus handling types, mostly implemented the "ACPI way" (with a fake PCI bus handler and such). As a result, none of the Hal*Bus HALDISPATCH routines were implemented, which bus drivers expect to find when they're not on ACPI systems (ReactOS today). eVb's new PCI driver was crashing, for example. Furthermore, legacy systems suffer, because the ACPI HAL Bus routines (that we currently have) expect perfect ACPI-style-compliant systems, not the legacy crap from the early 90ies. This works fine in VMs and new hardware, but old hardware is left behind. This patch basically corrects the first part of the problem, by making the bus handling support separate between ACPI and non-ACPI HALs. For now, the code remains 100% the same in functionality between both. However, I have started adding the first few elements: [HAL]: Implement HalRegisterBusHandler HALDISPATCH routine. [HAL]: On legacy HALs, register the CMOS, ISA, SYSTEM handlers. [HAL]: Add cmosbus.c. Stub all bus-specific bus handler routines in the xxxbus.c files. No real functionality change occurs with this patch, yet. svn path=/trunk/; revision=47649
2010-06-07 01:09:41 +00:00
return HalpGetSystemInterruptVector_Acpi(BusNumber,
BusInterruptLevel,
BusInterruptVector,
Irql,
Affinity);
}
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/*
* @implemented
*/
ULONG
NTAPI
HalSetBusData(IN BUS_DATA_TYPE BusDataType,
IN ULONG BusNumber,
IN ULONG SlotNumber,
IN PVOID Buffer,
IN ULONG Length)
{
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/* Call the extended function */
return HalSetBusDataByOffset(BusDataType,
BusNumber,
SlotNumber,
Buffer,
0,
Length);
}
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/*
* @implemented
*/
ULONG
NTAPI
HalSetBusDataByOffset(IN BUS_DATA_TYPE BusDataType,
IN ULONG BusNumber,
IN ULONG SlotNumber,
IN PVOID Buffer,
IN ULONG Offset,
IN ULONG Length)
{
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
BUS_HANDLER BusHandler;
/* Look as the bus type */
if (BusDataType == Cmos)
{
/* Call CMOS Function */
return HalpSetCmosData(0, SlotNumber, Buffer, Length);
}
else if ((BusDataType == PCIConfiguration) && (HalpPCIConfigInitialized))
{
/* Setup fake PCI Bus handler */
RtlCopyMemory(&BusHandler, &HalpFakePciBusHandler, sizeof(BUS_HANDLER));
BusHandler.BusNumber = BusNumber;
/* Call PCI function */
return HalpSetPCIData(&BusHandler,
&BusHandler,
*(PPCI_SLOT_NUMBER)&SlotNumber,
Buffer,
Offset,
Length);
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
}
/* Invalid bus */
return 0;
}
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/*
* @implemented
*/
BOOLEAN
NTAPI
HalTranslateBusAddress(IN INTERFACE_TYPE InterfaceType,
IN ULONG BusNumber,
IN PHYSICAL_ADDRESS BusAddress,
IN OUT PULONG AddressSpace,
OUT PPHYSICAL_ADDRESS TranslatedAddress)
{
- Cleanup HAL initialization code: - Initailize the clock increment separately from the calibration of stall execution. - Raise IRQL to the current IRQL (basically a no-op) to force a standard PIC state. Will be needed for the new IRQ implementation when it'll work. - Scan commandline for PCILOCK and BREAK parameters during hal initalization. The former is not supported, only saved, while the latter causes a breakpoint just like the windows implemetnation. - Get the bus type (ISA, EISA, MCA) on startup to support bootup from NTLDR. - Validate HAL to match the kernel (checked kernel and UP kernel). Also make the kernel set the proper PRCB flags for this. - Initialize the CMOS lock. - Setup HAL Dispatch table and enable call to HalQuerySystemInformation in the kernel since it now works. - Rewrite bus functions to get rid of the idea of "Bus handlers". This is a deprecated NT4 concept that ReactOS copied and only slows down performance. - Support custom private dispatch table PCI functions. - Provide default PCI functions. - Rewrite PCI functions using clean structures and code instead of magic macros and undocumented magic values. Use simple macros to generate PCI bus operations for write/read uchar, ushort and ulong. - Simplify function definitions for CMOS access. - Unify some dupli/tripi-cated code. - Fix definition of HaliSetSystemInformation. - Fix definitions of Bus Handler functions (add NTAPI). - Add official BUS_HANDLER definition to NDK. - Fix definition of HAL_PRIVATE_DISPATCH. - Remove some derecated code (isa.c and mca.c). svn path=/trunk/; revision=24872
2006-11-27 19:26:31 +00:00
/* Look as the bus type */
if (InterfaceType == PCIBus)
{
/* Call the PCI registered function */
return HalPciTranslateBusAddress(PCIBus,
BusNumber,
BusAddress,
AddressSpace,
TranslatedAddress);
}
else
{
/* Translation is easy */
TranslatedAddress->QuadPart = BusAddress.QuadPart;
return TRUE;
}
}
/* EOF */