Module wide .cvsignore for:

*.sys, *.exe, *.dll, *.a, *.o, *.coff

Seperated the HALs from ntoskrnl.exe

Added template HAL

svn path=/trunk/; revision=2186

reactos/hal/hal/Makefile

@@ -0,0 +1,23 @@
+# $Id: Makefile,v 1.1 2001/08/21 20:18:26 chorns Exp $
+
+PATH_TO_TOP = ../..
+
+TARGET_TYPE = driver_library
+
+TARGET_ASFLAGS = -D__NTHAL__ -I$(PATH_TO_TOP)/ntoskrnl/include
+
+TARGET_CFLAGS = -D__NTHAL__ -I$(PATH_TO_TOP)/ntoskrnl/include
+
+TARGET_NAME = hal
+
+HEADER_FILES = $(PATH_TO_TOP)/include/roscfg.h
+
+TARGET_OBJECTS := $(TARGET_NAME).o $(HEADER_FILES)
+
+include $(PATH_TO_TOP)/rules.mak
+
+include $(TOOLS_PATH)/helper.mk
+
+include $(TOOLS_PATH)/config.mk
+
+# EOF

reactos/hal/hal/hal.c

@@ -0,0 +1,925 @@
+/* $Id: hal.c,v 1.1 2001/08/21 20:18:26 chorns Exp $
+ *
+ * COPYRIGHT:        See COPYING in the top level directory
+ * PROJECT:          ReactOS kernel
+ * FILE:             hal/hal.c
+ * PURPOSE:          Hardware Abstraction Layer DLL
+ * PROGRAMMER:       Casper S. Hornstrup (chorns@users.sourceforge.net)
+ * REVISION HISTORY:
+ *    01-08-2001 CSH Created
+ */
+
+/* INCLUDES ******************************************************************/
+
+#include <ddk/ntddk.h>
+#include <roscfg.h>
+
+#define NDEBUG
+#include <internal/debug.h>
+
+/* DATA **********************************************************************/
+
+ULONG EXPORTED KdComPortInUse = 0;
+
+/* FUNCTIONS *****************************************************************/
+
+NTSTATUS
+STDCALL
+DriverEntry(
+  PDRIVER_OBJECT DriverObject,
+  PUNICODE_STRING RegistryPath)
+{
+  UNIMPLEMENTED;
+
+  return STATUS_SUCCESS;
+}
+
+
+VOID
+FASTCALL
+ExAcquireFastMutex(
+  PFAST_MUTEX FastMutex)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+FASTCALL
+ExReleaseFastMutex(
+  PFAST_MUTEX FastMutex)
+{
+  UNIMPLEMENTED;
+}
+
+
+BOOLEAN FASTCALL
+ExTryToAcquireFastMutex(
+  PFAST_MUTEX FastMutex)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+VOID
+STDCALL
+HalAcquireDisplayOwnership(
+  PHAL_RESET_DISPLAY_PARAMETERS ResetDisplayParameters)
+{
+  UNIMPLEMENTED;
+}
+
+
+NTSTATUS
+STDCALL
+HalAdjustResourceList(
+  PCM_RESOURCE_LIST Resources)
+{
+  UNIMPLEMENTED;
+
+  return STATUS_SUCCESS;
+}
+
+
+BOOLEAN
+STDCALL
+HalAllProcessorsStarted(VOID)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+NTSTATUS
+STDCALL
+HalAllocateAdapterChannel(
+  PADAPTER_OBJECT AdapterObject,
+  PDEVICE_OBJECT DeviceObject,
+  ULONG NumberOfMapRegisters,
+  PDRIVER_CONTROL ExecutionRoutine,
+  PVOID Context)
+{
+  UNIMPLEMENTED;
+
+  return STATUS_SUCCESS;
+}
+
+
+PVOID
+STDCALL
+HalAllocateCommonBuffer(
+  PADAPTER_OBJECT AdapterObject,
+  ULONG Length,
+  PPHYSICAL_ADDRESS LogicalAddress,
+  BOOLEAN CacheEnabled)
+{
+  UNIMPLEMENTED;
+
+  return NULL;
+}
+
+
+NTSTATUS
+STDCALL
+HalAssignSlotResources(
+  PUNICODE_STRING RegistryPath,
+  PUNICODE_STRING DriverClassName,
+  PDRIVER_OBJECT DriverObject,
+  PDEVICE_OBJECT DeviceObject,
+  INTERFACE_TYPE BusType,
+  ULONG BusNumber,
+  ULONG SlotNumber,
+  PCM_RESOURCE_LIST *AllocatedResources)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+BOOLEAN
+STDCALL 
+HalBeginSystemInterrupt(
+  ULONG Vector,
+  KIRQL Irql,
+  PKIRQL OldIrql)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+VOID
+STDCALL
+HalCalibratePerformanceCounter(
+  ULONG Count)
+{
+  UNIMPLEMENTED;
+}
+
+
+BOOLEAN
+STDCALL
+HalDisableSystemInterrupt(
+  ULONG Vector,
+  ULONG Unknown2)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+VOID
+STDCALL
+HalDisplayString(
+  PCH String)
+{
+  UNIMPLEMENTED;
+}
+
+
+BOOLEAN
+STDCALL
+HalEnableSystemInterrupt(
+  ULONG Vector,
+  ULONG Unknown2,
+  ULONG Unknown3)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+VOID
+STDCALL
+HalEndSystemInterrupt(
+  KIRQL Irql,
+  ULONG Unknown2)
+{
+  UNIMPLEMENTED;
+}
+
+
+BOOLEAN
+STDCALL
+HalFlushCommonBuffer(
+  ULONG Unknown1,
+  ULONG Unknown2,
+  ULONG Unknown3,
+  ULONG Unknown4,
+  ULONG Unknown5,
+  ULONG Unknown6,
+  ULONG Unknown7,
+  ULONG Unknown8)
+{
+  UNIMPLEMENTED;
+
+   return TRUE;
+}
+
+
+VOID
+STDCALL
+HalFreeCommonBuffer(
+  PADAPTER_OBJECT AdapterObject,
+  ULONG Length,
+  PHYSICAL_ADDRESS LogicalAddress,
+  PVOID VirtualAddress,
+  BOOLEAN CacheEnabled)
+{
+  UNIMPLEMENTED;
+}
+
+
+PADAPTER_OBJECT
+STDCALL
+HalGetAdapter(
+  PDEVICE_DESCRIPTION DeviceDescription,
+  PULONG NumberOfMapRegisters)
+{
+  UNIMPLEMENTED;
+
+  return (PADAPTER_OBJECT)NULL;
+}
+
+
+ULONG
+STDCALL
+HalGetBusData(
+  BUS_DATA_TYPE BusDataType,
+  ULONG BusNumber,
+  ULONG SlotNumber,
+  PVOID Buffer,
+  ULONG Length)
+{
+  UNIMPLEMENTED;
+
+  return 0;
+}
+
+
+ULONG
+STDCALL
+HalGetBusDataByOffset(
+  BUS_DATA_TYPE BusDataType,
+  ULONG BusNumber,
+  ULONG SlotNumber,
+  PVOID Buffer,
+  ULONG Offset,
+  ULONG Length)
+{
+  UNIMPLEMENTED;
+
+  return 0;
+}
+
+
+BOOLEAN
+STDCALL
+HalGetEnvironmentVariable(
+  PCH Name,
+  PCH Value,
+  USHORT ValueLength)
+{
+  UNIMPLEMENTED;
+
+  return FALSE;
+}
+
+
+ULONG
+STDCALL
+HalGetInterruptVector(
+  INTERFACE_TYPE InterfaceType,
+  ULONG BusNumber,
+  ULONG BusInterruptLevel,
+  ULONG BusInterruptVector,
+  PKIRQL Irql,
+  PKAFFINITY Affinity)
+{
+  UNIMPLEMENTED;
+
+  return 0;
+}
+
+
+VOID
+STDCALL
+HalHandleNMI(
+  ULONG Unused)
+{
+  UNIMPLEMENTED;
+}
+
+
+BOOLEAN
+STDCALL
+HalInitSystem(
+  ULONG BootPhase,
+  PLOADER_PARAMETER_BLOCK LoaderBlock)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+VOID
+STDCALL
+HalInitializeProcessor(
+  ULONG ProcessorNumber,
+  PVOID ProcessorStack)
+{
+  UNIMPLEMENTED;
+}
+
+
+BOOLEAN
+STDCALL
+HalMakeBeep(
+  ULONG Frequency)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+VOID
+STDCALL
+HalProcessorIdle(VOID)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+HalQueryDisplayParameters(
+  PULONG DispSizeX,
+  PULONG DispSizeY,
+  PULONG CursorPosX,
+  PULONG CursorPosY)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+HalQueryRealTimeClock(
+  PTIME_FIELDS Time)
+{
+  UNIMPLEMENTED;
+}
+
+
+ULONG
+STDCALL
+HalReadDmaCounter(
+  PADAPTER_OBJECT AdapterObject)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+HalReportResourceUsage(VOID)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+HalRequestIpi(
+  ULONG Unknown)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+HalReturnToFirmware(
+  ULONG Action)
+{
+  UNIMPLEMENTED;
+}
+
+
+ULONG
+STDCALL
+HalSetBusData(
+  BUS_DATA_TYPE BusDataType,
+  ULONG BusNumber,
+  ULONG SlotNumber,
+  PVOID Buffer,
+  ULONG Length)
+{
+  UNIMPLEMENTED;
+
+  return 0;
+}
+
+
+ULONG
+STDCALL
+HalSetBusDataByOffset(
+  BUS_DATA_TYPE BusDataType,
+  ULONG BusNumber,
+  ULONG SlotNumber,
+  PVOID Buffer,
+  ULONG Offset,
+  ULONG Length)
+{
+  UNIMPLEMENTED;
+
+  return 0;
+}
+
+
+VOID
+STDCALL
+HalSetDisplayParameters(
+  ULONG CursorPosX,
+  ULONG CursorPosY)
+{
+  UNIMPLEMENTED;
+}
+
+
+BOOLEAN
+STDCALL
+HalSetEnvironmentVariable(
+  PCH Name,
+  PCH Value)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+VOID
+STDCALL
+HalSetRealTimeClock(
+  PTIME_FIELDS Time)
+{
+  UNIMPLEMENTED;
+}
+
+
+BOOLEAN
+STDCALL
+HalStartNextProcessor(
+  ULONG Unknown1,
+  ULONG Unknown2)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+ULONG
+FASTCALL
+HalSystemVectorDispatchEntry(
+  ULONG Unknown1,
+  ULONG Unknown2,
+  ULONG Unknown3)
+{
+  UNIMPLEMENTED;
+
+  return 0;
+}
+
+
+BOOLEAN
+STDCALL
+HalTranslateBusAddress(
+  INTERFACE_TYPE InterfaceType,
+  ULONG BusNumber,
+  PHYSICAL_ADDRESS BusAddress,
+  PULONG AddressSpace,
+  PPHYSICAL_ADDRESS TranslatedAddress)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+VOID
+STDCALL
+IoAssignDriveLetters(
+  PLOADER_PARAMETER_BLOCK LoaderBlock,
+  PSTRING NtDeviceName,
+  PUCHAR NtSystemPath,
+  PSTRING NtSystemPathString)
+{
+  UNIMPLEMENTED;
+}
+
+
+BOOLEAN
+STDCALL
+IoFlushAdapterBuffers(
+  PADAPTER_OBJECT AdapterObject,
+  PMDL Mdl,
+  PVOID MapRegisterBase,
+  PVOID CurrentVa,
+  ULONG Length,
+  BOOLEAN WriteToDevice)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+VOID
+STDCALL
+IoFreeAdapterChannel(
+  PADAPTER_OBJECT AdapterObject)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+IoFreeMapRegisters(
+  PADAPTER_OBJECT AdapterObject,
+  PVOID MapRegisterBase,
+  ULONG NumberOfMapRegisters)
+{
+  UNIMPLEMENTED;
+}
+
+
+PHYSICAL_ADDRESS
+STDCALL
+IoMapTransfer(
+  PADAPTER_OBJECT AdapterObject,
+  PMDL Mdl,
+  PVOID MapRegisterBase,
+  PVOID CurrentVa,
+  PULONG Length,
+  BOOLEAN WriteToDevice)
+{
+  PHYSICAL_ADDRESS Address;
+
+  UNIMPLEMENTED;
+
+  Address.QuadPart = 0;
+
+  return Address;
+}
+
+
+BOOLEAN
+STDCALL
+KdPortGetByte(
+  PUCHAR  ByteRecieved)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+BOOLEAN
+STDCALL
+KdPortInitialize(
+  PKD_PORT_INFORMATION PortInformation,
+  DWORD Unknown1,
+  DWORD Unknown2)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+BOOLEAN
+STDCALL
+KdPortPollByte(
+  PUCHAR  ByteRecieved)
+{
+  UNIMPLEMENTED;
+
+  return TRUE;
+}
+
+
+VOID
+STDCALL
+KdPortPutByte(
+  UCHAR ByteToSend)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+KdPortRestore(VOID)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+KdPortSave(VOID)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+KeAcquireSpinLock(
+  PKSPIN_LOCK SpinLock,
+  PKIRQL OldIrql)
+{
+  UNIMPLEMENTED;
+}
+
+
+KIRQL
+FASTCALL
+KeAcquireSpinLockRaiseToSynch(
+  PKSPIN_LOCK SpinLock)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+KeFlushWriteBuffer(VOID)
+{
+  UNIMPLEMENTED;
+}
+
+
+KIRQL
+STDCALL 
+KeGetCurrentIrql(VOID)
+{
+  UNIMPLEMENTED;
+
+  return (KIRQL)0;
+}
+
+
+VOID
+STDCALL
+KeLowerIrql(
+  KIRQL NewIrql)
+{
+  UNIMPLEMENTED;
+}
+
+
+LARGE_INTEGER
+STDCALL
+KeQueryPerformanceCounter(
+  PLARGE_INTEGER PerformanceFreq)
+{
+  LARGE_INTEGER Value;
+
+  UNIMPLEMENTED;
+
+  Value.QuadPart = 0;
+
+  return Value;
+}
+
+
+VOID
+STDCALL
+KeRaiseIrql(
+  KIRQL NewIrql,
+  PKIRQL OldIrql)
+{
+  UNIMPLEMENTED;
+}
+
+
+KIRQL
+STDCALL
+KeRaiseIrqlToDpcLevel(VOID)
+{
+  UNIMPLEMENTED;
+
+  return (KIRQL)0;
+}
+
+
+KIRQL
+STDCALL
+KeRaiseIrqlToSynchLevel(VOID)
+{
+  UNIMPLEMENTED;
+
+  return (KIRQL)0;
+}
+
+
+VOID
+STDCALL
+KeReleaseSpinLock(
+  PKSPIN_LOCK SpinLock,
+  KIRQL NewIrql)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+KeStallExecutionProcessor(
+  ULONG Microseconds)
+{
+  UNIMPLEMENTED;
+}
+
+
+KIRQL
+FASTCALL
+KfAcquireSpinLock(
+  PKSPIN_LOCK SpinLock)
+{
+  UNIMPLEMENTED;
+
+  return (KIRQL)0;
+}
+
+
+VOID
+FASTCALL
+KfLowerIrql(
+  KIRQL NewIrql)
+{
+  UNIMPLEMENTED;
+}
+
+
+KIRQL
+FASTCALL
+KfRaiseIrql(
+  KIRQL NewIrql)
+{
+  UNIMPLEMENTED;
+
+  return (KIRQL)0;
+}
+
+
+VOID
+FASTCALL
+KfReleaseSpinLock(
+  PKSPIN_LOCK SpinLock,
+  KIRQL NewIrql)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+READ_PORT_BUFFER_UCHAR(
+  PUCHAR Port,
+  PUCHAR Buffer,
+  ULONG Count)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+READ_PORT_BUFFER_ULONG(
+  PULONG Port,
+  PULONG Buffer,
+  ULONG Count)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+READ_PORT_BUFFER_USHORT(
+  PUSHORT Port,
+  PUSHORT Buffer,
+  ULONG Count)
+{
+  UNIMPLEMENTED;
+}
+
+
+UCHAR
+STDCALL
+READ_PORT_UCHAR(
+  PUCHAR Port)
+{
+  UNIMPLEMENTED;
+
+  return 0;
+}
+
+
+ULONG
+STDCALL
+READ_PORT_ULONG(
+  PULONG Port)
+{
+  UNIMPLEMENTED;
+
+  return 0;
+}
+
+
+USHORT
+STDCALL
+READ_PORT_USHORT(
+  PUSHORT Port)
+{
+  UNIMPLEMENTED;
+
+  return 0;
+}
+
+
+VOID
+STDCALL
+WRITE_PORT_BUFFER_UCHAR(
+  PUCHAR Port,
+  PUCHAR Buffer,
+  ULONG Count)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+WRITE_PORT_BUFFER_USHORT(
+  PUSHORT Port,
+  PUSHORT Buffer,
+  ULONG Count)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+WRITE_PORT_BUFFER_ULONG(
+  PULONG Port,
+  PULONG Buffer,
+  ULONG Count)
+{
+  UNIMPLEMENTED;
+}
+
+
+VOID
+STDCALL
+WRITE_PORT_UCHAR(
+  PUCHAR Port,
+  UCHAR Value)
+{
+  UNIMPLEMENTED;
+}
+
+VOID
+STDCALL
+WRITE_PORT_ULONG(
+  PULONG Port,
+  ULONG Value)
+{
+  UNIMPLEMENTED;
+}
+
+VOID
+STDCALL
+WRITE_PORT_USHORT(
+  PUSHORT Port,
+  USHORT Value)
+{
+  UNIMPLEMENTED;
+}
+
+/* EOF */

reactos/hal/hal/hal.def

@@ -0,0 +1,94 @@
+; Hardware Abstraction Layer - ReactOS Operating System
+
+LIBRARY hal.dll
+
+EXPORTS
+@ExAcquireFastMutex@4
+@ExReleaseFastMutex@4
+@ExTryToAcquireFastMutex@4
+HalAcquireDisplayOwnership@4
+HalAdjustResourceList@4
+HalAllProcessorsStarted@0
+HalAllocateAdapterChannel@20
+HalAllocateCommonBuffer@16
+;HalAllocateCrashDumpRegisters@8
+HalAssignSlotResources@32
+HalBeginSystemInterrupt@12
+HalCalibratePerformanceCounter@4
+;@HalClearSoftwareInterrupt@4
+;HalClearSoftwareInterrupt@4
+HalDisableSystemInterrupt@8
+HalDisplayString@4
+HalEnableSystemInterrupt@12
+HalEndSystemInterrupt@8
+HalFlushCommonBuffer@32
+HalFreeCommonBuffer@24
+HalGetAdapter@8
+HalGetBusData@20
+HalGetBusDataByOffset@24
+HalGetEnvironmentVariable@12
+HalGetInterruptVector@24
+HalHandleNMI@4
+HalInitSystem@8
+HalInitializeProcessor@8
+HalMakeBeep@4
+HalProcessorIdle@0
+HalQueryDisplayParameters@16
+HalQueryRealTimeClock@4
+HalReadDmaCounter@4
+HalReportResourceUsage@0
+HalRequestIpi@4
+;@HalRequestSoftwareInterrupt@4
+;HalRequestSoftwareInterrupt@4
+HalReturnToFirmware@4
+HalSetBusData@20
+HalSetBusDataByOffset@24
+HalSetDisplayParameters@8
+HalSetEnvironmentVariable@8
+;HalSetProfileInterval@4
+HalSetRealTimeClock@4
+;HalSetTimeIncrement@4
+HalStartNextProcessor@8
+;HalStartProfileInterrupt@4
+;HalStopProfileInterrupt@4
+@HalSystemVectorDispatchEntry@12
+HalTranslateBusAddress@24
+IoAssignDriveLetters@16
+IoFlushAdapterBuffers@24
+IoFreeAdapterChannel@4
+IoFreeMapRegisters@12
+IoMapTransfer@24
+KdComPortInUse DATA
+KdPortGetByte@4
+KdPortInitialize@12
+KdPortPollByte@4
+KdPortPutByte@4
+KdPortRestore@0
+KdPortSave@0
+KeAcquireSpinLock@8
+@KeAcquireSpinLockRaiseToSynch@4
+KeFlushWriteBuffer@0
+KeGetCurrentIrql@0
+KeLowerIrql@4
+KeQueryPerformanceCounter@4
+KeRaiseIrql@8
+KeRaiseIrqlToDpcLevel@0
+KeRaiseIrqlToSynchLevel@0
+KeReleaseSpinLock@8
+KeStallExecutionProcessor@4
+@KfAcquireSpinLock@4
+@KfLowerIrql@4
+@KfRaiseIrql@4
+@KfReleaseSpinLock@8
+READ_PORT_BUFFER_UCHAR@12
+READ_PORT_BUFFER_ULONG@12
+READ_PORT_BUFFER_USHORT@12
+READ_PORT_UCHAR@4
+READ_PORT_ULONG@4
+READ_PORT_USHORT@4
+WRITE_PORT_BUFFER_UCHAR@12
+WRITE_PORT_BUFFER_ULONG@12
+WRITE_PORT_BUFFER_USHORT@12
+WRITE_PORT_UCHAR@8
+WRITE_PORT_ULONG@8
+WRITE_PORT_USHORT@8

reactos/hal/hal/hal.edf

@@ -0,0 +1,94 @@
+; Hardware Abstraction Layer - ReactOS Operating System
+
+LIBRARY hal.dll
+
+EXPORTS
+ExAcquireFastMutex=@ExAcquireFastMutex@4
+ExReleaseFastMutex=@ExReleaseFastMutex@4
+ExTryToAcquireFastMutex=@ExTryToAcquireFastMutex@4
+HalAcquireDisplayOwnership=HalAcquireDisplayOwnership@4
+HalAdjustResourceList=HalAdjustResourceList@4
+HalAllProcessorsStarted=HalAllProcessorsStarted@0
+HalAllocateAdapterChannel=HalAllocateAdapterChannel@20
+HalAllocateCommonBuffer=HalAllocateCommonBuffer@16
+;HalAllocateCrashDumpRegisters@8
+HalAssignSlotResources=HalAssignSlotResources@32
+HalBeginSystemInterrupt=HalBeginSystemInterrupt@12
+HalCalibratePerformanceCounter=HalCalibratePerformanceCounter@4
+;@HalClearSoftwareInterrupt@4
+;HalClearSoftwareInterrupt@4
+HalDisableSystemInterrupt=HalDisableSystemInterrupt@8
+HalDisplayString=HalDisplayString@4
+HalEnableSystemInterrupt=HalEnableSystemInterrupt@12
+HalEndSystemInterrupt=HalEndSystemInterrupt@8
+HalFlushCommonBuffer=HalFlushCommonBuffer@32
+HalFreeCommonBuffer=HalFreeCommonBuffer@24
+HalGetAdapter=HalGetAdapter@8
+HalGetBusData=HalGetBusData@20
+HalGetBusDataByOffset=HalGetBusDataByOffset@24
+HalGetEnvironmentVariable=HalGetEnvironmentVariable@12
+HalGetInterruptVector=HalGetInterruptVector@24
+HalHandleNMI=HalHandleNMI@4
+HalInitSystem=HalInitSystem@8
+HalInitializeProcessor=HalInitializeProcessor@8
+HalMakeBeep=HalMakeBeep@4
+HalProcessorIdle=HalProcessorIdle@0
+HalQueryDisplayParameters=HalQueryDisplayParameters@16
+HalQueryRealTimeClock=HalQueryRealTimeClock@4
+HalReadDmaCounter=HalReadDmaCounter@4
+HalReportResourceUsage=HalReportResourceUsage@0
+HalRequestIpi=HalRequestIpi@4
+;@HalRequestSoftwareInterrupt@4
+;HalRequestSoftwareInterrupt@4
+HalReturnToFirmware=HalReturnToFirmware@4
+HalSetBusData=HalSetBusData@20
+HalSetBusDataByOffset=HalSetBusDataByOffset@24
+HalSetDisplayParameters=HalSetDisplayParameters@8
+HalSetEnvironmentVariable=HalSetEnvironmentVariable@8
+;HalSetProfileInterval@4
+HalSetRealTimeClock=HalSetRealTimeClock@4
+;HalSetTimeIncrement@4
+HalStartNextProcessor=HalStartNextProcessor@8
+;HalStartProfileInterrupt@4
+;HalStopProfileInterrupt@4
+HalSystemVectorDispatchEntry=@HalSystemVectorDispatchEntry@12
+HalTranslateBusAddress=HalTranslateBusAddress@24
+IoAssignDriveLetters=IoAssignDriveLetters@16
+IoFlushAdapterBuffers=IoFlushAdapterBuffers@24
+IoFreeAdapterChannel=IoFreeAdapterChannel@4
+IoFreeMapRegisters=IoFreeMapRegisters@12
+IoMapTransfer=IoMapTransfer@24
+KdComPortInUse DATA
+KdPortGetByte=KdPortGetByte@4
+KdPortInitialize=KdPortInitialize@12
+KdPortPollByte=KdPortPollByte@4
+KdPortPutByte=KdPortPutByte@4
+KdPortRestore=KdPortRestore@0
+KdPortSave=KdPortSave@0
+KeAcquireSpinLock=KeAcquireSpinLock@8
+KeAcquireSpinLockRaiseToSynch=@KeAcquireSpinLockRaiseToSynch@4
+KeFlushWriteBuffer=KeFlushWriteBuffer@0
+KeGetCurrentIrql=KeGetCurrentIrql@0
+KeLowerIrql=KeLowerIrql@4
+KeQueryPerformanceCounter=KeQueryPerformanceCounter@4
+KeRaiseIrql=KeRaiseIrql@8
+KeRaiseIrqlToDpcLevel=KeRaiseIrqlToDpcLevel@0
+KeRaiseIrqlToSynchLevel=KeRaiseIrqlToSynchLevel@0
+KeReleaseSpinLock=KeReleaseSpinLock@8
+KeStallExecutionProcessor=KeStallExecutionProcessor@4
+KfAcquireSpinLock=@KfAcquireSpinLock@4
+KfLowerIrql=@KfLowerIrql@4
+KfRaiseIrql=@KfRaiseIrql@4
+KfReleaseSpinLock=@KfReleaseSpinLock@8
+READ_PORT_BUFFER_UCHAR=READ_PORT_BUFFER_UCHAR@12
+READ_PORT_BUFFER_ULONG=READ_PORT_BUFFER_ULONG@12
+READ_PORT_BUFFER_USHORT=READ_PORT_BUFFER_USHORT@12
+READ_PORT_UCHAR=READ_PORT_UCHAR@4
+READ_PORT_ULONG=READ_PORT_ULONG@4
+READ_PORT_USHORT=READ_PORT_USHORT@4
+WRITE_PORT_BUFFER_UCHAR=WRITE_PORT_BUFFER_UCHAR@12
+WRITE_PORT_BUFFER_ULONG=WRITE_PORT_BUFFER_ULONG@12
+WRITE_PORT_BUFFER_USHORT=WRITE_PORT_BUFFER_USHORT@12
+WRITE_PORT_UCHAR=WRITE_PORT_UCHAR@8
+WRITE_PORT_ULONG=WRITE_PORT_ULONG@8
+WRITE_PORT_USHORT=WRITE_PORT_USHORT@8

reactos/hal/hal/hal.rc

@@ -0,0 +1,37 @@
+#include <defines.h>
+#include <reactos/resource.h>
+
+LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_US
+
+VS_VERSION_INFO VERSIONINFO
+	FILEVERSION	RES_UINT_FV_MAJOR,RES_UINT_FV_MINOR,RES_UINT_FV_REVISION,RES_UINT_FV_BUILD
+	PRODUCTVERSION	RES_UINT_PV_MAJOR,RES_UINT_PV_MINOR,RES_UINT_PV_REVISION,RES_UINT_PV_BUILD
+	FILEFLAGSMASK	0x3fL
+#ifdef _DEBUG
+	FILEFLAGS	0x1L
+#else
+	FILEFLAGS	0x0L
+#endif
+	FILEOS		0x40004L
+	FILETYPE	0x2L
+	FILESUBTYPE	0x0L
+BEGIN
+    BLOCK "StringFileInfo"
+    BEGIN
+        BLOCK "040904b0"
+        BEGIN
+            VALUE "CompanyName",	  RES_STR_COMPANY_NAME
+            VALUE "FileDescription",  "Template Hardware Abstraction Layer\0"
+            VALUE "FileVersion",	  "0.0.0\0"
+            VALUE "InternalName",	  "hal\0"
+            VALUE "LegalCopyright",	  RES_STR_LEGAL_COPYRIGHT
+            VALUE "OriginalFilename", "hal.dll\0"
+            VALUE "ProductName",	  RES_STR_PRODUCT_NAME
+            VALUE "ProductVersion",	  RES_STR_PRODUCT_VERSION
+        END
+    END
+    BLOCK "VarFileInfo"
+    BEGIN
+        VALUE "Translation", 0x409, 1200
+    END
+END

reactos/hal/halx86/.cvsignore

@@ -0,0 +1 @@
+*.d

reactos/hal/halx86/Makefile

@@ -0,0 +1,97 @@
+# $Id: Makefile,v 1.1 2001/08/21 20:18:26 chorns Exp $
+
+PATH_TO_TOP = ../..
+
+#
+# Build configuration
+#
+include $(PATH_TO_TOP)/rules.mak
+
+#
+# Global configuration
+#
+include $(TOOLS_PATH)/config.mk
+
+TARGET_TYPE = hal
+
+TARGET_BASENAME = hal
+
+TARGET_DEFNAME = ../hal/hal
+
+TARGET_LIBPATH = .
+
+TARGET_ASFLAGS = -I$(PATH_TO_TOP)/include -I$(PATH_TO_TOP)/ntoskrnl/include -D__ASM__
+
+TARGET_CFLAGS = -I./include -I$(PATH_TO_TOP)/ntoskrnl/include
+
+
+TARGET_NAME_UP = halx86up
+
+TARGET_NAME_MP = halx86mp
+
+ifeq ($(MP), 1)
+TARGET_NAME = $(TARGET_NAME_MP)
+else
+TARGET_NAME = $(TARGET_NAME_UP)
+endif
+
+HAL_OBJECTS = \
+	adapter.o \
+	beep.o \
+	bios32.o \
+	bus.o \
+	display.o \
+	dma.o \
+	drive.o \
+	enum.o \
+	fmutex.o \
+	halinit.o \
+	isa.o \
+	kdbg.o \
+	mbr.o \
+	misc.o \
+	mp.o \
+	pci.o \
+	perfcnt.o \
+	portio.o \
+	reboot.o \
+	spinlock.o \
+	sysbus.o \
+	sysinfo.o \
+	time.o \
+	udelay.o
+
+	#pwroff.o
+
+HAL_UP = \
+  $(HAL_OBJECTS) \
+	irql.o  
+
+HAL_MP = \
+  $(HAL_OBJECTS) \
+	mpsirql.o \
+	mpsboot.o \
+	mps.o
+
+ifeq ($(MP), 1)
+DEP_OBJECTS := $(HAL_MP)
+else
+DEP_OBJECTS := $(HAL_UP)
+endif
+
+TARGET_OBJECTS := $(DEP_OBJECTS) $(PATH_TO_TOP)/include/roscfg.h
+
+# Note: Must be = and not := since $(DEP_FILES) is assigned a value below
+TARGET_CLEAN = $(DEP_FILES) *.o *.dll
+
+#
+# Helper makefile
+#
+include $(TOOLS_PATH)/helper.mk
+
+#
+# Include automatic dependancy tracking
+#
+include $(TOOLS_PATH)/depend.mk
+
+# EOF

reactos/hal/halx86/adapter.c

@@ -0,0 +1,154 @@
+/* $Id: adapter.c,v 1.1 2001/08/21 20:18:26 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            hal/x86/adapter.c (from ntoskrnl/io/adapter.c)
+ * PURPOSE:         DMA handling
+ * PROGRAMMER:      David Welch (welch@mcmail.com)
+ * UPDATE HISTORY:
+ *                  Created 22/05/98
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+#include <ddk/iotypes.h>
+#include <internal/debug.h>
+#include <hal.h>
+
+/* FUNCTIONS *****************************************************************/
+
+/* NOTE: IoAllocateAdapterChannel in NTOSKRNL.EXE */
+
+NTSTATUS STDCALL
+HalAllocateAdapterChannel(PADAPTER_OBJECT AdapterObject,
+			  PDEVICE_OBJECT DeviceObject,
+			  ULONG NumberOfMapRegisters,
+			  PDRIVER_CONTROL ExecutionRoutine,
+			  PVOID Context )
+{
+  KIRQL OldIrql;
+  PVOID Buffer;
+  int ret;
+  LARGE_INTEGER MaxAddress;
+
+  MaxAddress.QuadPart = 0x1000000;
+  Buffer = MmAllocateContiguousAlignedMemory( NumberOfMapRegisters * PAGESIZE,
+					      MaxAddress,
+					      0x10000 );
+  if( !Buffer )
+    return STATUS_INSUFFICIENT_RESOURCES;
+  KeAcquireSpinLock( &AdapterObject->SpinLock, &OldIrql );
+  if( AdapterObject->Inuse )
+    {
+      // someone is already using it, we need to wait
+      // create a wait block, and add it to the chain
+      UNIMPLEMENTED;
+    }
+  else {
+    AdapterObject->Inuse = TRUE;
+    KeReleaseSpinLock( &AdapterObject->SpinLock, OldIrql );
+    ret = ExecutionRoutine( DeviceObject,
+			    NULL,
+			    Buffer,
+			    Context );
+    KeAcquireSpinLock( &AdapterObject->SpinLock, &OldIrql );
+    if( ret == DeallocateObject )
+      {
+	MmFreeContiguousMemory( Buffer );
+	AdapterObject->Inuse = FALSE;
+      }
+    else AdapterObject->Buffer = Buffer;
+  }
+  KeReleaseSpinLock( &AdapterObject->SpinLock, OldIrql );
+  return STATUS_SUCCESS;
+}
+
+
+BOOLEAN STDCALL
+IoFlushAdapterBuffers (PADAPTER_OBJECT	AdapterObject,
+		       PMDL		Mdl,
+		       PVOID		MapRegisterBase,
+		       PVOID		CurrentVa,
+		       ULONG		Length,
+		       BOOLEAN		WriteToDevice)
+{
+  // if this was a read from device, copy data back to caller buffer, otherwise, do nothing
+  if( !WriteToDevice )
+    memcpy( (PVOID)((DWORD)MmGetSystemAddressForMdl( Mdl ) + (DWORD)CurrentVa - (DWORD)MmGetMdlVirtualAddress( Mdl )), MapRegisterBase, Length );
+  return TRUE;
+}
+
+
+VOID STDCALL
+IoFreeAdapterChannel (PADAPTER_OBJECT	AdapterObject)
+{
+  KIRQL OldIrql;
+  
+  KeAcquireSpinLock( &AdapterObject->SpinLock, &OldIrql );
+  if( AdapterObject->Inuse == FALSE )
+    {
+      DbgPrint( "Attempting to IoFreeAdapterChannel on a channel not in use\n" );
+      KeBugCheck(0);
+    }
+  AdapterObject->Inuse = FALSE;
+  if( AdapterObject->Buffer )
+    {
+      MmFreeContiguousMemory( AdapterObject->Buffer );
+      AdapterObject->Buffer = 0;
+    }
+  KeReleaseSpinLock( &AdapterObject->SpinLock, OldIrql );
+}
+
+
+VOID STDCALL
+IoFreeMapRegisters (PADAPTER_OBJECT	AdapterObject,
+		    PVOID		MapRegisterBase,
+		    ULONG		NumberOfMapRegisters)
+{
+   UNIMPLEMENTED;
+}
+
+
+PHYSICAL_ADDRESS  STDCALL
+IoMapTransfer (PADAPTER_OBJECT	AdapterObject,
+	       PMDL		Mdl,
+	       PVOID		MapRegisterBase,
+	       PVOID		CurrentVa,
+	       PULONG		Length,
+	       BOOLEAN		WriteToDevice)
+{
+  PHYSICAL_ADDRESS Address;
+  // program up the dma controller, and return
+  // if it is a write to the device, copy the caller buffer to the low buffer
+  if( WriteToDevice )
+    memcpy( MapRegisterBase,
+	    MmGetSystemAddressForMdl( Mdl ) + ( (DWORD)CurrentVa - (DWORD)MmGetMdlVirtualAddress( Mdl ) ),
+	    *Length );
+  Address = MmGetPhysicalAddress( MapRegisterBase );
+  // port 0xA is the dma mask register, or a 0x10 on to the channel number to mask it
+  WRITE_PORT_UCHAR( (PVOID)0x0A, AdapterObject->Channel | 0x10 );
+  // write zero to the reset register
+  WRITE_PORT_UCHAR( (PVOID)0x0C, 0 );
+  // mode register, or channel with 0x4 for write memory, 0x8 for read memory, 0x10 for non auto initialize
+  WRITE_PORT_UCHAR( (PVOID)0x0B, AdapterObject->Channel | ( WriteToDevice ? 0x8 : 0x4 ) );
+  // set the 64k page register for the channel
+  WRITE_PORT_UCHAR( AdapterObject->PagePort, (UCHAR)(((ULONG)Address.QuadPart)>>16) );
+  // low, then high address byte, which is always 0 for us, because we have a 64k alligned address
+  WRITE_PORT_UCHAR( AdapterObject->OffsetPort, 0 );
+  WRITE_PORT_UCHAR( AdapterObject->OffsetPort, 0 );
+  // count is 1 less than length, low then high
+  WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)(*Length - 1) );
+  WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)((*Length - 1)>>8) );
+  // unmask the channel to let it rip
+  WRITE_PORT_UCHAR( (PVOID)0x0A, AdapterObject->Channel );
+  Address.QuadPart = (DWORD)MapRegisterBase;
+  return Address;
+}
+
+
+/* EOF */
+
+
+
+

reactos/hal/halx86/beep.c

@@ -0,0 +1,77 @@
+/*
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/beep.c
+ * PURPOSE:         Speaker function (it's only one)
+ * PROGRAMMER:      Eric Kohl (ekohl@abo.rhein-zeitung.de)
+ * UPDATE HISTORY:
+ *                  Created 31/01/99
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+
+#define NDEBUG
+#include <internal/debug.h>
+
+
+/* CONSTANTS *****************************************************************/
+
+#define TIMER2     0x42
+#define TIMER3     0x43
+#define PORT_B     0x61
+#define CLOCKFREQ  1193167
+
+
+/* FUNCTIONS *****************************************************************/
+/*
+ * FUNCTION: Beeps the speaker.
+ * ARGUMENTS:
+ *       Frequency = If 0, the speaker will be switched off, otherwise
+ *                   the speaker beeps with the specified frequency.
+ */
+
+BOOLEAN
+STDCALL
+HalMakeBeep (
+	ULONG	Frequency
+	)
+{
+   UCHAR b;
+   
+    /* save flags and disable interrupts */
+    __asm__("pushf\n\t" \
+            "cli\n\t");
+
+    /* speaker off */
+    b = READ_PORT_UCHAR((PUCHAR)PORT_B);
+    WRITE_PORT_UCHAR((PUCHAR)PORT_B, b & 0xFC);
+
+    if (Frequency)
+    {
+        DWORD Divider = CLOCKFREQ / Frequency;
+
+        if (Divider > 0x10000)
+        {
+            /* restore flags */
+            __asm__("popf\n\t");
+
+            return FALSE;
+        }
+
+        /* set timer divider */
+        WRITE_PORT_UCHAR((PUCHAR)TIMER3, 0xB6);
+        WRITE_PORT_UCHAR((PUCHAR)TIMER2, (UCHAR)(Divider & 0xFF));
+        WRITE_PORT_UCHAR((PUCHAR)TIMER2, (UCHAR)((Divider>>8) & 0xFF));
+
+        /* speaker on */
+        WRITE_PORT_UCHAR((PUCHAR)PORT_B, READ_PORT_UCHAR((PUCHAR)PORT_B) | 0x03);
+    }
+
+    /* restore flags */
+    __asm__("popf\n\t");
+
+    return TRUE;
+}
+

reactos/hal/halx86/bios32.c

@@ -0,0 +1,144 @@
+/*
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/pci
+ * PURPOSE:         Interfaces to BIOS32 interface
+ * PROGRAMMER:      David Welch (welch@mcmail.com)
+ * UPDATE HISTORY:
+ *               05/06/98: Created
+ */
+
+/*
+ * NOTES: Sections copied from the Linux pci support
+ */
+
+/* INCLUDES ***************************************************************/
+
+#include <ddk/ntddk.h>
+#include <internal/mm.h>
+#include <internal/i386/segment.h>
+
+
+/* TYPES ******************************************************************/
+
+typedef struct
+{
+   /*
+    * "_32_" if present
+    */
+   unsigned int signature;
+   
+   /*
+    * Entry point (physical address)
+    */
+   unsigned long int entry;
+   
+   /*
+    * Revision level
+    */
+   unsigned char revision;
+   
+   /*
+    * Length in paragraphs
+    */
+   unsigned char length;
+   
+   /*
+    * Checksum (so all bytes add up to zero)
+    */
+   unsigned char checksum;
+   
+   unsigned char reserved[5];
+} bios32;
+
+BOOLEAN bios32_detected = FALSE;
+
+static struct
+{
+   unsigned long address;
+   unsigned short segment;
+} bios32_indirect = {0,KERNEL_CS};
+
+/* FUNCTIONS **************************************************************/
+
+#define BIOS32_SIGNATURE (('_' << 0)+('3'<<8)+('2'<<16)+('_'<<24))
+
+#if 0
+BOOL static checksum(bios32* service_entry)
+/*
+ * FUNCTION: Checks the checksum of a bios32 service entry
+ * ARGUMENTS:
+ *         service_entry = Pointer to the service entry
+ * RETURNS: True if the sum of the bytes in the entry was zero
+ *          False otherwise
+ */
+{
+   unsigned char* p = (unsigned char *)service_entry;
+   int i;
+   unsigned char sum=0;
+   
+   for (i=0; i<(service_entry->length*16); i++)
+     {
+	sum=sum+p[i];
+     }
+//   DbgPrint("sum = %d\n",sum);
+   if (sum==0)
+     {
+	return(TRUE);
+     }
+   return(FALSE);
+}
+#endif
+
+BOOLEAN Hal_bios32_is_service_present(ULONG service)
+{
+   unsigned char return_code;
+   unsigned int address;
+   unsigned int length;
+   unsigned int entry;
+   
+   __asm__("lcall *(%%edi)"
+	   : "=a" (return_code),
+	     "=b" (address),
+	     "=c" (length),
+	     "=d" (entry)
+	   : "0" (service),
+	     "1" (0),
+	     "D" (&bios32_indirect));
+   if (return_code==0)
+     {
+	return(address+entry);
+     }
+   return(0);
+}
+
+VOID Hal_bios32_probe()
+/*
+ * FUNCTION: Probes for an BIOS32 extension
+ * RETURNS: True if detected
+ */
+{
+   DbgPrint ("Hal_bios32_probe()\n");
+
+   return;
+#if 0
+   int i;
+   
+   for (i=0xe0000;i<=0xffff0;i++)
+     {
+	bios32* service_entry = (bios32 *)physical_to_linear(i);
+	if ( service_entry->signature != BIOS32_SIGNATURE )
+	  {
+	     continue;
+	  }
+        DbgPrint("Signature detected at %x\n",i);
+	if (!checksum(service_entry))
+	  {
+	     continue;
+	  }
+        DbgPrint("ReactOS: BIOS32 detected at %x\n",i);
+	bios32_indirect.address = service_entry->entry;
+	bios32_detected=TRUE;
+     }
+#endif
+}

reactos/hal/halx86/bus.c

@@ -0,0 +1,515 @@
+/* $Id: bus.c,v 1.1 2001/08/21 20:18:26 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/bus.c
+ * PURPOSE:         Bus functions
+ * PROGRAMMER:      David Welch (welch@mcmail.com)
+ * UPDATE HISTORY:
+ *                  Created 22/05/98
+ *
+ *
+ * TODO:
+ *   - Add bus handler functions for all busses
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+#include <internal/pool.h>
+#include <bus.h>
+
+#define NDEBUG
+#include <internal/debug.h>
+
+/* GLOBALS *******************************************************************/
+
+#define TAG_BUS  TAG('B', 'U', 'S', 'H')
+
+KSPIN_LOCK HalpBusHandlerSpinLock = {0,};
+LIST_ENTRY HalpBusHandlerList;
+
+
+/* FUNCTIONS *****************************************************************/
+
+static NTSTATUS STDCALL
+HalpNoAdjustResourceList(PBUS_HANDLER BusHandler,
+			 ULONG BusNumber,
+			 PCM_RESOURCE_LIST Resources)
+{
+   return STATUS_UNSUCCESSFUL;
+}
+
+static NTSTATUS STDCALL
+HalpNoAssignSlotResources(PBUS_HANDLER BusHandler,
+			  ULONG BusNumber,
+			  PUNICODE_STRING RegistryPath,
+			  PUNICODE_STRING DriverClassName,
+			  PDRIVER_OBJECT DriverObject,
+			  PDEVICE_OBJECT DeviceObject,
+			  ULONG SlotNumber,
+			  PCM_RESOURCE_LIST *AllocatedResources)
+{
+   return STATUS_NOT_SUPPORTED;
+}
+
+static ULONG STDCALL
+HalpNoBusData(PBUS_HANDLER BusHandler,
+	      ULONG BusNumber,
+	      ULONG SlotNumber,
+	      PVOID Buffer,
+	      ULONG Offset,
+	      ULONG Length)
+{
+   return 0;
+}
+
+static ULONG STDCALL
+HalpNoGetInterruptVector(PBUS_HANDLER BusHandler,
+			 ULONG BusNumber,
+			 ULONG BusInterruptLevel,
+			 ULONG BusInterruptVector,
+			 PKIRQL Irql,
+			 PKAFFINITY Affinity)
+{
+   return 0;
+}
+
+static ULONG STDCALL
+HalpNoTranslateBusAddress(PBUS_HANDLER BusHandler,
+			  ULONG BusNumber,
+			  PHYSICAL_ADDRESS BusAddress,
+			  PULONG AddressSpace,
+			  PPHYSICAL_ADDRESS TranslatedAddress)
+{
+   return 0;
+}
+
+
+PBUS_HANDLER
+HalpAllocateBusHandler(INTERFACE_TYPE InterfaceType,
+		       BUS_DATA_TYPE BusDataType,
+		       ULONG BusNumber)
+{
+   PBUS_HANDLER BusHandler = NULL;
+
+   DPRINT("HalpAllocateBusHandler()\n");
+
+   BusHandler = ExAllocatePoolWithTag(NonPagedPool,
+				      sizeof(BUS_HANDLER),
+				      TAG_BUS);
+   if (BusHandler == NULL)
+     return NULL;
+
+   RtlZeroMemory(BusHandler,
+		 sizeof(BUS_HANDLER));
+
+   InsertTailList(&HalpBusHandlerList,
+		  &BusHandler->Entry);
+
+   BusHandler->InterfaceType = InterfaceType;
+   BusHandler->BusDataType = BusDataType;
+   BusHandler->BusNumber = BusNumber;
+
+   /* initialize default bus handler functions */
+   BusHandler->GetBusData = HalpNoBusData;
+   BusHandler->SetBusData = HalpNoBusData;
+   BusHandler->AdjustResourceList = HalpNoAdjustResourceList;
+   BusHandler->AssignSlotResources = HalpNoAssignSlotResources;
+   BusHandler->GetInterruptVector = HalpNoGetInterruptVector;
+   BusHandler->TranslateBusAddress = HalpNoTranslateBusAddress;
+
+   /* any more ?? */
+
+   DPRINT("HalpAllocateBusHandler() done\n");
+
+   return BusHandler;
+}
+
+
+VOID
+HalpInitBusHandlers(VOID)
+{
+   PBUS_HANDLER BusHandler;
+
+   /* general preparations */
+   KeInitializeSpinLock(&HalpBusHandlerSpinLock);
+   InitializeListHead(&HalpBusHandlerList);
+
+   /* initialize hal dispatch tables */
+#if 0
+
+
+   HalDispatchTable->HalQueryBusSlots = HaliQueryBusSlots;
+#endif
+
+   /* add system bus handler */
+   BusHandler = HalpAllocateBusHandler(Internal,
+				       ConfigurationSpaceUndefined,
+				       0);
+   if (BusHandler == NULL)
+     return;
+   BusHandler->GetInterruptVector =
+	(pGetInterruptVector)HalpGetSystemInterruptVector;
+   BusHandler->TranslateBusAddress =
+	(pTranslateBusAddress)HalpTranslateSystemBusAddress;
+
+   /* add cmos bus handler */
+   BusHandler = HalpAllocateBusHandler(InterfaceTypeUndefined,
+				       Cmos,
+				       0);
+   if (BusHandler == NULL)
+     return;
+   BusHandler->GetBusData = (pGetSetBusData)HalpGetCmosData;
+   BusHandler->SetBusData = (pGetSetBusData)HalpSetCmosData;
+
+   /* add isa bus handler */
+   BusHandler = HalpAllocateBusHandler(Isa,
+				       ConfigurationSpaceUndefined,
+				       0);
+   if (BusHandler == NULL)
+     return;
+
+   BusHandler->TranslateBusAddress =
+	(pTranslateBusAddress)HalpTranslateIsaBusAddress;
+}
+
+
+PBUS_HANDLER FASTCALL
+HaliHandlerForBus(INTERFACE_TYPE InterfaceType,
+		  ULONG BusNumber)
+{
+   PBUS_HANDLER BusHandler;
+   PLIST_ENTRY CurrentEntry;
+   KIRQL OldIrql;
+
+   KeAcquireSpinLock(&HalpBusHandlerSpinLock,
+		     &OldIrql);
+
+   CurrentEntry = HalpBusHandlerList.Flink;
+   while (CurrentEntry != &HalpBusHandlerList)
+     {
+	BusHandler = (PBUS_HANDLER)CurrentEntry;
+	if (BusHandler->InterfaceType == InterfaceType &&
+	    BusHandler->BusNumber == BusNumber)
+	  {
+	     KeReleaseSpinLock(&HalpBusHandlerSpinLock,
+			       OldIrql);
+	     return BusHandler;
+	  }
+	CurrentEntry = CurrentEntry->Flink;
+     }
+   KeReleaseSpinLock(&HalpBusHandlerSpinLock,
+		     OldIrql);
+
+   return NULL;
+}
+
+
+PBUS_HANDLER FASTCALL
+HaliHandlerForConfigSpace(BUS_DATA_TYPE BusDataType,
+			  ULONG BusNumber)
+{
+   PBUS_HANDLER BusHandler;
+   PLIST_ENTRY CurrentEntry;
+   KIRQL OldIrql;
+
+   KeAcquireSpinLock(&HalpBusHandlerSpinLock,
+		     &OldIrql);
+
+   CurrentEntry = HalpBusHandlerList.Flink;
+   while (CurrentEntry != &HalpBusHandlerList)
+     {
+	BusHandler = (PBUS_HANDLER)CurrentEntry;
+	if (BusHandler->BusDataType == BusDataType &&
+	    BusHandler->BusNumber == BusNumber)
+	  {
+	     KeReleaseSpinLock(&HalpBusHandlerSpinLock,
+			       OldIrql);
+	     return BusHandler;
+	  }
+	CurrentEntry = CurrentEntry->Flink;
+     }
+   KeReleaseSpinLock(&HalpBusHandlerSpinLock,
+		     OldIrql);
+
+   return NULL;
+}
+
+
+PBUS_HANDLER FASTCALL
+HaliReferenceHandlerForBus(INTERFACE_TYPE InterfaceType,
+			   ULONG BusNumber)
+{
+   PBUS_HANDLER BusHandler;
+   PLIST_ENTRY CurrentEntry;
+   KIRQL OldIrql;
+
+   KeAcquireSpinLock(&HalpBusHandlerSpinLock,
+		     &OldIrql);
+
+   CurrentEntry = HalpBusHandlerList.Flink;
+   while (CurrentEntry != &HalpBusHandlerList)
+     {
+	BusHandler = (PBUS_HANDLER)CurrentEntry;
+	if (BusHandler->InterfaceType == InterfaceType &&
+	    BusHandler->BusNumber == BusNumber)
+	  {
+	     BusHandler->RefCount++;
+	     KeReleaseSpinLock(&HalpBusHandlerSpinLock,
+			       OldIrql);
+	     return BusHandler;
+	  }
+	CurrentEntry = CurrentEntry->Flink;
+     }
+   KeReleaseSpinLock(&HalpBusHandlerSpinLock,
+		     OldIrql);
+
+   return NULL;
+}
+
+
+PBUS_HANDLER FASTCALL
+HaliReferenceHandlerForConfigSpace(BUS_DATA_TYPE BusDataType,
+				   ULONG BusNumber)
+{
+   PBUS_HANDLER BusHandler;
+   PLIST_ENTRY CurrentEntry;
+   KIRQL OldIrql;
+
+   KeAcquireSpinLock(&HalpBusHandlerSpinLock,
+		     &OldIrql);
+
+   CurrentEntry = HalpBusHandlerList.Flink;
+   while (CurrentEntry != &HalpBusHandlerList)
+     {
+	BusHandler = (PBUS_HANDLER)CurrentEntry;
+	if (BusHandler->BusDataType == BusDataType &&
+	    BusHandler->BusNumber == BusNumber)
+	  {
+	     BusHandler->RefCount++;
+	     KeReleaseSpinLock(&HalpBusHandlerSpinLock,
+			       OldIrql);
+	     return BusHandler;
+	  }
+	CurrentEntry = CurrentEntry->Flink;
+     }
+   KeReleaseSpinLock(&HalpBusHandlerSpinLock,
+		     OldIrql);
+
+   return NULL;
+}
+
+
+VOID FASTCALL
+HaliDereferenceBusHandler(PBUS_HANDLER BusHandler)
+{
+   KIRQL OldIrql;
+
+   KeAcquireSpinLock(&HalpBusHandlerSpinLock,
+		     &OldIrql);
+   BusHandler->RefCount--;
+   KeReleaseSpinLock(&HalpBusHandlerSpinLock,
+		     OldIrql);
+}
+
+
+NTSTATUS STDCALL
+HalAdjustResourceList(PCM_RESOURCE_LIST Resources)
+{
+   PBUS_HANDLER BusHandler;
+   NTSTATUS Status;
+
+   BusHandler = HaliReferenceHandlerForBus(Resources->List[0].InterfaceType,
+					   Resources->List[0].BusNumber);
+   if (BusHandler == NULL)
+     return STATUS_SUCCESS;
+
+   Status = BusHandler->AdjustResourceList(BusHandler,
+					   Resources->List[0].BusNumber,
+					   Resources);
+   HaliDereferenceBusHandler (BusHandler);
+
+   return Status;
+}
+
+
+NTSTATUS STDCALL
+HalAssignSlotResources(PUNICODE_STRING RegistryPath,
+		       PUNICODE_STRING DriverClassName,
+		       PDRIVER_OBJECT DriverObject,
+		       PDEVICE_OBJECT DeviceObject,
+		       INTERFACE_TYPE BusType,
+		       ULONG BusNumber,
+		       ULONG SlotNumber,
+		       PCM_RESOURCE_LIST *AllocatedResources)
+{
+   PBUS_HANDLER BusHandler;
+   NTSTATUS Status;
+
+   BusHandler = HaliReferenceHandlerForBus(BusType,
+					   BusNumber);
+   if (BusHandler == NULL)
+     return STATUS_NOT_FOUND;
+
+   Status = BusHandler->AssignSlotResources(BusHandler,
+					    BusNumber,
+					    RegistryPath,
+					    DriverClassName,
+					    DriverObject,
+					    DeviceObject,
+					    SlotNumber,
+					    AllocatedResources);
+
+   HaliDereferenceBusHandler(BusHandler);
+
+   return Status;
+}
+
+
+ULONG STDCALL
+HalGetBusData(BUS_DATA_TYPE BusDataType,
+	      ULONG BusNumber,
+	      ULONG SlotNumber,
+	      PVOID Buffer,
+	      ULONG Length)
+{
+   return (HalGetBusDataByOffset(BusDataType,
+				 BusNumber,
+				 SlotNumber,
+				 Buffer,
+				 0,
+				 Length));
+}
+
+
+ULONG STDCALL
+HalGetBusDataByOffset(BUS_DATA_TYPE BusDataType,
+		      ULONG BusNumber,
+		      ULONG SlotNumber,
+		      PVOID Buffer,
+		      ULONG Offset,
+		      ULONG Length)
+{
+   PBUS_HANDLER BusHandler;
+   ULONG Result;
+
+   BusHandler = HaliReferenceHandlerForConfigSpace(BusDataType,
+						   BusNumber);
+   if (BusHandler == NULL)
+     return 0;
+
+   Result = BusHandler->GetBusData(BusHandler,
+				   BusNumber,
+				   SlotNumber,
+				   Buffer,
+				   Offset,
+				   Length);
+
+   HaliDereferenceBusHandler (BusHandler);
+
+   return Result;
+}
+
+
+ULONG STDCALL
+HalGetInterruptVector(INTERFACE_TYPE InterfaceType,
+		      ULONG BusNumber,
+		      ULONG BusInterruptLevel,
+		      ULONG BusInterruptVector,
+		      PKIRQL Irql,
+		      PKAFFINITY Affinity)
+{
+   PBUS_HANDLER BusHandler;
+   ULONG Result;
+
+   BusHandler = HaliReferenceHandlerForBus(InterfaceType,
+					   BusNumber);
+   if (BusHandler == NULL)
+     return 0;
+
+   Result = BusHandler->GetInterruptVector(BusHandler,
+					   BusNumber,
+					   BusInterruptLevel,
+					   BusInterruptVector,
+					   Irql,
+					   Affinity);
+
+   HaliDereferenceBusHandler(BusHandler);
+
+   return Result;
+}
+
+
+ULONG STDCALL
+HalSetBusData(BUS_DATA_TYPE BusDataType,
+	      ULONG BusNumber,
+	      ULONG SlotNumber,
+	      PVOID Buffer,
+	      ULONG Length)
+{
+   return (HalSetBusDataByOffset(BusDataType,
+				 BusNumber,
+				 SlotNumber,
+				 Buffer,
+				 0,
+				 Length));
+}
+
+
+ULONG STDCALL
+HalSetBusDataByOffset(BUS_DATA_TYPE BusDataType,
+		      ULONG BusNumber,
+		      ULONG SlotNumber,
+		      PVOID Buffer,
+		      ULONG Offset,
+		      ULONG Length)
+{
+   PBUS_HANDLER BusHandler;
+   ULONG Result;
+
+   BusHandler = HaliReferenceHandlerForConfigSpace(BusDataType,
+						   BusNumber);
+   if (BusHandler == NULL)
+     return 0;
+
+   Result = BusHandler->SetBusData(BusHandler,
+				   BusNumber,
+				   SlotNumber,
+				   Buffer,
+				   Offset,
+				   Length);
+
+   HaliDereferenceBusHandler(BusHandler);
+
+   return Result;
+}
+
+
+BOOLEAN STDCALL
+HalTranslateBusAddress(INTERFACE_TYPE InterfaceType,
+		       ULONG BusNumber,
+		       PHYSICAL_ADDRESS BusAddress,
+		       PULONG AddressSpace,
+		       PPHYSICAL_ADDRESS TranslatedAddress)
+{
+   PBUS_HANDLER BusHandler;
+   BOOLEAN Result;
+
+   BusHandler = HaliReferenceHandlerForBus(InterfaceType,
+					   BusNumber);
+   if (BusHandler == NULL)
+     return FALSE;
+
+   Result = BusHandler->TranslateBusAddress(BusHandler,
+					    BusNumber,
+					    BusAddress,
+					    AddressSpace,
+					    TranslatedAddress);
+
+   HaliDereferenceBusHandler(BusHandler);
+
+   return Result;
+}
+
+/* EOF */

reactos/hal/halx86/display.c

@@ -0,0 +1,293 @@
+/* $Id: display.c,v 1.1 2001/08/21 20:18:26 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/display.c
+ * PURPOSE:         Blue screen display
+ * PROGRAMMER:      Eric Kohl (ekohl@abo.rhein-zeitung.de)
+ * UPDATE HISTORY:
+ *                  Created 08/10/99
+ */
+
+#include <ddk/ntddk.h>
+#include <mps.h>
+
+#define SCREEN_SYNCHRONIZATION
+
+
+#define CRTC_COMMAND       0x3d4
+#define CRTC_DATA          0x3d5
+
+#define CRTC_COLUMNS       0x01
+#define CRTC_OVERFLOW      0x07
+#define CRTC_ROWS          0x12
+#define CRTC_SCANLINES     0x09
+
+#define CRTC_CURHI         0x0e
+#define CRTC_CURLO         0x0f
+
+
+#define CHAR_ATTRIBUTE     0x17  /* grey on blue */
+
+
+/* VARIABLES ****************************************************************/
+
+static ULONG CursorX = 0;      /* Cursor Position */
+static ULONG CursorY = 0;
+static ULONG SizeX = 80;       /* Display size */
+static ULONG SizeY = 25;
+
+static BOOLEAN DisplayInitialized = FALSE;
+static BOOLEAN HalOwnsDisplay = TRUE;
+
+static WORD *VideoBuffer = NULL;
+
+static PHAL_RESET_DISPLAY_PARAMETERS HalResetDisplayParameters = NULL;
+
+
+/* STATIC FUNCTIONS *********************************************************/
+
+static VOID
+HalClearDisplay (VOID)
+{
+    WORD *ptr = (WORD*)VideoBuffer;
+    ULONG i;
+
+    for (i = 0; i < SizeX * SizeY; i++, ptr++)
+        *ptr = ((CHAR_ATTRIBUTE << 8) + ' ');
+
+    CursorX = 0;
+    CursorY = 0;
+}
+
+
+VOID
+HalScrollDisplay (VOID)
+{
+   WORD *ptr;
+   int i;
+
+   ptr = VideoBuffer + SizeX;
+   RtlMoveMemory (VideoBuffer,
+           ptr,
+           SizeX * (SizeY - 1) * 2);
+
+   ptr = VideoBuffer  + (SizeX * (SizeY - 1));
+   for (i = 0; i < SizeX; i++, ptr++)
+   {
+       *ptr = (CHAR_ATTRIBUTE << 8) + ' ';
+   }
+}
+
+
+static VOID
+HalPutCharacter (CHAR Character)
+{
+   WORD *ptr;
+
+   ptr = VideoBuffer + ((CursorY * SizeX) + CursorX);
+   *ptr = (CHAR_ATTRIBUTE << 8) + Character;
+}
+
+
+/* PRIVATE FUNCTIONS ********************************************************/
+
+VOID
+HalInitializeDisplay (PLOADER_PARAMETER_BLOCK LoaderBlock)
+/*
+ * FUNCTION: Initalize the display
+ * ARGUMENTS:
+ *         InitParameters = Parameters setup by the boot loader
+ */
+{
+    if (DisplayInitialized == FALSE)
+    {
+        ULONG ScanLines;
+        ULONG Data;
+
+        VideoBuffer = (WORD *)(0xd0000000 + 0xb8000);
+//        VideoBuffer = HalMapPhysicalMemory (0xb8000, 2);
+
+        /* Set cursor position */
+//        CursorX = LoaderBlock->cursorx;
+//        CursorY = LoaderBlock->cursory;
+        CursorX = 0;
+        CursorY = 0;
+
+        /* read screen size from the crtc */
+        /* FIXME: screen size should be read from the boot parameters */
+        WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_COLUMNS);
+        SizeX = READ_PORT_UCHAR((PUCHAR)CRTC_DATA) + 1;
+        WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_ROWS);
+        SizeY = READ_PORT_UCHAR((PUCHAR)CRTC_DATA);
+        WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_OVERFLOW);
+        Data = READ_PORT_UCHAR((PUCHAR)CRTC_DATA);
+        SizeY |= (((Data & 0x02) << 7) | ((Data & 0x40) << 3));
+        SizeY++;
+        WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_SCANLINES);
+        ScanLines = (READ_PORT_UCHAR((PUCHAR)CRTC_DATA) & 0x1F) + 1;
+        SizeY = SizeY / ScanLines;
+
+#ifdef BOCHS_30ROWS
+SizeY=30;
+#endif
+        HalClearDisplay ();
+
+        DisplayInitialized = TRUE;
+    }
+}
+
+
+VOID
+HalResetDisplay (VOID)
+/*
+ * FUNCTION: Reset the display
+ * ARGUMENTS:
+ *         None
+ */
+{
+    if (HalResetDisplayParameters == NULL)
+        return;
+
+    if (HalOwnsDisplay == TRUE)
+        return;
+
+    if (HalResetDisplayParameters(SizeX, SizeY) == TRUE)
+    {
+        HalOwnsDisplay = TRUE;
+        HalClearDisplay ();
+    }
+}
+
+
+/* PUBLIC FUNCTIONS *********************************************************/
+
+VOID
+STDCALL
+HalAcquireDisplayOwnership (
+	IN	PHAL_RESET_DISPLAY_PARAMETERS	ResetDisplayParameters
+	)
+/*
+ * FUNCTION: 
+ * ARGUMENTS:
+ *         ResetDisplayParameters = Pointer to a driver specific
+ *         reset routine.
+ */
+{
+    HalOwnsDisplay = FALSE;
+    HalResetDisplayParameters = ResetDisplayParameters;
+}
+
+
+VOID STDCALL
+HalDisplayString (IN	PCH	String)
+/*
+ * FUNCTION: Switches the screen to HAL console mode (BSOD) if not there
+ * already and displays a string
+ * ARGUMENT:
+ *        string = ASCII string to display
+ * NOTE: Use with care because there is no support for returning from BSOD
+ * mode
+ */
+{
+  PCH pch;
+#ifdef SCREEN_SYNCHRONIZATION
+  int offset;
+#endif
+  static KSPIN_LOCK Lock;
+  ULONG Flags;
+
+  pch = String;
+
+  pushfl(Flags);
+  __asm__ ("cli\n\t");
+  KeAcquireSpinLockAtDpcLevel(&Lock);
+  
+  if (HalOwnsDisplay == FALSE)
+    {
+      HalResetDisplay ();
+    }
+  
+#ifdef SCREEN_SYNCHRONIZATION
+  WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURHI);
+  offset = READ_PORT_UCHAR((PUCHAR)CRTC_DATA)<<8;
+  WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURLO);
+  offset += READ_PORT_UCHAR((PUCHAR)CRTC_DATA);
+  
+  CursorY = offset / SizeX;
+  CursorX = offset % SizeX;
+#endif
+  
+  while (*pch != 0)
+    {
+      if (*pch == '\n')
+        {
+	  CursorY++;
+	  CursorX = 0;
+        }
+      else
+        {
+	  HalPutCharacter (*pch);
+	  CursorX++;
+	  
+	  if (CursorX >= SizeX)
+            {
+	      CursorY++;
+	      CursorX = 0;
+            }
+        }
+      
+      if (CursorY >= SizeY)
+        {
+	  HalScrollDisplay ();
+	  CursorY = SizeY - 1;
+        }
+      
+      pch++;
+    }
+  
+#ifdef SCREEN_SYNCHRONIZATION
+  offset = (CursorY * SizeX) + CursorX;
+  
+  WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURLO);
+  WRITE_PORT_UCHAR((PUCHAR)CRTC_DATA, offset & 0xff);
+  WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURHI);
+  WRITE_PORT_UCHAR((PUCHAR)CRTC_DATA, (offset >> 8) & 0xff);
+#endif
+  KeReleaseSpinLockFromDpcLevel(&Lock);
+  popfl(Flags);
+}
+
+
+VOID
+STDCALL
+HalQueryDisplayParameters (
+	PULONG	DispSizeX,
+	PULONG	DispSizeY,
+	PULONG	CursorPosX,
+	PULONG	CursorPosY
+	)
+{
+    if (DispSizeX)
+        *DispSizeX = SizeX;
+    if (DispSizeY)
+        *DispSizeY = SizeY;
+    if (CursorPosX)
+        *CursorPosX = CursorX;
+    if (CursorPosY)
+        *CursorPosY = CursorY;
+}
+
+
+VOID
+STDCALL
+HalSetDisplayParameters (
+	ULONG	CursorPosX,
+	ULONG	CursorPosY
+	)
+{
+	CursorX = (CursorPosX < SizeX) ? CursorPosX : SizeX - 1;
+	CursorY = (CursorPosY < SizeY) ? CursorPosY : SizeY - 1;
+}
+
+/* EOF */

reactos/hal/halx86/dma.c

@@ -0,0 +1,115 @@
+/* $Id: dma.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/dma.c
+ * PURPOSE:         DMA functions
+ * PROGRAMMER:      David Welch (welch@mcmail.com)
+ * UPDATE HISTORY:
+ *                  Created 22/05/98
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+
+#include <internal/debug.h>
+#include <hal.h>
+
+ADAPTER_OBJECT AdapterObjects[] = {
+  { 0, (PVOID)0x87, (PVOID)0x1, (PVOID)0x0, { 0 }, NULL },
+  { 1, (PVOID)0x83, (PVOID)0x3, (PVOID)0x2, { 0 }, NULL },
+  { 2, (PVOID)0x81, (PVOID)0x5, (PVOID)0x4, { 0 }, NULL },
+  { 3, (PVOID)0x82, (PVOID)0x7, (PVOID)0x6, { 0 }, NULL } };
+
+
+/* FUNCTIONS *****************************************************************/
+
+PVOID STDCALL
+HalAllocateCommonBuffer (PADAPTER_OBJECT		AdapterObject,
+			 ULONG			Length,
+			 PPHYSICAL_ADDRESS	LogicalAddress,
+			 BOOLEAN			CacheEnabled)
+/*
+ * FUNCTION: Allocates memory that is visible to both the processor(s) and
+ * a dma device
+ * ARGUMENTS: 
+ *         AdapterObject = Adapter object representing the bus master or
+ *                         system dma controller
+ *         Length = Number of bytes to allocate
+ *         LogicalAddress = Logical address the driver can use to access the
+ *                          buffer 
+ *         CacheEnabled = Specifies if the memory can be cached
+ * RETURNS: The base virtual address of the memory allocated
+ *          NULL on failure
+ */
+{
+   UNIMPLEMENTED;
+}
+
+BOOLEAN STDCALL
+HalFlushCommonBuffer (ULONG	Unknown1,
+		      ULONG	Unknown2,
+		      ULONG	Unknown3,
+		      ULONG	Unknown4,
+		      ULONG	Unknown5,
+		      ULONG	Unknown6,
+		      ULONG	Unknown7,
+		      ULONG	Unknown8)
+{
+   return TRUE;
+}
+
+VOID STDCALL
+HalFreeCommonBuffer (PADAPTER_OBJECT		AdapterObject,
+		     ULONG			Length,
+		     PHYSICAL_ADDRESS	LogicalAddress,
+		     PVOID			VirtualAddress,
+		     BOOLEAN			CacheEnabled)
+{
+   MmFreeContiguousMemory(VirtualAddress);
+}
+
+PADAPTER_OBJECT STDCALL
+HalGetAdapter (PDEVICE_DESCRIPTION	DeviceDescription,
+	       PULONG			NumberOfMapRegisters)
+/*
+ * FUNCTION: Returns a pointer to an adapter object for the DMA device 
+ * defined in the device description structure
+ * ARGUMENTS:
+ *        DeviceDescription = Structure describing the attributes of the device
+ *        NumberOfMapRegisters (OUT) = Returns the maximum number of map
+ *                                     registers the device driver can
+ *                                     allocate for DMA transfer operations
+ * RETURNS: The allocated adapter object on success
+ *          NULL on failure
+ */
+{
+  /* Validate parameters in device description, and return a pointer to
+     the adapter object for the requested dma channel */
+  if( DeviceDescription->Version != DEVICE_DESCRIPTION_VERSION )
+    return NULL;
+  if( DeviceDescription->Master )
+    return NULL;
+  if( DeviceDescription->ScatterGather )
+    return NULL;
+  if( DeviceDescription->AutoInitialize )
+    return NULL;
+  if( DeviceDescription->Dma32BitAddress )
+    return NULL;
+  if( DeviceDescription->InterfaceType != Isa )
+     return NULL;
+  /*  if( DeviceDescription->DmaWidth != Width8Bits )
+      return NULL;*/
+  *NumberOfMapRegisters = 0x10;
+  AdapterObjects[DeviceDescription->DmaChannel].Buffer = 0;
+  return &AdapterObjects[DeviceDescription->DmaChannel];
+}
+
+ULONG STDCALL
+HalReadDmaCounter (PADAPTER_OBJECT	AdapterObject)
+{
+   UNIMPLEMENTED;
+}
+
+/* EOF */

reactos/hal/halx86/drive.c

@@ -0,0 +1,31 @@
+/* $Id: drive.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            hal/x86/drive.c
+ * PURPOSE:         Drive letter assignment
+ * PROGRAMMER:      
+ * UPDATE HISTORY:
+ *	2000-03-25
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+#include <internal/debug.h>
+
+/* FUNCTIONS *****************************************************************/
+
+VOID STDCALL
+IoAssignDriveLetters(IN PLOADER_PARAMETER_BLOCK LoaderBlock,
+		     IN PSTRING NtDeviceName,
+		     OUT PUCHAR NtSystemPath,
+		     OUT PSTRING NtSystemPathString)
+{
+   HalDispatchTable.HalIoAssignDriveLetters(LoaderBlock,
+					     NtDeviceName,
+					     NtSystemPath,
+					     NtSystemPathString);
+}
+
+/* EOF */

reactos/hal/halx86/enum.c

@@ -0,0 +1,34 @@
+/* $Id: enum.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/enum.c
+ * PURPOSE:         Motherboard device enumerator
+ * PROGRAMMER:      Casper S. Hornstrup (chorns@users.sourceforge.net)
+ * UPDATE HISTORY:
+ *                  Created 01/05/2001
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+#include <roscfg.h>
+
+#define NDEBUG
+#include <internal/debug.h>
+
+VOID
+HalpStartEnumerator (VOID)
+{
+#ifdef ACPI
+
+  UNICODE_STRING DriverName;
+
+  RtlInitUnicodeString(&DriverName,
+    L"\\SystemRoot\\system32\\drivers\\acpi.sys");
+  NtLoadDriver(&DriverName);
+
+#endif /* ACPI */
+}
+
+/* EOF */

reactos/hal/halx86/fmutex.c

@@ -0,0 +1,60 @@
+/* $Id: fmutex.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/fmutex.c
+ * PURPOSE:         Implements fast mutexes
+ * PROGRAMMER:      David Welch (welch@cwcom.net)
+ *                  Eric Kohl (ekohl@rz-online.de)
+ * UPDATE HISTORY:
+ *                  Created 09/06/2000
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+
+#include <internal/debug.h>
+
+/* FUNCTIONS *****************************************************************/
+
+VOID FASTCALL
+ExAcquireFastMutex (PFAST_MUTEX	FastMutex)
+{
+   KeEnterCriticalRegion();
+   if (InterlockedDecrement(&(FastMutex->Count))==0)
+     {
+	return;
+     }
+   FastMutex->Contention++;
+   KeWaitForSingleObject(&(FastMutex->Event),
+			 Executive,
+			 KernelMode,
+			 FALSE,
+			 NULL);
+   FastMutex->Owner=KeGetCurrentThread();
+}
+
+
+VOID FASTCALL
+ExReleaseFastMutex (PFAST_MUTEX	FastMutex)
+{
+   assert(FastMutex->Owner == KeGetCurrentThread());
+   FastMutex->Owner=NULL;
+   if (InterlockedIncrement(&(FastMutex->Count))<=0)
+     {
+	return;
+     }
+   KeSetEvent(&(FastMutex->Event),0,FALSE);
+
+   KeLeaveCriticalRegion();
+}
+
+
+BOOLEAN FASTCALL
+ExTryToAcquireFastMutex (PFAST_MUTEX	FastMutex)
+{
+   UNIMPLEMENTED;
+}
+
+/* EOF */

reactos/hal/halx86/halinit.c

@@ -0,0 +1,71 @@
+/* $Id: halinit.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:     See COPYING in the top level directory
+ * PROJECT:       ReactOS kernel
+ * FILE:          ntoskrnl/hal/x86/halinit.c
+ * PURPOSE:       Initalize the x86 hal
+ * PROGRAMMER:    David Welch (welch@cwcom.net)
+ * UPDATE HISTORY:
+ *              11/06/98: Created
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+#include <roscfg.h>
+#include <hal.h>
+#include <internal/ntoskrnl.h>
+
+#ifdef MP
+#include <mps.h>
+#endif /* MP */
+
+#define NDEBUG
+#include <internal/debug.h>
+
+/* FUNCTIONS ***************************************************************/
+
+NTSTATUS
+STDCALL
+DriverEntry(
+    PDRIVER_OBJECT DriverObject,
+    PUNICODE_STRING RegistryPath)
+{
+	return STATUS_SUCCESS;
+}
+
+BOOLEAN STDCALL
+HalInitSystem (ULONG BootPhase,
+               PLOADER_PARAMETER_BLOCK LoaderBlock)
+{
+  if (BootPhase == 0)
+    {
+      HalInitializeDisplay (LoaderBlock);
+      
+#ifdef MP
+      
+      HalpInitMPS();
+      
+#else
+
+      HalpInitPICs();
+
+      /* Setup busy waiting */
+      HalpCalibrateStallExecution();
+
+#endif /* MP */
+
+    }
+  else if (BootPhase == 1)
+    {
+      HalpInitBusHandlers ();
+  	  HalpCalibrateStallExecution ();
+
+      /* Enumerate the devices on the motherboard */
+      HalpStartEnumerator();
+   }
+
+  return TRUE;
+}
+
+/* EOF */

reactos/hal/halx86/halx86mp.rc

@@ -0,0 +1,37 @@
+#include <defines.h>
+#include <reactos/resource.h>
+
+LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_US
+
+VS_VERSION_INFO VERSIONINFO
+	FILEVERSION	RES_UINT_FV_MAJOR,RES_UINT_FV_MINOR,RES_UINT_FV_REVISION,RES_UINT_FV_BUILD
+	PRODUCTVERSION	RES_UINT_PV_MAJOR,RES_UINT_PV_MINOR,RES_UINT_PV_REVISION,RES_UINT_PV_BUILD
+	FILEFLAGSMASK	0x3fL
+#ifdef _DEBUG
+	FILEFLAGS	0x1L
+#else
+	FILEFLAGS	0x0L
+#endif
+	FILEOS		0x40004L
+	FILETYPE	0x2L
+	FILESUBTYPE	0x0L
+BEGIN
+    BLOCK "StringFileInfo"
+    BEGIN
+        BLOCK "040904b0"
+        BEGIN
+            VALUE "CompanyName",	  RES_STR_COMPANY_NAME
+            VALUE "FileDescription",  "X86 Multiprocessor Hardware Abstraction Layer\0"
+            VALUE "FileVersion",	  "0.0.0\0"
+            VALUE "InternalName",	  "halx86mp\0"
+            VALUE "LegalCopyright",	  RES_STR_LEGAL_COPYRIGHT
+            VALUE "OriginalFilename", "halx86mp.dll\0"
+            VALUE "ProductName",	  RES_STR_PRODUCT_NAME
+            VALUE "ProductVersion",	  RES_STR_PRODUCT_VERSION
+        END
+    END
+    BLOCK "VarFileInfo"
+    BEGIN
+        VALUE "Translation", 0x409, 1200
+    END
+END

reactos/hal/halx86/halx86up.rc

@@ -0,0 +1,37 @@
+#include <defines.h>
+#include <reactos/resource.h>
+
+LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_US
+
+VS_VERSION_INFO VERSIONINFO
+	FILEVERSION	RES_UINT_FV_MAJOR,RES_UINT_FV_MINOR,RES_UINT_FV_REVISION,RES_UINT_FV_BUILD
+	PRODUCTVERSION	RES_UINT_PV_MAJOR,RES_UINT_PV_MINOR,RES_UINT_PV_REVISION,RES_UINT_PV_BUILD
+	FILEFLAGSMASK	0x3fL
+#ifdef _DEBUG
+	FILEFLAGS	0x1L
+#else
+	FILEFLAGS	0x0L
+#endif
+	FILEOS		0x40004L
+	FILETYPE	0x2L
+	FILESUBTYPE	0x0L
+BEGIN
+    BLOCK "StringFileInfo"
+    BEGIN
+        BLOCK "040904b0"
+        BEGIN
+            VALUE "CompanyName",	  RES_STR_COMPANY_NAME
+            VALUE "FileDescription",  "X86 Uniprocessor Hardware Abstraction Layer\0"
+            VALUE "FileVersion",	  "0.0.0\0"
+            VALUE "InternalName",	  "halx86up\0"
+            VALUE "LegalCopyright",	  RES_STR_LEGAL_COPYRIGHT
+            VALUE "OriginalFilename", "halx86up.dll\0"
+            VALUE "ProductName",	  RES_STR_PRODUCT_NAME
+            VALUE "ProductVersion",	  RES_STR_PRODUCT_VERSION
+        END
+    END
+    BLOCK "VarFileInfo"
+    BEGIN
+        VALUE "Translation", 0x409, 1200
+    END
+END

reactos/hal/halx86/include/bus.h

@@ -0,0 +1,121 @@
+/*
+
+ */
+
+#ifndef __INTERNAL_HAL_BUS_H
+#define __INTERNAL_HAL_BUS_H
+
+struct _BUS_HANDLER;
+
+typedef NTSTATUS (STDCALL *pAdjustResourceList) (
+	IN struct _BUS_HANDLER *BusHandler,
+	IN ULONG BusNumber,
+	IN OUT PCM_RESOURCE_LIST Resources
+	);
+
+typedef NTSTATUS (STDCALL *pAssignSlotResources) (
+	IN struct _BUS_HANDLER *BusHandler,
+	IN ULONG BusNumber,
+	IN PUNICODE_STRING RegistryPath,
+	IN PUNICODE_STRING DriverClassName,
+	IN PDRIVER_OBJECT DriverObject,
+	IN PDEVICE_OBJECT DeviceObject,
+	IN ULONG SlotNumber,
+	IN OUT PCM_RESOURCE_LIST *AllocatedResources
+	);
+
+typedef ULONG (STDCALL *pGetSetBusData) (
+	IN struct _BUS_HANDLER *BusHandler,
+	IN ULONG BusNumber,
+	IN ULONG SlotNumber,
+	OUT PVOID Buffer,
+	IN ULONG Offset,
+	IN ULONG Length
+	);
+
+typedef ULONG (STDCALL *pGetInterruptVector) (
+	IN struct _BUS_HANDLER *BusHandler,
+	IN ULONG BusNumber,
+	IN ULONG BusInterruptLevel,
+	IN ULONG BusInterruptVector,
+	OUT PKIRQL Irql,
+	OUT PKAFFINITY Affinity
+	);
+
+typedef ULONG (STDCALL *pTranslateBusAddress) (
+	IN struct _BUS_HANDLER *BusHandler,
+	IN ULONG BusNumber,
+	IN PHYSICAL_ADDRESS BusAddress,
+	IN OUT PULONG AddressSpace,
+	OUT PPHYSICAL_ADDRESS TranslatedAddress
+	);
+
+typedef struct _BUS_HANDLER
+{
+   LIST_ENTRY Entry;
+   INTERFACE_TYPE InterfaceType;
+   BUS_DATA_TYPE BusDataType;
+   ULONG BusNumber;
+   ULONG RefCount;
+
+   pGetSetBusData	GetBusData;
+   pGetSetBusData	SetBusData;
+   pAdjustResourceList	AdjustResourceList;
+   pAssignSlotResources	AssignSlotResources;
+   pGetInterruptVector	GetInterruptVector;
+   pTranslateBusAddress	TranslateBusAddress;
+} BUS_HANDLER, *PBUS_HANDLER;
+
+
+/* FUNCTIONS *****************************************************************/
+
+/* bus.c */
+PBUS_HANDLER
+HalpAllocateBusHandler(INTERFACE_TYPE InterfaceType,
+		       BUS_DATA_TYPE BusDataType,
+		       ULONG BusNumber);
+
+/* sysbus.h */
+ULONG STDCALL
+HalpGetSystemInterruptVector(PVOID BusHandler,
+			     ULONG BusNumber,
+			     ULONG BusInterruptLevel,
+			     ULONG BusInterruptVector,
+			     PKIRQL Irql,
+			     PKAFFINITY Affinity);
+
+BOOLEAN STDCALL
+HalpTranslateSystemBusAddress(PBUS_HANDLER BusHandler,
+			      ULONG BusNumber,
+			      PHYSICAL_ADDRESS BusAddress,
+			      PULONG AddressSpace,
+			      PPHYSICAL_ADDRESS TranslatedAddress);
+
+/* isa.c */
+BOOLEAN STDCALL
+HalpTranslateIsaBusAddress(PBUS_HANDLER BusHandler,
+			   ULONG BusNumber,
+			   PHYSICAL_ADDRESS BusAddress,
+			   PULONG AddressSpace,
+			   PPHYSICAL_ADDRESS TranslatedAddress);
+
+/* time.c */
+ULONG STDCALL
+HalpGetCmosData(PBUS_HANDLER BusHandler,
+		ULONG BusNumber,
+		ULONG SlotNumber,
+		PVOID Buffer,
+		ULONG Offset,
+		ULONG Length);
+
+ULONG STDCALL
+HalpSetCmosData(PBUS_HANDLER BusHandler,
+		ULONG BusNumber,
+		ULONG SlotNumber,
+		PVOID Buffer,
+		ULONG Offset,
+		ULONG Length);
+
+#endif /* __INTERNAL_HAL_BUS_H */
+
+/* EOF */

reactos/hal/halx86/include/hal.h

@@ -0,0 +1,48 @@
+/*
+ * 
+ */
+
+#ifndef __INTERNAL_HAL_HAL_H
+#define __INTERNAL_HAL_HAL_H
+
+//#include <ddk/service.h>
+//#include <internal/ntoskrnl.h>
+
+/*
+ * FUNCTION: Probes for a BIOS32 extension
+ */
+VOID Hal_bios32_probe(VOID);
+
+/*
+ * FUNCTION: Determines if a a bios32 service is present
+ */
+BOOLEAN Hal_bios32_is_service_present(ULONG service);
+
+VOID HalInitializeDisplay (PLOADER_PARAMETER_BLOCK LoaderBlock);
+VOID HalResetDisplay (VOID);
+
+VOID HalpInitBusHandlers (VOID);
+
+/* irql.c */
+VOID HalpInitPICs(VOID);
+
+/* udelay.c */
+VOID HalpCalibrateStallExecution(VOID);
+
+/* pci.c */
+VOID HalpInitPciBus (VOID);
+
+/* enum.c */
+VOID HalpStartEnumerator (VOID);
+
+struct _ADAPTER_OBJECT {
+  int Channel;
+  PVOID PagePort;
+  PVOID CountPort;
+  PVOID OffsetPort;
+  KSPIN_LOCK SpinLock;
+  PVOID Buffer;
+  BOOLEAN Inuse;
+};
+
+#endif /* __INTERNAL_HAL_HAL_H */

reactos/hal/halx86/include/mps.h

@@ -0,0 +1,435 @@
+#ifndef __INCLUDE_HAL_MPS
+#define __INCLUDE_HAL_MPS
+
+#define APIC_DEFAULT_BASE     0xFEE00000    /* Default Local APIC Base Register Address */
+#define IOAPIC_DEFAULT_BASE   0xFEC00000    /* Default I/O APIC Base Register Address */
+
+/* APIC Register Address Map */
+#define APIC_ID      0x0020 /* Local APIC ID Register (R/W) */
+#define APIC_VER     0x0030 /* Local APIC Version Register (R) */
+#define APIC_TPR     0x0080 /* Task Priority Register (R/W) */
+#define APIC_APR     0x0090 /* Arbitration Priority Register (R) */
+#define APIC_PPR     0x00A0 /* Processor Priority Register (R) */
+#define APIC_EOI     0x00B0 /* EOI Register (W) */
+#define APIC_LDR     0x00D0 /* Logical Destination Register (R/W) */
+#define APIC_DFR     0x00E0 /* Destination Format Register (0-27 R, 28-31 R/W) */
+#define APIC_SIVR    0x00F0 /* Spurious Interrupt Vector Register (0-3 R, 4-9 R/W) */
+#define APIC_ISR     0x0100 /* Interrupt Service Register 0-255 (R) */
+#define APIC_TMR     0x0180 /* Trigger Mode Register 0-255 (R) */
+#define APIC_IRR     0x0200 /* Interrupt Request Register 0-255 (r) */
+#define APIC_ESR     0x0280 /* Error Status Register (R) */
+#define APIC_ICR0    0x0300 /* Interrupt Command Register 0-31 (R/W) */
+#define APIC_ICR1    0x0310 /* Interrupt Command Register 32-63 (R/W) */
+#define APIC_LVTT    0x0320 /* Local Vector Table (Timer) (R/W) */
+#define APIC_LVTPC   0x0340 /* Performance Counter LVT (R/W) */
+#define APIC_LINT0   0x0350 /* Local Vector Table (LINT0) (R/W) */
+#define APIC_LINT1   0x0360 /* Local Vector Table (LINT1) (R/W) */
+#define APIC_LVT3    0x0370 /* Local Vector Table (Error) (R/W) */
+#define APIC_ICRT    0x0380 /* Initial Count Register for Timer (R/W) */
+#define APIC_CCRT    0x0390 /* Current Count Register for Timer (R) */
+#define APIC_TDCR    0x03E0 /* Timer Divide Configuration Register (R/W) */
+
+#define APIC_ID_MASK       (0xF << 24)
+#define GET_APIC_ID(x)	   (((x) & APIC_ID_MASK) >> 24)
+#define APIC_VER_MASK      0xFF00FF
+#define GET_APIC_VERSION(x)((x) & 0xFF)
+#define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFF)
+
+#define APIC_TPR_PRI       0xFF
+#define APIC_TPR_INT       0xF0
+#define APIC_TPR_SUB       0xF
+#define APIC_TPR_MAX       0xFF           /* Maximum priority */
+#define APIC_TPR_MIN       0x20           /* Minimum priority */
+
+#define APIC_LDR_MASK      (0xFF << 24)
+
+#define APIC_SIVR_ENABLE   (0x1 << 8)
+#define APIC_SIVR_FOCUS    (0x1 << 9)
+
+#define APIC_ESR_MASK      (0xFE << 0)    /* Error Mask */
+
+#define APIC_ICR0_VECTOR   (0xFF << 0)    /* Vector */
+#define APIC_ICR0_DM       (0x7 << 8)     /* Delivery Mode */
+#define APIC_ICR0_DESTM    (0x1 << 11)    /* Destination Mode */
+#define APIC_ICR0_DS       (0x1 << 12)    /* Delivery Status */
+#define APIC_ICR0_LEVEL    (0x1 << 14)    /* Level */
+#define APIC_ICR0_TM       (0x1 << 15)    /* Trigger Mode */
+#define APIC_ICR0_DESTS    (0x3 << 18)    /* Destination Shorthand */
+
+/* Delivery Modes */
+#define APIC_DM_FIXED		  (0x0 << 8)
+#define APIC_DM_LOWEST  	(0x1 << 8)
+#define APIC_DM_SMI		    (0x2 << 8)
+#define APIC_DM_REMRD		  (0x3 << 8)
+#define APIC_DM_NMI		    (0x4 << 8)
+#define APIC_DM_INIT      (0x5 << 8)
+#define APIC_DM_STARTUP   (0x6 << 8)
+#define APIC_DM_EXTINT	  (0x7 << 8)
+#define GET_APIC_DELIVERY_MODE(x)	(((x) >> 8) & 0x7)
+#define SET_APIC_DELIVERY_MODE(x,y)	(((x) & ~0x700) | ((y) << 8))
+
+/* Destination Shorthand values */
+#define APIC_ICR0_DESTS_FIELD          (0x0 << 0)
+#define APIC_ICR0_DESTS_SELF           (0x1 << 18)
+#define APIC_ICR0_DESTS_ALL            (0x2 << 18)
+#define APIC_ICR0_DESTS_ALL_BUT_SELF   (0x3 << 18)
+
+#define APIC_ICR0_LEVEL_DEASSERT (0x0 << 14) /* Deassert level */
+#define APIC_ICR0_LEVEL_ASSERT   (0x1 << 14) /* Assert level */
+
+#define GET_APIC_DEST_FIELD(x)   (((x) >> 24) & 0xFF)
+#define SET_APIC_DEST_FIELD(x)   (((x) & 0xFF) << 24)
+
+#define GET_APIC_TIMER_BASE(x)   (((x) >> 18) & 0x3)
+#define SET_APIC_TIMER_BASE(x)   ((x) << 18)
+#define APIC_TIMER_BASE_CLKIN    0x0
+#define APIC_TIMER_BASE_TMBASE   0x1
+#define APIC_TIMER_BASE_DIV      0x2
+
+#define APIC_LVT_VECTOR   		  (0xFF << 0)   /* Vector */
+#define APIC_LVT_DS       		  (0x1 << 12)   /* Delivery Status */
+#define APIC_LVT_REMOTE_IRR		  (0x1 << 14)		/* Remote IRR */
+#define APIC_LVT_LEVEL_TRIGGER	(0x1 << 15)		/* Lvel Triggered */
+#define APIC_LVT_MASKED   	    (0x1 << 16)   /* Mask */
+#define APIC_LVT_PERIODIC 	  	(0x1 << 17)   /* Timer Mode */
+
+#define APIC_LVT3_DM        (0x7 << 8)
+#define APIC_LVT3_IIPP      (0x1 << 13)
+#define APIC_LVT3_TM        (0x1 << 15)
+#define APIC_LVT3_MASKED    (0x1 << 16)
+#define APIC_LVT3_OS        (0x1 << 17)
+
+#define APIC_TDCR_TMBASE   (0x1 << 2)
+#define APIC_TDCR_MASK     0x0F
+#define APIC_TDCR_2        0x00
+#define APIC_TDCR_4        0x01
+#define APIC_TDCR_8        0x02
+#define APIC_TDCR_16       0x03
+#define APIC_TDCR_32       0x08
+#define APIC_TDCR_64       0x09
+#define APIC_TDCR_128      0x0A
+#define APIC_TDCR_1        0x0B
+
+#define APIC_TARGET_SELF         0x100
+#define APIC_TARGET_ALL          0x200
+#define APIC_TARGET_ALL_BUT_SELF 0x300
+
+#define IPI_CACHE_FLUSH    0x40
+#define IPI_INV_TLB        0x41
+#define IPI_INV_PTE        0x42
+#define IPI_INV_RESCHED    0x43
+#define IPI_STOP           0x44
+
+
+#define APIC_INTEGRATED(version) (version & 0xF0)
+
+
+/* I/O APIC Register Address Map */
+#define IOAPIC_IOREGSEL 0x0000  /* I/O Register Select (index) (R/W) */
+#define IOAPIC_IOWIN    0x0010  /* I/O window (data) (R/W) */
+
+#define IOAPIC_ID       0x0000  /* IO APIC ID (R/W) */
+#define IOAPIC_VER      0x0001  /* IO APIC Version (R) */
+#define IOAPIC_ARB      0x0002  /* IO APIC Arbitration ID (R) */
+#define IOAPIC_REDTBL   0x0010  /* Redirection Table (0-23 64-bit registers) (R/W) */
+
+#define IOAPIC_ID_MASK        (0xF << 24)
+#define GET_IOAPIC_ID(x)	    (((x) & IOAPIC_ID_MASK) >> 24)
+#define SET_IOAPIC_ID(x)	    ((x) << 24)
+
+#define IOAPIC_VER_MASK       (0xFF)
+#define GET_IOAPIC_VERSION(x) (((x) & IOAPIC_VER_MASK))
+#define IOAPIC_MRE_MASK       (0xFF << 16)  /* Maximum Redirection Entry */
+#define GET_IOAPIC_MRE(x)     (((x) & IOAPIC_MRE_MASK) >> 16)
+
+#define IOAPIC_ARB_MASK       (0xF << 24)
+#define GET_IOAPIC_ARB(x)	    (((x) & IOAPIC_ARB_MASK) >> 24)
+
+#define IOAPIC_TBL_DELMOD   (0x7 << 10) /* Delivery Mode (see APIC_DM_*) */
+#define IOAPIC_TBL_DM       (0x1 << 11) /* Destination Mode */
+#define IOAPIC_TBL_DS       (0x1 << 12) /* Delivery Status */
+#define IOAPIC_TBL_INTPOL   (0x1 << 13) /* Interrupt Input Pin Polarity */
+#define IOAPIC_TBL_RIRR     (0x1 << 14) /* Remote IRR */
+#define IOAPIC_TBL_TM       (0x1 << 15) /* Trigger Mode */
+#define IOAPIC_TBL_IM       (0x1 << 16) /* Interrupt Mask */
+#define IOAPIC_TBL_DF0      (0xF << 56) /* Destination Field (physical mode) */
+#define IOAPIC_TBL_DF1      (0xFF<< 56) /* Destination Field (logical mode) */
+#define IOAPIC_TBL_VECTOR   (0xFF << 0) /* Vector (10h - FEh) */
+
+typedef struct _IOAPIC_ROUTE_ENTRY {
+	ULONG	vector		:  8,
+		delivery_mode	:  3,	/* 000: FIXED
+					               * 001: lowest priority
+					               * 111: ExtINT
+					               */
+		dest_mode	:  1,	    /* 0: physical, 1: logical */
+		delivery_status	:  1,
+		polarity	:  1,
+		irr		:  1,
+		trigger		:  1,	    /* 0: edge, 1: level */
+		mask		:  1,	      /* 0: enabled, 1: disabled */
+		__reserved_2	: 15;
+
+	union {		struct { ULONG
+					__reserved_1	: 24,
+					physical_dest	:  4,
+					__reserved_2	:  4;
+			} physical;
+
+			struct { ULONG
+					__reserved_1	: 24,
+					logical_dest	:  8;
+			} logical;
+	} dest;
+} __attribute__ ((packed)) IOAPIC_ROUTE_ENTRY, *PIOAPIC_ROUTE_ENTRY;
+
+typedef struct _IOAPIC_INFO
+{
+   ULONG  ApicId;         /* APIC ID */
+   ULONG  ApicVersion;    /* APIC version */
+   ULONG  ApicAddress;    /* APIC address */
+   ULONG  EntryCount;     /* Number of redirection entries */
+} IOAPIC_INFO, *PIOAPIC_INFO;
+
+
+/*
+ * Local APIC timer IRQ vector is on a different priority level,
+ * to work around the 'lost local interrupt if more than 2 IRQ
+ * sources per level' errata.
+ */
+#define LOCAL_TIMER_VECTOR 	  0xEF
+
+#define CALL_FUNCTION_VECTOR	0xFB
+#define RESCHEDULE_VECTOR		  0xFC
+#define INVALIDATE_TLB_VECTOR	0xFD
+#define ERROR_VECTOR				  0xFE
+#define SPURIOUS_VECTOR			  0xFF  /* Must be 0xXF */
+
+/*
+ * First APIC vector available to drivers: (vectors 0x30-0xEE)
+ * we start at 0x31 to spread out vectors evenly between priority
+ * levels.
+ */
+#define FIRST_DEVICE_VECTOR	  0x31
+#define FIRST_SYSTEM_VECTOR	  0xEF
+#define NUMBER_DEVICE_VECTORS (FIRST_SYSTEM_VECTOR - FIRST_DEVICE_VECTOR)
+
+
+/* MP Floating Pointer Structure */
+#define MPF_SIGNATURE (('_' << 24) | ('P' << 16) | ('M' << 8) | '_')
+
+typedef struct __attribute__((packed)) _MP_FLOATING_POINTER
+{
+	ULONG Signature;     /* _MP_ */
+	ULONG Address;          /* Physical Address Pointer (0 means no configuration table exist) */
+	UCHAR Length;           /* Structure length in 16-byte paragraphs */
+	UCHAR Specification;    /* Specification revision	*/
+	UCHAR Checksum;         /* Checksum */
+	UCHAR Feature1;         /* MP System Configuration Type */
+	UCHAR Feature2;         /* Bit 7 set for IMCR|PIC */
+	UCHAR Feature3;         /* Unused (0) */
+	UCHAR Feature4;         /* Unused (0) */
+	UCHAR Feature5;         /* Unused (0) */
+} __attribute__((packed)) MP_FLOATING_POINTER, *PMP_FLOATING_POINTER;
+
+#define FEATURE2_IMCRP  0x80
+
+/* MP Configuration Table Header */
+#define MPC_SIGNATURE (('P' << 24) | ('M' << 16) | ('C' << 8) | 'P')
+
+typedef struct __attribute__((packed)) _MP_CONFIGURATION_TABLE
+{
+  ULONG Signature;     /* PCMP */
+  USHORT Length;	        /* Size of configuration table */
+  CHAR  Specification;    /* Specification Revision */
+  CHAR Checksum;          /* Checksum */
+  CHAR Oem[8];            /* OEM ID */
+  CHAR ProductId[12];     /* Product ID */
+  ULONG OemTable;         /* 0 if not present */
+  USHORT OemTableSize;    /* 0 if not present */
+  USHORT EntryCount;      /* Number of entries */
+  ULONG LocalAPICAddress; /* Local APIC address */
+  USHORT ExtTableLength;  /* Extended Table Length */
+  UCHAR ExtTableChecksum; /* Extended Table Checksum */
+  UCHAR Reserved;         /* Reserved */
+} __attribute__((packed)) MP_CONFIGURATION_TABLE, *PMP_CONFIGURATION_TABLE;
+
+/* MP Configuration Table Entries */
+#define MPCTE_PROCESSOR 0   /* One entry per processor */
+#define MPCTE_BUS       1   /* One entry per bus */
+#define MPCTE_IOAPIC    2   /* One entry per I/O APIC */
+#define MPCTE_INTSRC    3   /* One entry per bus interrupt source */
+#define MPCTE_LINTSRC   4   /* One entry per system interrupt source */
+
+
+typedef struct __attribute__((packed)) _MP_CONFIGURATION_PROCESSOR
+{
+  UCHAR Type;         /* 0 */
+  UCHAR ApicId;       /* Local APIC ID for the processor */
+  UCHAR ApicVersion;  /* Local APIC version */
+  UCHAR CpuFlags;     /* CPU flags */
+  ULONG CpuSignature; /* CPU signature */
+  ULONG FeatureFlags; /* CPUID feature value */
+  ULONG Reserved[2];  /* Reserved (0) */
+} __attribute__((packed)) MP_CONFIGURATION_PROCESSOR, 
+  *PMP_CONFIGURATION_PROCESSOR;
+
+#define CPU_FLAG_ENABLED         1  /* Processor is available */
+#define CPU_FLAG_BSP             2  /* Processor is the bootstrap processor */
+
+#define CPU_STEPPING_MASK  0x0F
+#define CPU_MODEL_MASK	   0xF0
+#define CPU_FAMILY_MASK	   0xF00
+
+
+typedef struct __attribute__((packed)) _MP_CONFIGURATION_BUS
+{
+	UCHAR Type;         /* 1 */
+	UCHAR BusId;        /* Bus ID */
+	UCHAR BusType[6];   /* Bus type */
+} __attribute__((packed)) MP_CONFIGURATION_BUS, *PMP_CONFIGURATION_BUS;
+
+#define MAX_BUS 32
+
+#define MP_BUS_ISA  1
+#define MP_BUS_EISA 2
+#define MP_BUS_PCI  3
+#define MP_BUS_MCA  4
+
+#define BUSTYPE_EISA	  "EISA"
+#define BUSTYPE_ISA	    "ISA"
+#define BUSTYPE_INTERN	"INTERN"	/* Internal BUS */
+#define BUSTYPE_MCA	    "MCA"
+#define BUSTYPE_VL	    "VL"		  /* Local bus */
+#define BUSTYPE_PCI	    "PCI"
+#define BUSTYPE_PCMCIA	"PCMCIA"
+#define BUSTYPE_CBUS	  "CBUS"
+#define BUSTYPE_CBUSII	"CBUSII"
+#define BUSTYPE_FUTURE	"FUTURE"
+#define BUSTYPE_MBI	    "MBI"
+#define BUSTYPE_MBII	  "MBII"
+#define BUSTYPE_MPI	    "MPI"
+#define BUSTYPE_MPSA	  "MPSA"
+#define BUSTYPE_NUBUS	  "NUBUS"
+#define BUSTYPE_TC	    "TC"
+#define BUSTYPE_VME	    "VME"
+#define BUSTYPE_XPRESS	"XPRESS"
+
+
+typedef struct __attribute__((packed)) _MP_CONFIGURATION_IOAPIC
+{
+	UCHAR Type;         /* 2 */
+	UCHAR ApicId;       /* I/O APIC ID */
+	UCHAR ApicVersion;  /* I/O APIC version */
+	UCHAR ApicFlags;    /* I/O APIC flags */
+	ULONG ApicAddress;  /* I/O APIC base address */
+} __attribute__((packed)) MP_CONFIGURATION_IOAPIC, *PMP_CONFIGURATION_IOAPIC;
+
+#define MAX_IOAPIC  2
+
+#define MP_IOAPIC_USABLE  0x01
+
+
+typedef struct __attribute__((packed)) _MP_CONFIGURATION_INTSRC
+{
+	UCHAR Type;         /* 3 */
+	UCHAR IrqType;      /* Interrupt type */
+	USHORT IrqFlag;     /* Interrupt flags */
+	UCHAR SrcBusId;     /* Source bus ID */
+	UCHAR SrcBusIrq;    /* Source bus interrupt */
+	UCHAR DstApicId;    /* Destination APIC ID */
+	UCHAR DstApicInt;   /* Destination interrupt */
+} __attribute__((packed)) MP_CONFIGURATION_INTSRC, *PMP_CONFIGURATION_INTSRC;
+
+#define MAX_IRQ_SOURCE  128
+
+#define INT_VECTORED    0
+#define INT_NMI         1
+#define INT_SMI         2
+#define INT_EXTINT      3
+
+#define IRQDIR_DEFAULT  0
+#define IRQDIR_HIGH     1
+#define IRQDIR_LOW      3
+
+
+typedef struct __attribute__((packed)) _MP_CONFIGURATION_INTLOCAL
+{
+	UCHAR Type;         /* 4 */
+	UCHAR IrqType;      /* Interrupt type */
+	USHORT IrqFlag;     /* Interrupt flags */
+	UCHAR SrcBusId;     /* Source bus ID */
+	UCHAR SrcBusIrq;    /* Source bus interrupt */
+	UCHAR DstApicId;    /* Destination local APIC ID */
+	UCHAR DstApicLInt;  /* Destination local APIC interrupt */
+} MP_CONFIGURATION_INTLOCAL, *PMP_CONFIGURATION_INTLOCAL;
+
+#define MP_APIC_ALL	0xFF
+
+
+static inline VOID ReadPentiumClock(PULARGE_INTEGER Count)
+{
+   register ULONG nLow;
+   register ULONG nHigh;
+  
+   __asm__ __volatile__ ("rdtsc" : "=a" (nLow), "=d" (nHigh));
+
+   Count->u.LowPart = nLow;
+   Count->u.HighPart = nHigh;
+}
+
+
+#define MAX_CPU   32
+
+
+typedef struct _CPU_INFO
+{
+   UCHAR    Flags;            /* CPU flags */
+   UCHAR    APICId;           /* Local APIC ID */
+   UCHAR    APICVersion;      /* Local APIC version */
+   UCHAR    MaxLVT;           /* Number of LVT registers */
+   ULONG    BusSpeed;         /* BUS speed */
+   ULONG    CoreSpeed;        /* Core speed */
+   UCHAR    Padding[16-12];   /* Padding to 16-byte */
+} CPU_INFO, *PCPU_INFO;
+
+/* CPU flags */
+#define CPU_USABLE   0x01  /* 1 if the CPU is usable (ie. can be used) */
+#define CPU_ENABLED  0x02  /* 1 if the CPU is enabled */
+#define CPU_BSP      0x04  /* 1 if the CPU is the bootstrap processor */
+
+
+typedef enum {
+  amPIC = 0,    /* IMCR and PIC compatibility mode */
+  amVWIRE       /* Virtual Wire compatibility mode */
+} APIC_MODE;
+
+
+#define pushfl(x) __asm__ __volatile__("pushfl ; popl %0":"=g" (x): /* no input */)
+#define popfl(x) __asm__ __volatile__("pushl %0 ; popfl": /* no output */ :"g" (x):"memory")
+
+
+#define PIC_IRQS  16
+
+/* Prototypes */
+
+VOID HalpInitMPS(VOID);
+volatile ULONG IOAPICRead(ULONG Apic, ULONG Offset);
+VOID IOAPICWrite(ULONG Apic, ULONG Offset, ULONG Value);
+VOID IOAPICMaskIrq(ULONG Apic, ULONG Irq);
+VOID IOAPICUnmaskIrq(ULONG Apic, ULONG Irq);
+volatile inline ULONG APICRead(ULONG Offset);
+inline VOID APICWrite(ULONG Offset, ULONG Value);
+inline VOID APICSendEOI(VOID);
+inline ULONG ThisCPU(VOID);
+VOID APICSendIPI(ULONG Target,
+                 ULONG DeliveryMode,
+                 ULONG IntNum,
+                 ULONG Level);
+/* For debugging */
+VOID IOAPICDump(VOID);
+VOID APICDump(VOID);
+
+#endif /* __INCLUDE_HAL_MPS */
+
+/* EOF */

reactos/hal/halx86/irql.c

@@ -0,0 +1,451 @@
+/*
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/irql.c
+ * PURPOSE:         Implements IRQLs
+ * PROGRAMMER:      David Welch (welch@cwcom.net)
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+#include <internal/bitops.h>
+#include <internal/ke.h>
+#include <internal/ps.h>
+
+#define NDEBUG
+#include <internal/debug.h>
+
+/* GLOBALS ******************************************************************/
+
+/* FIXME: this should be in a header file */
+#define NR_IRQS         (16)
+#define IRQ_BASE        (0x40)
+
+/*
+ * PURPOSE: Current irq level
+ */
+static KIRQL CurrentIrql = HIGH_LEVEL;
+
+extern IMPORTED ULONG DpcQueueSize;
+
+static VOID KeSetCurrentIrql(KIRQL newlvl);
+
+#define DIRQL_TO_IRQ(x)  (PROFILE_LEVEL - x)
+#define IRQ_TO_DIRQL(x)  (PROFILE_LEVEL - x)
+
+/* FUNCTIONS ****************************************************************/
+
+VOID HalpInitPICs(VOID)
+{
+   /* Initialization sequence */
+   WRITE_PORT_UCHAR((PUCHAR)0x20, 0x11);
+   WRITE_PORT_UCHAR((PUCHAR)0xa0, 0x11);
+   /* Start of hardware irqs (0x24) */
+   WRITE_PORT_UCHAR((PUCHAR)0x21, 0x40);
+   WRITE_PORT_UCHAR((PUCHAR)0xa1, 0x48);
+   /* 8259-1 is master */
+   WRITE_PORT_UCHAR((PUCHAR)0x21, 0x4);
+   /* 8259-2 is slave */
+   WRITE_PORT_UCHAR((PUCHAR)0xa1, 0x2);
+   /* 8086 mode */
+   WRITE_PORT_UCHAR((PUCHAR)0x21, 0x1);
+   WRITE_PORT_UCHAR((PUCHAR)0xa1, 0x1);   
+   /* Mask off all interrupts from PICs */
+   WRITE_PORT_UCHAR((PUCHAR)0x21, 0xff);
+   WRITE_PORT_UCHAR((PUCHAR)0xa1, 0xff);
+
+   /* We can know enable interrupts */
+   __asm__ __volatile__ ("sti\n\t");
+}
+
+static ULONG 
+HiSetCurrentPICMask(unsigned int mask)
+{
+  WRITE_PORT_UCHAR((PUCHAR)0x21,mask & 0xff);
+  WRITE_PORT_UCHAR((PUCHAR)0xa1,(mask >> 8) & 0xff);
+  
+  return mask;
+}
+
+static VOID HiSwitchIrql(KIRQL oldIrql)
+/*
+ * FUNCTION: Switches to the current irql
+ * NOTE: Must be called with interrupt disabled
+ */
+{
+   unsigned int i;
+   PKTHREAD CurrentThread;
+   
+   CurrentThread = KeGetCurrentThread();
+   
+   /*
+    * Disable all interrupts
+    */
+   if (CurrentIrql >= IPI_LEVEL)
+     {
+       HiSetCurrentPICMask(0xFFFF);
+       __asm__("sti\n\t");
+       return;
+     }
+
+   /*
+    * Disable all interrupts but the timer
+    */
+   if (CurrentIrql == PROFILE_LEVEL ||
+       CurrentIrql == CLOCK1_LEVEL ||
+       CurrentIrql == CLOCK2_LEVEL)
+     {
+	HiSetCurrentPICMask(0xFFFE);
+	__asm__("sti\n\t");
+	return;
+     }
+
+   /*
+    * Disable all interrupts of lesser priority
+    */
+   if (CurrentIrql > DISPATCH_LEVEL)
+     {
+       unsigned int current_mask = 0;
+	
+       for (i = CurrentIrql; i > (PROFILE_LEVEL - 15); i--)
+	  {
+	     current_mask = current_mask | (1 << (PROFILE_LEVEL - i));
+	  }
+	
+       HiSetCurrentPICMask(current_mask);
+       __asm__("sti\n\t");
+       return;
+     }
+   
+   /*
+    * Enable all interrupts
+    */
+   if (CurrentIrql == DISPATCH_LEVEL)
+     {
+	HiSetCurrentPICMask(0);
+	__asm__("sti\n\t");
+	return;
+     }
+   
+   /*
+    * APCs are disabled but execute any pending DPCs
+    */
+   if (CurrentIrql == APC_LEVEL)
+     {
+       HiSetCurrentPICMask(0);
+       __asm__("sti\n\t");
+       if (DpcQueueSize > 0)
+	  {
+	    CurrentIrql = DISPATCH_LEVEL;
+	    KiDispatchInterrupt();
+	    CurrentIrql = APC_LEVEL;
+	  }
+	return;
+     }
+   
+   /*
+    * Execute any pending DPCs or APCs
+    */
+   if (CurrentIrql == PASSIVE_LEVEL)
+     {
+       if (DpcQueueSize > 0)
+	 {
+	   CurrentIrql = DISPATCH_LEVEL;
+	   KiDispatchInterrupt();
+	   CurrentIrql = PASSIVE_LEVEL;
+	 }
+       if (CurrentThread != NULL && 
+	   CurrentThread->ApcState.KernelApcPending)
+	 {
+	   CurrentIrql = APC_LEVEL;
+	   KiDeliverApc(0, 0, 0);
+	   CurrentIrql = PASSIVE_LEVEL;
+	 }
+     }
+}
+
+
+KIRQL STDCALL 
+KeGetCurrentIrql (VOID)
+/*
+ * PURPOSE: Returns the current irq level
+ * RETURNS: The current irq level
+ */
+{
+   return(CurrentIrql);
+}
+
+
+STATIC VOID 
+KeSetCurrentIrql(KIRQL newlvl)
+/*
+ * PURPOSE: Sets the current irq level without taking any action
+ */
+{
+  CurrentIrql = newlvl;
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KfLowerIrql
+ *
+ * DESCRIPTION
+ *	Restores the irq level on the current processor
+ *
+ * ARGUMENTS
+ *	NewIrql = Irql to lower to
+ *
+ * RETURN VALUE
+ *	None
+ *
+ * NOTES
+ *	Uses fastcall convention
+ */
+
+VOID FASTCALL
+KfLowerIrql (KIRQL	NewIrql)
+{
+  KIRQL OldIrql;
+  
+  __asm__("cli\n\t");
+  
+  DPRINT("KfLowerIrql(NewIrql %d)\n", NewIrql);
+  
+  if (NewIrql > CurrentIrql)
+    {
+      DbgPrint ("(%s:%d) NewIrql %x CurrentIrql %x\n",
+		__FILE__, __LINE__, NewIrql, CurrentIrql);
+      KeBugCheck(0);
+      for(;;);
+    }
+  
+  OldIrql = CurrentIrql;
+  CurrentIrql = NewIrql;
+  HiSwitchIrql(OldIrql);
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KeLowerIrql
+ *
+ * DESCRIPTION
+ *	Restores the irq level on the current processor
+ *
+ * ARGUMENTS
+ *	NewIrql = Irql to lower to
+ *
+ * RETURN VALUE
+ *	None
+ *
+ * NOTES
+ */
+
+VOID STDCALL
+KeLowerIrql (KIRQL NewIrql)
+{
+  KfLowerIrql (NewIrql);
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KfRaiseIrql
+ *
+ * DESCRIPTION
+ *	Raises the hardware priority (irql)
+ *
+ * ARGUMENTS
+ *	NewIrql = Irql to raise to
+ *
+ * RETURN VALUE
+ *	previous irq level
+ *
+ * NOTES
+ *	Uses fastcall convention
+ */
+
+KIRQL FASTCALL
+KfRaiseIrql (KIRQL	NewIrql)
+{
+  KIRQL OldIrql;
+  
+  DPRINT("KfRaiseIrql(NewIrql %d)\n", NewIrql);
+  
+  if (NewIrql < CurrentIrql)
+    {
+      DbgPrint ("%s:%d CurrentIrql %x NewIrql %x\n",
+		__FILE__,__LINE__,CurrentIrql,NewIrql);
+      KeBugCheck (0);
+      for(;;);
+    }
+  
+  __asm__("cli\n\t");
+  OldIrql = CurrentIrql;
+  CurrentIrql = NewIrql;
+  
+  DPRINT ("NewIrql %x OldIrql %x CurrentIrql %x\n",
+	  NewIrql, OldIrql, CurrentIrql);
+  HiSwitchIrql(OldIrql);
+  
+  return OldIrql;
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KeRaiseIrql
+ *
+ * DESCRIPTION
+ *	Raises the hardware priority (irql)
+ *
+ * ARGUMENTS
+ *	NewIrql = Irql to raise to
+ *	OldIrql (OUT) = Caller supplied storage for the previous irql
+ *
+ * RETURN VALUE
+ *	None
+ *
+ * NOTES
+ *	Calls KfRaiseIrql
+ */
+VOID STDCALL
+KeRaiseIrql (KIRQL	NewIrql,
+	     PKIRQL	OldIrql)
+{
+  *OldIrql = KfRaiseIrql (NewIrql);
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KeRaiseIrqlToDpcLevel
+ *
+ * DESCRIPTION
+ *	Raises the hardware priority (irql) to DISPATCH level
+ *
+ * ARGUMENTS
+ *	None
+ *
+ * RETURN VALUE
+ *	Previous irq level
+ *
+ * NOTES
+ *	Calls KfRaiseIrql
+ */
+
+KIRQL STDCALL
+KeRaiseIrqlToDpcLevel (VOID)
+{
+  return KfRaiseIrql (DISPATCH_LEVEL);
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KeRaiseIrqlToSynchLevel
+ *
+ * DESCRIPTION
+ *	Raises the hardware priority (irql) to CLOCK2 level
+ *
+ * ARGUMENTS
+ *	None
+ *
+ * RETURN VALUE
+ *	Previous irq level
+ *
+ * NOTES
+ *	Calls KfRaiseIrql
+ */
+
+KIRQL STDCALL
+KeRaiseIrqlToSynchLevel (VOID)
+{
+  return KfRaiseIrql (CLOCK2_LEVEL);
+}
+
+
+BOOLEAN STDCALL 
+HalBeginSystemInterrupt (ULONG Vector,
+			 KIRQL Irql,
+			 PKIRQL OldIrql)
+{
+  if (Vector < IRQ_BASE || Vector > IRQ_BASE + NR_IRQS)
+    return FALSE;
+  
+  /* Send EOI to the PICs */
+  WRITE_PORT_UCHAR((PUCHAR)0x20,0x20);
+  if ((Vector-IRQ_BASE)>=8)
+    {
+      WRITE_PORT_UCHAR((PUCHAR)0xa0,0x20);
+    }
+  
+  *OldIrql = KeGetCurrentIrql();
+  if (Vector-IRQ_BASE != 0)
+    {
+      DPRINT("old_level %d\n",*OldIrql);
+    }
+  KeSetCurrentIrql(Irql);
+  
+  return TRUE;
+}
+
+
+VOID STDCALL HalEndSystemInterrupt (KIRQL Irql,
+				    ULONG Unknown2)
+{
+  KeSetCurrentIrql(Irql);
+}
+
+
+BOOLEAN STDCALL HalDisableSystemInterrupt (ULONG Vector,
+					   ULONG Unknown2)
+{
+  ULONG irq;
+  
+  if (Vector < IRQ_BASE || Vector > IRQ_BASE + NR_IRQS)
+    return FALSE;
+
+  irq = Vector - IRQ_BASE;
+  if (irq < 8)
+     {
+       WRITE_PORT_UCHAR((PUCHAR)0x21, 
+			READ_PORT_UCHAR((PUCHAR)0x21)|(1<<irq));
+     }
+  else
+    {
+      WRITE_PORT_UCHAR((PUCHAR)0xa1, 
+		       READ_PORT_UCHAR((PUCHAR)0xa1)|(1<<(irq-8)));
+    }
+  
+  return TRUE;
+}
+
+
+BOOLEAN STDCALL HalEnableSystemInterrupt (ULONG Vector,
+					  ULONG Unknown2,
+					  ULONG Unknown3)
+{
+  ULONG irq;
+
+  if (Vector < IRQ_BASE || Vector > IRQ_BASE + NR_IRQS)
+    return FALSE;
+
+  irq = Vector - IRQ_BASE;
+  if (irq < 8)
+    {
+      WRITE_PORT_UCHAR((PUCHAR)0x21, 
+		       READ_PORT_UCHAR((PUCHAR)0x21)&(~(1<<irq)));
+    }
+  else
+     {
+       WRITE_PORT_UCHAR((PUCHAR)0xa1, 
+			READ_PORT_UCHAR((PUCHAR)0xa1)&(~(1<<(irq-8))));
+     }
+
+  return TRUE;
+}
+
+/* EOF */

reactos/hal/halx86/isa.c

@@ -0,0 +1,62 @@
+/* $Id: isa.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/isa.c
+ * PURPOSE:         Interfaces to the ISA bus
+ * PROGRAMMER:      David Welch (welch@mcmail.com)
+ * UPDATE HISTORY:
+ *               05/06/98: Created
+ */
+
+/* INCLUDES ***************************************************************/
+
+#include <ddk/ntddk.h>
+#include <bus.h>
+
+
+/* FUNCTIONS *****************************************************************/
+
+BOOL HalIsaProbe(VOID)
+/*
+ * FUNCTION: Probes for an ISA bus
+ * RETURNS: True if detected
+ * NOTE: Since ISA is the default we are called last and always return
+ * true
+ */
+{
+   DbgPrint("Assuming ISA bus\n");
+   
+   /*
+    * Probe for plug and play support
+    */
+   return(TRUE);
+}
+
+
+BOOLEAN STDCALL
+HalpTranslateIsaBusAddress(PBUS_HANDLER BusHandler,
+			   ULONG BusNumber,
+			   PHYSICAL_ADDRESS BusAddress,
+			   PULONG AddressSpace,
+			   PPHYSICAL_ADDRESS TranslatedAddress)
+{
+   BOOLEAN Result;
+
+   Result = HalTranslateBusAddress(PCIBus,
+				   BusNumber,
+				   BusAddress,
+				   AddressSpace,
+				   TranslatedAddress);
+   if (Result != FALSE)
+     return Result;
+
+   Result = HalTranslateBusAddress(Internal,
+				   BusNumber,
+				   BusAddress,
+				   AddressSpace,
+				   TranslatedAddress);
+   return Result;
+}
+
+/* EOF */

reactos/hal/halx86/kdbg.c

@@ -0,0 +1,336 @@
+/* $Id: kdbg.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/kdbg.c
+ * PURPOSE:         Serial i/o functions for the kernel debugger.
+ * PROGRAMMER:      Emanuele Aliberti
+ *                  Eric Kohl
+ * UPDATE HISTORY:
+ *                  Created 05/09/99
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+
+#define NDEBUG
+#include <internal/debug.h>
+
+
+#define DEFAULT_BAUD_RATE    19200
+
+
+/* MACROS *******************************************************************/
+
+#define   SER_RBR(x)   ((x)+0)
+#define   SER_THR(x)   ((x)+0)
+#define   SER_DLL(x)   ((x)+0)
+#define   SER_IER(x)   ((x)+1)
+#define   SER_DLM(x)   ((x)+1)
+#define   SER_IIR(x)   ((x)+2)
+#define   SER_LCR(x)   ((x)+3)
+#define     SR_LCR_CS5 0x00
+#define     SR_LCR_CS6 0x01
+#define     SR_LCR_CS7 0x02
+#define     SR_LCR_CS8 0x03
+#define     SR_LCR_ST1 0x00
+#define     SR_LCR_ST2 0x04
+#define     SR_LCR_PNO 0x00
+#define     SR_LCR_POD 0x08
+#define     SR_LCR_PEV 0x18
+#define     SR_LCR_PMK 0x28
+#define     SR_LCR_PSP 0x38
+#define     SR_LCR_BRK 0x40
+#define     SR_LCR_DLAB 0x80
+#define   SER_MCR(x)   ((x)+4)
+#define     SR_MCR_DTR 0x01
+#define     SR_MCR_RTS 0x02
+#define   SER_LSR(x)   ((x)+5)
+#define     SR_LSR_DR  0x01
+#define     SR_LSR_TBE 0x20
+#define   SER_MSR(x)   ((x)+6)
+#define     SR_MSR_CTS 0x10
+#define     SR_MSR_DSR 0x20
+#define   SER_SCR(x)   ((x)+7)
+
+
+/* GLOBAL VARIABLES *********************************************************/
+
+ULONG
+__declspec(dllexport)
+KdComPortInUse = 0; /* EXPORTED */
+
+
+/* STATIC VARIABLES *********************************************************/
+
+static ULONG ComPort = 0;
+static ULONG BaudRate = 0;
+static PUCHAR PortBase = (PUCHAR)0;
+
+/* The com port must only be initialized once! */
+static BOOLEAN PortInitialized = FALSE;
+
+
+/* STATIC FUNCTIONS *********************************************************/
+
+static BOOLEAN
+KdpDoesComPortExist (PUCHAR BaseAddress)
+{
+        BOOLEAN found;
+        BYTE mcr;
+        BYTE msr;
+
+        found = FALSE;
+
+        /* save Modem Control Register (MCR) */
+        mcr = READ_PORT_UCHAR (SER_MCR(BaseAddress));
+
+        /* enable loop mode (set Bit 4 of the MCR) */
+        WRITE_PORT_UCHAR (SER_MCR(BaseAddress), 0x10);
+
+        /* clear all modem output bits */
+        WRITE_PORT_UCHAR (SER_MCR(BaseAddress), 0x10);
+
+        /* read the Modem Status Register */
+        msr = READ_PORT_UCHAR (SER_MSR(BaseAddress));
+
+        /*
+         * the upper nibble of the MSR (modem output bits) must be
+         * equal to the lower nibble of the MCR (modem input bits)
+         */
+        if ((msr & 0xF0) == 0x00)
+        {
+                /* set all modem output bits */
+                WRITE_PORT_UCHAR (SER_MCR(BaseAddress), 0x1F);
+
+                /* read the Modem Status Register */
+                msr = READ_PORT_UCHAR (SER_MSR(BaseAddress));
+
+                /*
+                 * the upper nibble of the MSR (modem output bits) must be
+                 * equal to the lower nibble of the MCR (modem input bits)
+                 */
+                if ((msr & 0xF0) == 0xF0)
+                        found = TRUE;
+        }
+
+        /* restore MCR */
+        WRITE_PORT_UCHAR (SER_MCR(BaseAddress), mcr);
+
+        return (found);
+}
+
+
+/* FUNCTIONS ****************************************************************/
+
+/* HAL.KdPortInitialize */
+BOOLEAN
+STDCALL
+KdPortInitialize (
+	PKD_PORT_INFORMATION	PortInformation,
+	DWORD	Unknown1,
+	DWORD	Unknown2
+	)
+{
+        ULONG BaseArray[5] = {0, 0x3F8, 0x2F8, 0x3E8, 0x2E8};
+        char buffer[80];
+        ULONG divisor;
+        BYTE lcr;
+
+        if (PortInitialized == FALSE)
+        {
+                if (PortInformation->BaudRate != 0)
+                {
+                        BaudRate = PortInformation->BaudRate;
+                }
+                else
+                {
+                        BaudRate = DEFAULT_BAUD_RATE;
+                }
+
+                if (PortInformation->ComPort == 0)
+                {
+                        if (KdpDoesComPortExist ((PUCHAR)BaseArray[2]))
+                        {
+                                PortBase = (PUCHAR)BaseArray[2];
+                                ComPort = 2;
+                                PortInformation->BaseAddress = (ULONG)PortBase;
+                                PortInformation->ComPort = ComPort;
+#ifndef NDEBUG
+                                sprintf (buffer,
+                                         "\nSerial port COM%ld found at 0x%lx\n",
+                                         ComPort,
+                                         (ULONG)PortBase);
+                                HalDisplayString (buffer);
+#endif /* NDEBUG */
+                        }
+                        else if (KdpDoesComPortExist ((PUCHAR)BaseArray[1]))
+                        {
+                                PortBase = (PUCHAR)BaseArray[1];
+                                ComPort = 1;
+                                PortInformation->BaseAddress = (ULONG)PortBase;
+                                PortInformation->ComPort = ComPort;
+#ifndef NDEBUG
+                                sprintf (buffer,
+                                         "\nSerial port COM%ld found at 0x%lx\n",
+                                         ComPort,
+                                         (ULONG)PortBase);
+                                HalDisplayString (buffer);
+#endif /* NDEBUG */
+                        }
+                        else
+                        {
+                                sprintf (buffer,
+                                         "\nKernel Debugger: No COM port found!!!\n\n");
+                                HalDisplayString (buffer);
+                                return FALSE;
+                        }
+                }
+                else
+                {
+                        if (KdpDoesComPortExist ((PUCHAR)BaseArray[PortInformation->ComPort]))
+                        {
+                                PortBase = (PUCHAR)BaseArray[PortInformation->ComPort];
+                                ComPort = PortInformation->ComPort;
+                                PortInformation->BaseAddress = (ULONG)PortBase;
+#ifndef NDEBUG
+                                sprintf (buffer,
+                                         "\nSerial port COM%ld found at 0x%lx\n",
+                                         ComPort,
+                                         (ULONG)PortBase);
+                                HalDisplayString (buffer);
+#endif /* NDEBUG */
+                        }
+                        else
+                        {
+                                sprintf (buffer,
+                                         "\nKernel Debugger: No serial port found!!!\n\n");
+                                HalDisplayString (buffer);
+                                return FALSE;
+                        }
+                }
+
+                PortInitialized = TRUE;
+        }
+
+        /*
+         * set baud rate and data format (8N1)
+         */
+
+        /*  turn on DTR and RTS  */
+        WRITE_PORT_UCHAR (SER_MCR(PortBase), SR_MCR_DTR | SR_MCR_RTS);
+
+        /* set DLAB */
+        lcr = READ_PORT_UCHAR (SER_LCR(PortBase)) | SR_LCR_DLAB;
+        WRITE_PORT_UCHAR (SER_LCR(PortBase), lcr);
+
+        /* set baud rate */
+        divisor = 115200 / BaudRate;
+        WRITE_PORT_UCHAR (SER_DLL(PortBase), divisor & 0xff);
+        WRITE_PORT_UCHAR (SER_DLM(PortBase), (divisor >> 8) & 0xff);
+
+        /* reset DLAB and set 8N1 format */
+        WRITE_PORT_UCHAR (SER_LCR(PortBase),
+                          SR_LCR_CS8 | SR_LCR_ST1 | SR_LCR_PNO);
+
+        /* read junk out of the RBR */
+        lcr = READ_PORT_UCHAR (SER_RBR(PortBase));
+
+        /*
+         * set global info
+         */
+        KdComPortInUse = (ULONG)PortBase;
+
+        /*
+         * print message to blue screen
+         */
+        sprintf (buffer,
+                 "\nKernel Debugger: COM%ld (Port 0x%lx) BaudRate %ld\n\n",
+                 ComPort,
+                 (ULONG)PortBase,
+                 BaudRate);
+
+        HalDisplayString (buffer);
+
+        return TRUE;
+}
+
+
+/* HAL.KdPortGetByte */
+BOOLEAN
+STDCALL
+KdPortGetByte (
+	PUCHAR	ByteRecieved
+	)
+{
+	if (PortInitialized == FALSE)
+		return FALSE;
+
+	if ((READ_PORT_UCHAR (SER_LSR(PortBase)) & SR_LSR_DR))
+	{
+		*ByteRecieved = READ_PORT_UCHAR (SER_RBR(PortBase));
+		return TRUE;
+	}
+
+	return FALSE;
+}
+
+
+/* HAL.KdPortPollByte */
+BOOLEAN
+STDCALL
+KdPortPollByte (
+	PUCHAR	ByteRecieved
+	)
+{
+	if (PortInitialized == FALSE)
+		return FALSE;
+
+	while ((READ_PORT_UCHAR (SER_LSR(PortBase)) & SR_LSR_DR) == 0)
+		;
+
+	*ByteRecieved = READ_PORT_UCHAR (SER_RBR(PortBase));
+
+	return TRUE;
+}
+
+
+/* HAL.KdPortPutByte */
+VOID
+STDCALL
+KdPortPutByte (
+	UCHAR ByteToSend
+	)
+{
+	if (PortInitialized == FALSE)
+		return;
+
+	while ((READ_PORT_UCHAR (SER_LSR(PortBase)) & SR_LSR_TBE) == 0)
+		;
+
+	WRITE_PORT_UCHAR (SER_THR(PortBase), ByteToSend);
+}
+
+
+/* HAL.KdPortRestore */
+VOID
+STDCALL
+KdPortRestore (
+	VOID
+	)
+{
+}
+
+
+/* HAL.KdPortSave */
+VOID
+STDCALL
+KdPortSave (
+	VOID
+	)
+{
+}
+
+
+/* EOF */

reactos/hal/halx86/mbr.c

@@ -0,0 +1,25 @@
+/*
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/mbr.c
+ * PURPOSE:         Functions for reading the master boot record (MBR)
+ * PROGRAMMER:      David Welch (welch@cwcom.net)
+ * UPDATE HISTORY:
+ *                  Created 22/05/98
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+
+#include <internal/debug.h>
+
+/* FUNCTIONS *****************************************************************/
+
+VOID HalExamineMBR(PDEVICE_OBJECT DeviceObject,
+		   ULONG SectorSize,
+		   ULONG MBRTypeIdentifier,
+		   PVOID Buffer)
+{
+   UNIMPLEMENTED;
+}

reactos/hal/halx86/misc.c

@@ -0,0 +1,105 @@
+/* $Id: misc.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:             See COPYING in the top level directory
+ * PROJECT:               ReactOS kernel
+ * FILE:                  ntoskrnl/hal/x86/misc.c
+ * PURPOSE:               Miscellaneous hardware functions
+ * PROGRAMMER:            Eric Kohl (ekohl@rz-online.de)
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+#include <hal.h>
+
+/* FUNCTIONS ****************************************************************/
+
+VOID STDCALL
+HalHandleNMI (ULONG Unused)
+{
+	UCHAR ucStatus;
+	
+	ucStatus = READ_PORT_UCHAR((PUCHAR) 0x61);
+	
+	HalDisplayString ("\n*** Hardware Malfunction\n\n");
+	HalDisplayString ("Call your hardware vendor for support\n\n");
+	
+	if (ucStatus & 0x80)
+		HalDisplayString ("NMI: Parity Check / Memory Parity Error\n");
+		
+	if (ucStatus & 0x40)
+		HalDisplayString ("NMI: Channel Check / IOCHK\n");
+
+	HalDisplayString ("\n*** The system has halted ***\n");
+	KeEnterKernelDebugger ();
+}
+
+VOID STDCALL
+HalProcessorIdle (VOID)
+{
+#if 1
+	__asm__("sti\n\t" \
+	        "hlt\n\t");
+#else
+   
+#endif
+}
+
+VOID STDCALL
+HalRequestIpi(ULONG Unknown)
+{
+   return;
+}
+
+ULONG FASTCALL
+HalSystemVectorDispatchEntry (
+	ULONG	Unknown1,
+	ULONG	Unknown2,
+	ULONG	Unknown3
+	)
+{
+	return 0;
+}
+
+VOID STDCALL
+KeFlushWriteBuffer (
+	VOID
+	)
+{
+	return;
+}
+
+VOID STDCALL
+HalReportResourceUsage (
+	VOID
+	)
+{
+	/*
+	 * FIXME: Report all resources used by hal.
+	 *        Calls IoReportHalResourceUsage()
+	 */
+
+	/*
+	 * Initialize PCI bus.
+	 */
+	HalpInitPciBus ();
+#if 0
+	/*
+	 * Initialize IsaPnP bus.
+	 */
+	HalpInitIsaPnpBus ();
+
+	/*
+	 * Initialize other busses???
+	 */
+
+      /*
+       * Probe for a BIOS32 extension
+       */
+      Hal_bios32_probe();
+#endif
+
+	return;
+}
+
+/* EOF */

reactos/hal/halx86/mps.S

@@ -0,0 +1,76 @@
+/* $Id: mps.S,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/mps.S
+ * PURPOSE:         Intel MultiProcessor specification support
+ * PROGRAMMER:      Casper S. Hornstrup (chorns@users.sourceforge.net)
+ * UPDATE HISTORY:
+ *                  Created 12/04/2001
+ */
+
+/* INCLUDES ******************************************************************/
+
+#include <internal/i386/segment.h>
+
+/* FUNCTIONS *****************************************************************/
+
+#define BEFORE \
+  pusha; \
+  pushl %ds; \
+  pushl %es; \
+  pushl %fs; \
+  pushl %gs; \
+  movl  $(KERNEL_DS), %eax; \
+  movl  %eax, %ds; \
+  movl  %eax, %es; \
+  movl  %eax, %gs; \
+  movl  $(PCR_SELECTOR), %eax; \
+  movl  %eax, %fs;
+  
+#define AFTER \
+  popl  %gs; \
+  popl  %fs; \
+  popl  %es; \
+  popl  %ds; \
+  popa;
+
+.globl _MpsTimerInterrupt
+_MpsTimerInterrupt:
+  /* Save registers */	
+  BEFORE
+
+  /* Call the C handler */
+  call  _MpsTimerHandler
+
+	/* Return to the caller */
+  AFTER
+  iret
+
+
+.globl _MpsErrorInterrupt
+_MpsErrorInterrupt:
+  /* Save registers */	
+  BEFORE
+
+  /* Call the C handler */
+  call  _MpsErrorHandler
+
+	/* Return to the caller */
+  AFTER
+  iret
+
+
+.globl _MpsSpuriousInterrupt
+_MpsSpuriousInterrupt:
+  /* Save registers */	
+  BEFORE
+
+  /* Call the C handler */
+  call  _MpsSpuriousHandler
+
+	/* Return to the caller */
+  AFTER
+  iret
+
+/* EOF */

reactos/hal/halx86/mpsboot.asm

@@ -0,0 +1,106 @@
+;
+; COPYRIGHT:       See COPYING in the top level directory
+; PROJECT:         ReactOS kernel
+; FILE:            ntoskrnl/hal/x86/mpsboot.c
+; PURPOSE:         Bootstrap code for application processors
+; PROGRAMMER:      Casper S. Hornstrup (chorns@users.sourceforge.net)
+; UPDATE HISTORY:
+;                  Created 12/04/2001
+;
+
+;
+; Memory map at this stage is:
+;     0x2000  Location of our stack
+;     0x3000  Startup code for the APs (this code)
+;
+
+;
+; Base address of common area for BSP and APs
+;
+LOAD_BASE   equ 00200000h
+
+;
+; Magic value to be put in EAX when multiboot.S is called as part of the
+; application processor initialization process
+;
+AP_MAGIC    equ 12481020h
+
+;
+; Segment selectors
+;
+%define KERNEL_CS     (0x8)
+%define KERNEL_DS     (0x10)
+
+section .text
+
+global _APstart
+global _APend
+
+; 16 bit code
+BITS 16
+
+_APstart:
+	cli		; Just in case
+
+  xor   ax, ax
+	mov		ds, ax
+	mov		ss, ax
+
+  mov   eax, 3000h + APgdt - _APstart
+	lgdt  [eax]
+
+  mov   eax, cr0
+  or    eax, 00010001h    ; Turn on protected mode and write protection
+  mov   cr0, eax
+
+  db    0eah
+  dw    3000h + flush - _APstart, KERNEL_CS
+
+; 32 bit code
+BITS 32
+
+flush:
+  mov   ax, KERNEL_DS
+  mov		ds, ax
+  mov		es, ax
+  mov		fs, ax
+  mov		gs, ax
+  mov		ss, ax
+
+  ; Setup a stack for the AP
+  mov   eax, 2000h
+  mov   eax, [eax]
+  mov   esp, eax
+
+  ; Jump to start of the kernel with AP magic in eax
+  mov      eax, AP_MAGIC
+  jmp      dword KERNEL_CS:(LOAD_BASE + 0x1000)
+
+  ; Never get here
+
+
+; Temporary GDT descriptor for the APs
+
+APgdt:
+; Limit
+  dw  (3*8)-1
+; Base
+  dd	3000h + gdt - _APstart
+
+gdt:
+  dw	0x0       ; Null descriptor
+  dw	0x0
+  dw	0x0
+  dw	0x0
+
+  dw	0xffff    ; Kernel code descriptor
+  dw	0x0000
+  dw	0x9a00
+  dw	0x00cf
+
+  dw	0xffff    ;  Kernel data descriptor
+  dw	0x0000
+  dw	0x9200
+  dw	0x00cf
+
+_APend:

reactos/hal/halx86/mpsirql.c

@@ -0,0 +1,417 @@
+/*
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/mpsirql.c
+ * PURPOSE:         Implements IRQLs for multiprocessor systems
+ * PROGRAMMERS:     David Welch (welch@cwcom.net)
+ *                  Casper S. Hornstrup (chorns@users.sourceforge.net)
+ * UPDATE HISTORY:
+ *     12/04/2001  CSH  Created
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+#include <internal/bitops.h>
+#include <internal/ke.h>
+#include <internal/ps.h>
+#include <mps.h>
+
+#define NDEBUG
+#include <internal/debug.h>
+
+/* GLOBALS ******************************************************************/;
+
+extern IMPORTED ULONG DpcQueueSize;
+
+static VOID KeSetCurrentIrql(KIRQL newlvl);
+
+/* FUNCTIONS ****************************************************************/
+
+#define IRQL2TPR(irql) (APIC_TPR_MIN + ((irql - DISPATCH_LEVEL - 1) * 8))
+
+static VOID HiSetCurrentPriority(
+  ULONG Priority)
+{
+  //DbgPrint(" P(0x%X)\n", Priority);
+  APICWrite(APIC_TPR, Priority & APIC_TPR_PRI);
+}
+
+
+static VOID HiSwitchIrql(KIRQL OldIrql, ULONG Flags)
+/*
+ * FUNCTION: Switches to the current irql
+ * NOTE: Must be called with interrupt disabled
+ */
+{
+   PKTHREAD CurrentThread;
+   KIRQL CurrentIrql;
+
+   //DbgPrint("HiSwitchIrql(OldIrql %d)\n", OldIrql);
+
+   CurrentIrql = KeGetCurrentKPCR()->Irql;
+
+   if (CurrentIrql >= IPI_LEVEL)
+     {
+  /* Block all interrupts */
+  HiSetCurrentPriority(APIC_TPR_MAX);
+	return;
+     }
+
+  if (CurrentIrql == CLOCK2_LEVEL)
+     {
+	HiSetCurrentPriority(APIC_TPR_MAX - 16);
+	popfl(Flags);
+	return;
+     }
+
+   if (CurrentIrql > DISPATCH_LEVEL)
+     {
+	HiSetCurrentPriority(IRQL2TPR(CurrentIrql));
+	popfl(Flags);
+	return;
+     }
+
+   /* Pass all interrupts */
+   HiSetCurrentPriority(0);
+
+   if (CurrentIrql == DISPATCH_LEVEL)
+     {
+	popfl(Flags);
+	return;
+     }
+
+   if (CurrentIrql == APC_LEVEL)
+     {
+	if (DpcQueueSize > 0 )
+	  {
+	     KeSetCurrentIrql(DISPATCH_LEVEL);
+	     __asm__("sti\n\t");
+	     KiDispatchInterrupt();
+	     __asm__("cli\n\t");
+	     KeSetCurrentIrql(PASSIVE_LEVEL);
+	  }
+	popfl(Flags);
+	return;
+     }
+
+  CurrentThread = KeGetCurrentThread();
+
+  if (CurrentIrql == PASSIVE_LEVEL && 
+       CurrentThread != NULL && 
+       CurrentThread->ApcState.KernelApcPending)
+     {
+	KeSetCurrentIrql(APC_LEVEL);
+	__asm__("sti\n\t");
+	KiDeliverApc(0, 0, 0);
+	__asm__("cli\n\t");
+	KeSetCurrentIrql(PASSIVE_LEVEL);
+	popfl(Flags);
+     }
+   else
+     {
+	popfl(Flags);
+     }
+}
+
+
+KIRQL STDCALL KeGetCurrentIrql (VOID)
+/*
+ * PURPOSE: Returns the current irq level
+ * RETURNS: The current irq level
+ */
+{
+   return(KeGetCurrentKPCR()->Irql);
+}
+
+
+static VOID KeSetCurrentIrql(KIRQL newlvl)
+/*
+ * PURPOSE: Sets the current irq level without taking any action
+ */
+{
+//   DPRINT("KeSetCurrentIrql(newlvl %x)\n",newlvl);
+
+   KeGetCurrentKPCR()->Irql = newlvl;
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KfLowerIrql
+ *
+ * DESCRIPTION
+ *	Restores the irq level on the current processor
+ *
+ * ARGUMENTS
+ *	NewIrql = Irql to lower to
+ *
+ * RETURN VALUE
+ *	None
+ *
+ * NOTES
+ *	Uses fastcall convention
+ */
+
+VOID FASTCALL
+KfLowerIrql (
+	KIRQL	NewIrql
+	)
+{
+  KIRQL CurrentIrql;
+  KIRQL OldIrql;
+  ULONG Flags;
+
+  //DbgPrint("KfLowerIrql(NewIrql %d)\n", NewIrql);
+
+  pushfl(Flags);
+  __asm__ ("\n\tcli\n\t");
+
+  CurrentIrql = KeGetCurrentKPCR()->Irql;
+  
+  if (NewIrql > CurrentIrql)
+    {
+      DbgPrint ("(%s:%d) NewIrql %x CurrentIrql %x\n",
+		__FILE__, __LINE__, NewIrql, CurrentIrql);
+      KeBugCheck(0);
+      for(;;);
+    }
+  
+  OldIrql = CurrentIrql;
+  KeGetCurrentKPCR()->Irql = NewIrql;
+  HiSwitchIrql(OldIrql, Flags);
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KeLowerIrql
+ *
+ * DESCRIPTION
+ *	Restores the irq level on the current processor
+ *
+ * ARGUMENTS
+ *	NewIrql = Irql to lower to
+ *
+ * RETURN VALUE
+ *	None
+ *
+ * NOTES
+ */
+
+VOID
+STDCALL
+KeLowerIrql (
+	KIRQL	NewIrql
+	)
+{
+	KfLowerIrql (NewIrql);
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KfRaiseIrql
+ *
+ * DESCRIPTION
+ *	Raises the hardware priority (irql)
+ *
+ * ARGUMENTS
+ *	NewIrql = Irql to raise to
+ *
+ * RETURN VALUE
+ *	previous irq level
+ *
+ * NOTES
+ *	Uses fastcall convention
+ */
+
+KIRQL
+FASTCALL
+KfRaiseIrql (
+	KIRQL	NewIrql
+	)
+{
+  KIRQL CurrentIrql;
+  KIRQL OldIrql;
+  ULONG Flags;
+
+  //DbgPrint("KfRaiseIrql(NewIrql %d)\n", NewIrql);
+
+  pushfl(Flags);
+   __asm__ ("\n\tcli\n\t");
+
+  CurrentIrql = KeGetCurrentKPCR()->Irql;
+
+	if (NewIrql < CurrentIrql)
+	{
+		DbgPrint ("%s:%d CurrentIrql %x NewIrql %x\n",
+		          __FILE__,__LINE__,CurrentIrql,NewIrql);
+		KeBugCheck (0);
+		for(;;);
+	}
+
+	OldIrql = CurrentIrql;
+	KeGetCurrentKPCR()->Irql = NewIrql;
+
+  //DPRINT("NewIrql %x OldIrql %x\n", NewIrql, OldIrql);
+	HiSwitchIrql(OldIrql, Flags);
+	return OldIrql;
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KeRaiseIrql
+ *
+ * DESCRIPTION
+ *	Raises the hardware priority (irql)
+ *
+ * ARGUMENTS
+ *	NewIrql = Irql to raise to
+ *	OldIrql (OUT) = Caller supplied storage for the previous irql
+ *
+ * RETURN VALUE
+ *	None
+ *
+ * NOTES
+ *	Calls KfRaiseIrql
+ */
+
+VOID
+STDCALL
+KeRaiseIrql (
+	KIRQL	NewIrql,
+	PKIRQL	OldIrql
+	)
+{
+	*OldIrql = KfRaiseIrql (NewIrql);
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KeRaiseIrqlToDpcLevel
+ *
+ * DESCRIPTION
+ *	Raises the hardware priority (irql) to DISPATCH level
+ *
+ * ARGUMENTS
+ *	None
+ *
+ * RETURN VALUE
+ *	Previous irq level
+ *
+ * NOTES
+ *	Calls KfRaiseIrql
+ */
+
+KIRQL
+STDCALL
+KeRaiseIrqlToDpcLevel (VOID)
+{
+	return KfRaiseIrql (DISPATCH_LEVEL);
+}
+
+
+/**********************************************************************
+ * NAME							EXPORTED
+ *	KeRaiseIrqlToSynchLevel
+ *
+ * DESCRIPTION
+ *	Raises the hardware priority (irql) to CLOCK2 level
+ *
+ * ARGUMENTS
+ *	None
+ *
+ * RETURN VALUE
+ *	Previous irq level
+ *
+ * NOTES
+ *	Calls KfRaiseIrql
+ */
+
+KIRQL
+STDCALL
+KeRaiseIrqlToSynchLevel (VOID)
+{
+	return KfRaiseIrql (CLOCK2_LEVEL);
+}
+
+
+BOOLEAN STDCALL HalBeginSystemInterrupt (ULONG Vector,
+					 KIRQL Irql,
+					 PKIRQL OldIrql)
+{
+  DPRINT("Vector (0x%X)  Irql (0x%X)\n",
+    Vector, Irql);
+
+  if (Vector < FIRST_DEVICE_VECTOR ||
+    Vector > FIRST_DEVICE_VECTOR + NUMBER_DEVICE_VECTORS) {
+    DPRINT("Not a device interrupt\n");
+	  return FALSE;
+  }
+
+  /*
+   * Acknowledge the interrupt
+   */
+  APICSendEOI();
+
+  *OldIrql = KeGetCurrentIrql();
+
+  KeSetCurrentIrql(Irql);
+
+  return TRUE;
+}
+
+
+VOID STDCALL HalEndSystemInterrupt (KIRQL Irql,
+				    ULONG Unknown2)
+{
+   KeSetCurrentIrql(Irql);
+}
+
+
+BOOLEAN STDCALL HalDisableSystemInterrupt (ULONG Vector,
+					   ULONG Unknown2)
+{
+  ULONG irq;
+
+  DPRINT("Vector (0x%X)\n", Vector);
+
+  if (Vector < FIRST_DEVICE_VECTOR ||
+    Vector > FIRST_DEVICE_VECTOR + NUMBER_DEVICE_VECTORS)  {
+    DPRINT("Not a device interrupt\n");
+	  return FALSE;
+  }
+
+  irq = VECTOR2IRQ(Vector);
+
+  IOAPICMaskIrq(0, irq);
+
+  return TRUE;
+}
+
+
+BOOLEAN STDCALL HalEnableSystemInterrupt (ULONG Vector,
+					  ULONG Unknown2,
+					  ULONG Unknown3)
+{
+  ULONG irq;
+
+  DPRINT("Vector (0x%X)\n", Vector);
+
+  if (Vector < FIRST_DEVICE_VECTOR ||
+    Vector > FIRST_DEVICE_VECTOR + NUMBER_DEVICE_VECTORS) {
+    DPRINT("Not a device interrupt\n");
+	  return FALSE;
+  }
+
+  irq = VECTOR2IRQ(Vector);
+
+  IOAPICUnmaskIrq(0, irq);
+
+  return TRUE;
+}
+
+/* EOF */

reactos/hal/halx86/pci.c

@@ -0,0 +1,494 @@
+/* $Id: pci.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/pci.c
+ * PURPOSE:         Interfaces to the PCI bus
+ * PROGRAMMER:      David Welch (welch@mcmail.com)
+ *                  Eric Kohl (ekohl@rz-online.de)
+ * UPDATE HISTORY:
+ *                  05/06/1998: Created
+ *                  17/08/2000: Added preliminary pci bus scanner
+ *                  13/06/2001: Implemented access to pci configuration space
+ */
+
+/*
+ * NOTES: Sections copied from the Linux pci support
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+#include <bus.h>
+
+#define NDEBUG
+#include <internal/debug.h>
+
+
+/* MACROS ******************************************************************/
+
+/* access type 1 macros */
+#define PCI_FUNC(devfn) \
+	((devfn) & 0x07)
+#define CONFIG_CMD(bus, device_fn, where) \
+	(0x80000000 | (bus << 16) | (device_fn << 8) | (where & ~3))
+
+/* access type 2 macros */
+#define IOADDR(devfn, where) \
+	((0xC000 | ((devfn & 0x78) << 5)) + where)
+#define FUNC(devfn) \
+	(((devfn & 7) << 1) | 0xf0)
+
+
+#define PCIBIOS_SUCCESSFUL		0x00
+#define PCIBIOS_DEVICE_NOT_FOUND	0x86
+#define PCIBIOS_BAD_REGISTER_NUMBER	0x87
+
+
+/* GLOBALS ******************************************************************/
+
+static ULONG BusConfigType = 0;  /* undetermined config type */
+
+
+/* FUNCTIONS ****************************************************************/
+
+static NTSTATUS
+ReadPciConfigUchar(UCHAR Bus,
+		   UCHAR Slot,
+		   UCHAR Offset,
+		   PUCHAR Value)
+{
+   switch (BusConfigType)
+     {
+     case 1:
+	WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
+	*Value = READ_PORT_UCHAR((PUCHAR)0xCFC + (Offset & 3));
+	return STATUS_SUCCESS;
+
+     case 2:
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
+	WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
+	*Value = READ_PORT_UCHAR((PUCHAR)(IOADDR(Slot, Offset)));
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
+	return STATUS_SUCCESS;
+     }
+   return STATUS_UNSUCCESSFUL;
+}
+
+
+static NTSTATUS
+ReadPciConfigUshort(UCHAR Bus,
+		    UCHAR Slot,
+		    UCHAR Offset,
+		    PUSHORT Value)
+{
+   if ((Offset & 1) != 0)
+     {
+	return PCIBIOS_BAD_REGISTER_NUMBER;
+     }
+
+   switch (BusConfigType)
+     {
+     case 1:
+	WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
+	*Value = READ_PORT_USHORT((PUSHORT)0xCFC + (Offset & 1));
+	return STATUS_SUCCESS;
+
+     case 2:
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
+	WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
+	*Value = READ_PORT_USHORT((PUSHORT)(IOADDR(Slot, Offset)));
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
+	return STATUS_SUCCESS;
+     }
+   return STATUS_UNSUCCESSFUL;
+}
+
+
+static NTSTATUS
+ReadPciConfigUlong(UCHAR Bus,
+		   UCHAR Slot,
+		   UCHAR Offset,
+		   PULONG Value)
+{
+   if ((Offset & 3) != 0)
+     {
+	return PCIBIOS_BAD_REGISTER_NUMBER;
+     }
+
+   switch (BusConfigType)
+     {
+     case 1:
+	WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
+	*Value = READ_PORT_ULONG((PULONG)0xCFC);
+	return STATUS_SUCCESS;
+
+     case 2:
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
+	WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
+	*Value = READ_PORT_ULONG((PULONG)(IOADDR(Slot, Offset)));
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
+	return STATUS_SUCCESS;
+     }
+   return STATUS_UNSUCCESSFUL;
+}
+
+
+static NTSTATUS
+WritePciConfigUchar(UCHAR Bus,
+		    UCHAR Slot,
+		    UCHAR Offset,
+		    UCHAR Value)
+{
+   switch (BusConfigType)
+     {
+     case 1:
+	WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
+	WRITE_PORT_UCHAR((PUCHAR)0xCFC + (Offset&3), Value);
+	return STATUS_SUCCESS;
+
+     case 2:
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
+	WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
+	WRITE_PORT_UCHAR((PUCHAR)(IOADDR(Slot,Offset)), Value);
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
+	return STATUS_SUCCESS;
+     }
+   return STATUS_UNSUCCESSFUL;
+}
+
+
+static NTSTATUS
+WritePciConfigUshort(UCHAR Bus,
+		     UCHAR Slot,
+		     UCHAR Offset,
+		     USHORT Value)
+{
+   if ((Offset & 1) != 0)
+     {
+	return PCIBIOS_BAD_REGISTER_NUMBER;
+     }
+
+   switch (BusConfigType)
+     {
+     case 1:
+	WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
+	WRITE_PORT_USHORT((PUSHORT)0xCFC + (Offset & 1), Value);
+	return STATUS_SUCCESS;
+
+     case 2:
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
+	WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
+	WRITE_PORT_USHORT((PUSHORT)(IOADDR(Slot, Offset)), Value);
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
+	return STATUS_SUCCESS;
+     }
+   return STATUS_UNSUCCESSFUL;
+}
+
+
+static NTSTATUS
+WritePciConfigUlong(UCHAR Bus,
+		    UCHAR Slot,
+		    UCHAR Offset,
+		    ULONG Value)
+{
+   if ((Offset & 3) != 0)
+     {
+	return PCIBIOS_BAD_REGISTER_NUMBER;
+     }
+
+   switch (BusConfigType)
+     {
+     case 1:
+	WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
+	WRITE_PORT_ULONG((PULONG)0xCFC, Value);
+	return STATUS_SUCCESS;
+
+     case 2:
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(Slot));
+	WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
+	WRITE_PORT_ULONG((PULONG)(IOADDR(Slot, Offset)), Value);
+	WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
+	return STATUS_SUCCESS;
+     }
+   return STATUS_UNSUCCESSFUL;
+}
+
+
+static ULONG STDCALL
+HalpGetPciData(PBUS_HANDLER BusHandler,
+	       ULONG BusNumber,
+	       ULONG SlotNumber,
+	       PVOID Buffer,
+	       ULONG Offset,
+	       ULONG Length)
+{
+   PVOID Ptr = Buffer;
+   ULONG Address = Offset;
+   ULONG Len = Length;
+   ULONG Vendor;
+   UCHAR HeaderType;
+
+   DPRINT("HalpGetPciData() called.\n");
+   DPRINT("  BusNumber %lu\n", BusNumber);
+   DPRINT("  SlotNumber %lu\n", SlotNumber);
+   DPRINT("  Offset 0x%lx\n", Offset);
+   DPRINT("  Length 0x%lx\n", Length);
+
+   if ((Length == 0) || (BusConfigType == 0))
+     return 0;
+
+   /* 0E=PCI_HEADER_TYPE */
+   ReadPciConfigUchar(BusNumber,
+		      SlotNumber & 0xF8,
+		      0x0E,
+		      &HeaderType);
+   if (((HeaderType & 0x80) == 0) && ((SlotNumber & 0x07) != 0))
+     return 0;
+
+   ReadPciConfigUlong(BusNumber,
+		      SlotNumber,
+		      0x00,
+		      &Vendor);
+   /* some broken boards return 0 if a slot is empty: */
+   if (Vendor == 0xFFFFFFFF || Vendor == 0)
+     return 0;
+
+   if ((Address & 1) && (Len >= 1))
+     {
+	ReadPciConfigUchar(BusNumber,
+			   SlotNumber,
+			   Address,
+			   Ptr);
+	Ptr = Ptr + 1;
+	Address++;
+	Len--;
+     }
+
+   if ((Address & 2) && (Len >= 2))
+     {
+	ReadPciConfigUshort(BusNumber,
+			    SlotNumber,
+			    Address,
+			    Ptr);
+	Ptr = Ptr + 2;
+	Address += 2;
+	Len -= 2;
+     }
+
+   while (Len >= 4)
+     {
+	ReadPciConfigUlong(BusNumber,
+			   SlotNumber,
+			   Address,
+			   Ptr);
+	Ptr = Ptr + 4;
+	Address += 4;
+	Len -= 4;
+     }
+
+   if (Len >= 2)
+     {
+	ReadPciConfigUshort(BusNumber,
+			    SlotNumber,
+			    Address,
+			    Ptr);
+	Ptr = Ptr + 2;
+	Address += 2;
+	Len -= 2;
+     }
+
+   if (Len >= 1)
+     {
+	ReadPciConfigUchar(BusNumber,
+			   SlotNumber,
+			   Address,
+			   Ptr);
+	Ptr = Ptr + 1;
+	Address++;
+	Len--;
+     }
+
+   return Length - Len;
+}
+
+
+static ULONG STDCALL
+HalpSetPciData(PBUS_HANDLER BusHandler,
+	       ULONG BusNumber,
+	       ULONG SlotNumber,
+	       PVOID Buffer,
+	       ULONG Offset,
+	       ULONG Length)
+{
+   PVOID Ptr = Buffer;
+   ULONG Address = Offset;
+   ULONG Len = Length;
+   ULONG Vendor;
+   UCHAR HeaderType;
+
+   DPRINT("HalpSetPciData() called.\n");
+   DPRINT("  BusNumber %lu\n", BusNumber);
+   DPRINT("  SlotNumber %lu\n", SlotNumber);
+   DPRINT("  Offset 0x%lx\n", Offset);
+   DPRINT("  Length 0x%lx\n", Length);
+
+   if ((Length == 0) || (BusConfigType == 0))
+     return 0;
+
+   /* 0E=PCI_HEADER_TYPE */
+   ReadPciConfigUchar(BusNumber,
+		      SlotNumber & 0xF8,
+		      0x0E,
+		      &HeaderType);
+   if (((HeaderType & 0x80) == 0) && ((SlotNumber & 0x07) != 0))
+     return 0;
+
+   ReadPciConfigUlong(BusNumber,
+		      SlotNumber,
+		      0x00,
+		      &Vendor);
+   /* some broken boards return 0 if a slot is empty: */
+   if (Vendor == 0xFFFFFFFF || Vendor == 0)
+     return 0;
+
+   if ((Address & 1) && (Len >= 1))
+     {
+	WritePciConfigUchar(BusNumber,
+			    SlotNumber,
+			    Address,
+			    *(PUCHAR)Ptr);
+	Ptr = Ptr + 1;
+	Address++;
+	Len--;
+     }
+
+   if ((Address & 2) && (Len >= 2))
+     {
+	WritePciConfigUshort(BusNumber,
+			     SlotNumber,
+			     Address,
+			     *(PUSHORT)Ptr);
+	Ptr = Ptr + 2;
+	Address += 2;
+	Len -= 2;
+     }
+
+   while (Len >= 4)
+     {
+	WritePciConfigUlong(BusNumber,
+			    SlotNumber,
+			    Address,
+			    *(PULONG)Ptr);
+	Ptr = Ptr + 4;
+	Address += 4;
+	Len -= 4;
+     }
+
+   if (Len >= 2)
+     {
+	WritePciConfigUshort(BusNumber,
+			     SlotNumber,
+			     Address,
+			     *(PUSHORT)Ptr);
+	Ptr = Ptr + 2;
+	Address += 2;
+	Len -= 2;
+     }
+
+   if (Len >= 1)
+     {
+	WritePciConfigUchar(BusNumber,
+			    SlotNumber,
+			    Address,
+			    *(PUCHAR)Ptr);
+	Ptr = Ptr + 1;
+	Address++;
+	Len--;
+     }
+
+   return Length - Len;
+}
+
+
+static ULONG
+GetBusConfigType(VOID)
+{
+   ULONG Value;
+
+   DPRINT("GetBusConfigType() called\n");
+
+   DPRINT("Checking configuration type 1:");
+   WRITE_PORT_UCHAR((PUCHAR)0xCFB, 0x01);
+   Value = READ_PORT_ULONG((PULONG)0xCF8);
+   WRITE_PORT_ULONG((PULONG)0xCF8, 0x80000000);
+   if (READ_PORT_ULONG((PULONG)0xCF8) == 0x80000000)
+     {
+	WRITE_PORT_ULONG((PULONG)0xCF8, Value);
+	DPRINT("  Success!\n");
+	return 1;
+     }
+   WRITE_PORT_ULONG((PULONG)0xCF8, Value);
+   DPRINT("  Unsuccessful!\n");
+
+   DPRINT("Checking configuration type 2:");
+   WRITE_PORT_UCHAR((PUCHAR)0xCFB, 0x00);
+   WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0x00);
+   WRITE_PORT_UCHAR((PUCHAR)0xCFA, 0x00);
+   if (READ_PORT_UCHAR((PUCHAR)0xCF8) == 0x00 &&
+       READ_PORT_UCHAR((PUCHAR)0xCFB) == 0x00)
+     {
+	DPRINT("  Success!\n");
+	return 2;
+     }
+   DPRINT("  Unsuccessful!\n");
+
+   DPRINT("No pci bus found!\n");
+   return 0;
+}
+
+
+VOID HalpInitPciBus (VOID)
+{
+   PBUS_HANDLER BusHandler;
+
+   DPRINT("HalpInitPciBus() called.\n");
+
+   BusConfigType = GetBusConfigType();
+   if (BusConfigType == 0)
+     return;
+
+   DPRINT("Bus configuration %lu used\n", BusConfigType);
+
+   /* pci bus (bus 0) handler */
+   BusHandler = HalpAllocateBusHandler(PCIBus,
+				       PCIConfiguration,
+				       0);
+   BusHandler->GetBusData = (pGetSetBusData)HalpGetPciData;
+   BusHandler->SetBusData = (pGetSetBusData)HalpSetPciData;
+//	BusHandler->GetInterruptVector =
+//		(pGetInterruptVector)HalpGetPciInterruptVector;
+//	BusHandler->AdjustResourceList =
+//		(pGetSetBusData)HalpAdjustPciResourceList;
+//	BusHandler->AssignSlotResources =
+//		(pGetSetBusData)HalpAssignPciSlotResources;
+
+
+   /* agp bus (bus 1) handler */
+   BusHandler = HalpAllocateBusHandler(PCIBus,
+				       PCIConfiguration,
+				       1);
+   BusHandler->GetBusData = (pGetSetBusData)HalpGetPciData;
+   BusHandler->SetBusData = (pGetSetBusData)HalpSetPciData;
+//	BusHandler->GetInterruptVector =
+//		(pGetInterruptVector)HalpGetPciInterruptVector;
+//	BusHandler->AdjustResourceList =
+//		(pGetSetBusData)HalpAdjustPciResourceList;
+//	BusHandler->AssignSlotResources =
+//		(pGetSetBusData)HalpAssignPciSlotResources;
+
+   DPRINT("HalpInitPciBus() finished.\n");
+}
+
+/* EOF */

reactos/hal/halx86/perfcnt.c

@@ -0,0 +1,62 @@
+/* $Id: perfcnt.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:      See COPYING in the top level directory
+ * PROJECT:        ReactOS kernel
+ * FILE:           ntoskrnl/hal/x86/perfcnt.c
+ * PURPOSE:        Performance counter functions
+ * PROGRAMMER:     David Welch (welch@mcmail.com)
+ *                 Eric Kohl (ekohl@rz-online.de)
+ * UPDATE HISTORY:
+ *                 09/06/2000: Created
+ */
+
+
+/* INCLUDES ***************************************************************/
+
+#include <ddk/ntddk.h>
+
+/* FUNCTIONS **************************************************************/
+
+
+VOID STDCALL
+HalCalibratePerformanceCounter(ULONG Count)
+{
+   ULONG i;
+
+   /* save flags and disable interrupts */
+   __asm__("pushf\n\t" \
+	   "cli\n\t");
+
+   for (i = 0; i < Count; i++);
+
+   /* restore flags */
+   __asm__("popf\n\t");
+}
+
+
+LARGE_INTEGER STDCALL
+KeQueryPerformanceCounter(PLARGE_INTEGER PerformanceFreq)
+/*
+ * FUNCTION: Queries the finest grained running count avaiable in the system
+ * ARGUMENTS:
+ *         PerformanceFreq (OUT) = The routine stores the number of 
+ *                                 performance counters tick per second here
+ * RETURNS: The performance counter value in HERTZ
+ * NOTE: Returns the system tick count or the time-stamp on the pentium
+ */
+{
+  if (PerformanceFreq != NULL)
+    {
+      PerformanceFreq->QuadPart = 0;
+      return *PerformanceFreq;
+    }
+  else
+    {
+     LARGE_INTEGER Value;
+
+     Value.QuadPart = 0; 
+     return Value;
+    }
+}
+
+/* EOF */

reactos/hal/halx86/portio.c

@@ -0,0 +1,182 @@
+/* $Id: portio.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/portio.c
+ * PURPOSE:         Port I/O functions
+ * PROGRAMMER:      Eric Kohl (ekohl@abo.rhein-zeitung.de)
+ * UPDATE HISTORY:
+ *                  Created 18/10/99
+ */
+
+#include <ddk/ntddk.h>
+
+
+/* FUNCTIONS ****************************************************************/
+
+/*
+ * This file contains the definitions for the x86 IO instructions
+ * inb/inw/inl/outb/outw/outl and the "string versions" of the same
+ * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
+ * versions of the single-IO instructions (inb_p/inw_p/..).
+ *
+ * This file is not meant to be obfuscating: it's just complicated
+ * to (a) handle it all in a way that makes gcc able to optimize it
+ * as well as possible and (b) trying to avoid writing the same thing
+ * over and over again with slight variations and possibly making a
+ * mistake somewhere.
+ */
+
+/*
+ * Thanks to James van Artsdalen for a better timing-fix than
+ * the two short jumps: using outb's to a nonexistent port seems
+ * to guarantee better timings even on fast machines.
+ *
+ * On the other hand, I'd like to be sure of a non-existent port:
+ * I feel a bit unsafe about using 0x80 (should be safe, though)
+ *
+ *		Linus
+ */
+
+#ifdef SLOW_IO_BY_JUMPING
+#define __SLOW_DOWN_IO __asm__ __volatile__("jmp 1f\n1:\tjmp 1f\n1:")
+#else
+#define __SLOW_DOWN_IO __asm__ __volatile__("outb %al,$0x80")
+#endif
+
+#ifdef REALLY_SLOW_IO
+#define SLOW_DOWN_IO { __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; }
+#else
+#define SLOW_DOWN_IO __SLOW_DOWN_IO
+#endif
+
+VOID STDCALL
+READ_PORT_BUFFER_UCHAR (PUCHAR Port,
+                        PUCHAR Buffer,
+                        ULONG Count)
+{
+   __asm__ __volatile__ ("cld ; rep ; insb\n\t" 
+			 : "=D" (Buffer), "=c" (Count) 
+			 : "d" (Port),"0" (Buffer),"1" (Count));
+}
+
+VOID STDCALL
+READ_PORT_BUFFER_USHORT (PUSHORT Port,
+                         PUSHORT Buffer,
+                         ULONG Count)
+{
+   __asm__ __volatile__ ("cld ; rep ; insw"
+			 : "=D" (Buffer), "=c" (Count) 
+			 : "d" (Port),"0" (Buffer),"1" (Count));
+}
+
+VOID STDCALL
+READ_PORT_BUFFER_ULONG (PULONG Port,
+                        PULONG Buffer,
+                        ULONG Count)
+{
+   __asm__ __volatile__ ("cld ; rep ; insl"
+			 : "=D" (Buffer), "=c" (Count) 
+			 : "d" (Port),"0" (Buffer),"1" (Count));
+}
+
+UCHAR STDCALL
+READ_PORT_UCHAR (PUCHAR Port)
+{
+   UCHAR Value;
+   
+   __asm__("inb %w1, %0\n\t"
+	   : "=a" (Value)
+	   : "d" (Port));
+   SLOW_DOWN_IO;
+   return(Value);
+}
+
+USHORT STDCALL
+READ_PORT_USHORT (PUSHORT Port)
+{
+   USHORT Value;
+   
+   __asm__("inw %w1, %0\n\t"
+	   : "=a" (Value)
+	   : "d" (Port));
+   SLOW_DOWN_IO;
+   return(Value);
+}
+
+ULONG STDCALL
+READ_PORT_ULONG (PULONG Port)
+{
+   ULONG Value;
+   
+   __asm__("inl %w1, %0\n\t"
+	   : "=a" (Value)
+	   : "d" (Port));
+   SLOW_DOWN_IO;
+   return(Value);
+}
+
+VOID STDCALL
+WRITE_PORT_BUFFER_UCHAR (PUCHAR Port,
+                         PUCHAR Buffer,
+                         ULONG Count)
+{
+   __asm__ __volatile__ ("cld ; rep ; outsb" 
+			 : "=S" (Buffer), "=c" (Count) 
+			 : "d" (Port),"0" (Buffer),"1" (Count));
+}
+
+VOID STDCALL
+WRITE_PORT_BUFFER_USHORT (PUSHORT Port,
+                          PUSHORT Buffer,
+                          ULONG Count)
+{
+   __asm__ __volatile__ ("cld ; rep ; outsw"
+			 : "=S" (Buffer), "=c" (Count) 
+			 : "d" (Port),"0" (Buffer),"1" (Count));
+}
+
+VOID STDCALL
+WRITE_PORT_BUFFER_ULONG (PULONG Port,
+                         PULONG Buffer,
+                         ULONG Count)
+{
+   __asm__ __volatile__ ("cld ; rep ; outsl" 
+			 : "=S" (Buffer), "=c" (Count) 
+			 : "d" (Port),"0" (Buffer),"1" (Count));
+}
+
+VOID STDCALL
+WRITE_PORT_UCHAR (PUCHAR Port,
+                  UCHAR Value)
+{
+   __asm__("outb %0, %w1\n\t"
+	   : 
+	   : "a" (Value),
+	     "d" (Port));
+   SLOW_DOWN_IO;
+}
+
+VOID STDCALL
+WRITE_PORT_USHORT (PUSHORT Port,
+                   USHORT Value)
+{
+   __asm__("outw %0, %w1\n\t"
+	   : 
+	   : "a" (Value),
+	     "d" (Port));
+   SLOW_DOWN_IO;
+}
+
+VOID STDCALL
+WRITE_PORT_ULONG (PULONG Port,
+                  ULONG Value)
+{
+   __asm__("outl %0, %w1\n\t"
+	   : 
+	   : "a" (Value),
+	     "d" (Port));
+   SLOW_DOWN_IO;
+}
+
+/* EOF */

reactos/hal/halx86/pwroff.c

@@ -0,0 +1,114 @@
+/* $Id: pwroff.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * FILE       : reactos/hal/x86/apm.c
+ * DESCRIPTION: Turn CPU off...
+ * PROJECT    : ReactOS Operating System
+ * AUTHOR     : D. Lindauer (July 11 1997)
+ * NOTE       : This program is public domain
+ * REVISIONS  :
+ * 	1999-12-26
+ */
+
+#define APM_FUNCTION_AVAILABLE	0x5300
+#define APM_FUNCTION_CONNREAL	0x5301
+#define APM_FUNCTION_POWEROFF	0x5307
+#define APM_FUNCTION_ENABLECPU	0x530d
+#define APM_FUNCTION_ENABLEAPM	0x530e
+
+#define APM_DEVICE_BIOS 	0
+#define APM_DEVICE_ALL		1
+
+#define APM_MODE_DISABLE	0
+#define APM_MODE_ENABLE		1
+
+
+
+nopm	db	'No power management functionality',10,13,'$'
+errmsg	db	'Power management error',10,13,'$'
+wrongver db	'Need APM version 1.1 or better',10,13,'$'
+;
+; Entry point
+;
+go:
+	mov	dx,offset nopm
+	jc	error
+	cmp	ax,101h			; See if version 1.1 or greater
+	mov	dx,offset wrongver
+	jc	error
+	
+	mov	[ver],ax
+	mov	ax,5301h		; Do a real mode connection
+	mov	bx,0			; device = BIOS
+	int	15h
+	jnc	noconerr
+	
+	cmp	ah,2			; Pass if already connected
+	mov	dx,offset errmsg	; else error
+	jnz	error
+noconerr:
+	mov	ax,530eh		; Enable latest version of APM
+	mov	bx,0			; device = BIOS
+	mov	cx,[ver]		; version
+	int	15h
+	mov	dx,offset errmsg
+	jc	error
+	
+	mov	ax,530dh		; Now engage and enable CPU management
+	mov	bx,1			; device = all
+	mov	cx,1			; enable
+	int	15h
+	mov	dx,offset errmsg
+	jc	error
+	
+	mov	ax,530fh
+	mov	bx,1			; device = ALL
+	mov	cx,1			; enable
+	int	15h
+	mov	dx,offset errmsg
+	jc	error
+
+	mov	dx,offset errmsg
+error:
+	call	print
+	mov	ax,4c01h
+	int	21h
+	int 3
+	end start
+
+
+BOOLEAN
+ApmCall (
+	DWORD	Function,
+	DWORD	Device,
+	DWORD	Mode
+	)
+{
+	/* AX <== Function */
+	/* BX <== Device */
+	/* CX <== Mode */
+	__asm__("int 21\n"); /* 0x15 */
+}
+
+
+BOOLEAN
+HalPowerOff (VOID)
+{
+	ApmCall (
+		APM_FUNCTION_AVAILABLE,
+		APM_DEVICE_BIOS,
+		0
+		);
+	ApmCall (
+		APM_FUNCTION_ENABLEAPM,
+		);
+	/* Shutdown CPU */
+	ApmCall (
+		APM_FUNCTION_POWEROFF,
+		APM_DEVICE_ALL,
+		3
+		);
+	return TRUE;
+}
+
+
+/* EOF */

reactos/hal/halx86/reboot.c

@@ -0,0 +1,74 @@
+/* $Id: reboot.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/reboot.c
+ * PURPOSE:         Reboot functions.
+ * PROGRAMMER:      Eric Kohl (ekohl@abo.rhein-zeitung.de)
+ * UPDATE HISTORY:
+ *                  Created 11/10/99
+ */
+
+
+#include <ddk/ntddk.h>
+#include <hal.h>
+
+
+static VOID
+HalReboot (VOID)
+{
+    char data;
+    BYTE *mem;
+
+    /* enable warm reboot */
+    mem = (BYTE *)(0xd0000000 + 0x0000);
+//    mem = HalMapPhysicalMemory (0, 1);
+    mem[0x472] = 0x34;
+    mem[0x473] = 0x12;
+
+    /* disable interrupts */
+    __asm__("cli\n");
+
+    /* disable periodic interrupt (RTC) */
+    WRITE_PORT_UCHAR((PUCHAR)0x70, 0x0b);
+    data = READ_PORT_UCHAR((PUCHAR)0x71);
+    WRITE_PORT_UCHAR((PUCHAR)0x71, data & 0xbf);
+
+    /* */
+    WRITE_PORT_UCHAR((PUCHAR)0x70, 0x0a);
+    data = READ_PORT_UCHAR((PUCHAR)0x71);
+    WRITE_PORT_UCHAR((PUCHAR)0x71, (data & 0xf0) | 0x06);
+
+    /* */
+    WRITE_PORT_UCHAR((PUCHAR)0x70, 0x15);
+
+    /* generate RESET signal via keyboard controller */
+    WRITE_PORT_UCHAR((PUCHAR)0x64, 0xfe);
+
+    /* stop the processor */
+#if 1
+    __asm__("hlt\n");
+#else
+   for(;;);
+#endif   
+}
+
+
+VOID STDCALL
+HalReturnToFirmware (
+	ULONG	Action
+	)
+{
+    if (Action == FIRMWARE_HALT)
+    {
+        DbgPrint ("HalReturnToFirmware called!\n");
+        DbgBreakPoint ();
+    }
+    else if (Action == FIRMWARE_REBOOT)
+    {
+        HalResetDisplay ();
+        HalReboot ();
+    }
+}
+
+/* EOF */

reactos/hal/halx86/spinlock.c

@@ -0,0 +1,95 @@
+/* $Id: spinlock.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/spinlock.c
+ * PURPOSE:         Implements spinlocks
+ * PROGRAMMER:      David Welch (welch@cwcom.net)
+ *                  Eric Kohl (ekohl@rz-online.de)
+ * UPDATE HISTORY:
+ *                  09/06/2000 Created
+ */
+
+/*
+ * NOTE: On a uniprocessor machine spinlocks are implemented by raising
+ * the irq level
+ */
+
+/* INCLUDES ****************************************************************/
+
+#include <ddk/ntddk.h>
+
+#include <internal/debug.h>
+
+/* FUNCTIONS ***************************************************************/
+
+VOID STDCALL
+KeAcquireSpinLock (
+	PKSPIN_LOCK	SpinLock,
+	PKIRQL		OldIrql
+	)
+/*
+ * FUNCTION: Acquires a spinlock
+ * ARGUMENTS:
+ *         SpinLock = Spinlock to acquire
+ *         OldIrql (OUT) = Caller supplied storage for the previous irql
+ */
+{
+   KeRaiseIrql(DISPATCH_LEVEL,OldIrql);
+   KeAcquireSpinLockAtDpcLevel(SpinLock);
+}
+
+KIRQL FASTCALL
+KeAcquireSpinLockRaiseToSynch (
+	PKSPIN_LOCK	SpinLock
+	)
+{
+   UNIMPLEMENTED;
+}
+
+VOID STDCALL
+KeReleaseSpinLock (
+	PKSPIN_LOCK	SpinLock,
+	KIRQL		NewIrql
+	)
+/*
+ * FUNCTION: Releases a spinlock
+ * ARGUMENTS:
+ *        SpinLock = Spinlock to release
+ *        NewIrql = Irql level before acquiring the spinlock
+ */
+{
+   KeReleaseSpinLockFromDpcLevel(SpinLock);
+   KeLowerIrql(NewIrql);
+}
+
+KIRQL FASTCALL
+KfAcquireSpinLock (
+	PKSPIN_LOCK	SpinLock
+	)
+{
+   KIRQL OldIrql;
+
+   KeRaiseIrql(DISPATCH_LEVEL, &OldIrql);
+   KeAcquireSpinLockAtDpcLevel(SpinLock);
+
+   return OldIrql;
+}
+
+VOID FASTCALL
+KfReleaseSpinLock (
+	PKSPIN_LOCK	SpinLock,
+	KIRQL		NewIrql
+	)
+/*
+ * FUNCTION: Releases a spinlock
+ * ARGUMENTS:
+ *        SpinLock = Spinlock to release
+ *        NewIrql = Irql level before acquiring the spinlock
+ */
+{
+   KeReleaseSpinLockFromDpcLevel(SpinLock);
+   KeLowerIrql(NewIrql);
+}
+
+/* EOF */

reactos/hal/halx86/sysbus.c

@@ -0,0 +1,64 @@
+/* $Id: sysbus.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/sysbus.c
+ * PURPOSE:         System bus handler functions
+ * PROGRAMMER:      Eric Kohl (ekohl@rz-online.de)
+ * UPDATE HISTORY:
+ *                  09/04/2000 Created
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+#include <bus.h>
+
+
+/* FUNCTIONS ****************************************************************/
+
+ULONG STDCALL
+HalpGetSystemInterruptVector(PVOID BusHandler,
+			     ULONG BusNumber,
+			     ULONG BusInterruptLevel,
+			     ULONG BusInterruptVector,
+			     PKIRQL Irql,
+			     PKAFFINITY Affinity)
+{
+   *Irql = HIGH_LEVEL - BusInterruptVector;
+   *Affinity = 0xFFFFFFFF;
+   return BusInterruptVector;
+}
+
+
+BOOLEAN STDCALL
+HalpTranslateSystemBusAddress(PBUS_HANDLER BusHandler,
+			      ULONG BusNumber,
+			      PHYSICAL_ADDRESS BusAddress,
+			      PULONG AddressSpace,
+			      PPHYSICAL_ADDRESS TranslatedAddress)
+{
+   ULONG BaseAddress = 0;
+
+   if (*AddressSpace == 0)
+     {
+	/* memory space */
+
+     }
+   else if (*AddressSpace == 1)
+     {
+	/* io space */
+
+     }
+   else
+     {
+	/* other */
+	return FALSE;
+     }
+
+   TranslatedAddress->QuadPart = BusAddress.QuadPart + BaseAddress;
+
+   return TRUE;
+}
+
+/* EOF */

reactos/hal/halx86/sysinfo.c

@@ -0,0 +1,23 @@
+/*
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/sysinfo.c
+ * PURPOSE:         Getting system information
+ * PROGRAMMER:      David Welch (welch@mcmail.com)
+ * UPDATE HISTORY:
+ *                  Created 22/05/98
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+
+#include <internal/debug.h>
+
+/* FUNCTIONS *****************************************************************/
+
+VOID HalQuerySystemInformation()
+{
+   UNIMPLEMENTED;
+}
+   

reactos/hal/halx86/time.c

@@ -0,0 +1,307 @@
+/*
+ * COPYRIGHT:       See COPYING in the top level directory
+ * PROJECT:         ReactOS kernel
+ * FILE:            ntoskrnl/hal/x86/time.c
+ * PURPOSE:         Getting time information
+ * UPDATE HISTORY:
+ */
+
+/* INCLUDES *****************************************************************/
+
+#include <ddk/ntddk.h>
+#include <string.h>
+#include <mps.h>
+#include <bus.h>
+
+#define NDEBUG
+#include <internal/debug.h>
+
+/* MACROS and CONSTANTS ******************************************************/
+
+/* macro BCD_INT : convert bcd to int */
+#define BCD_INT(bcd) (((bcd & 0xf0) >> 4) * 10 + (bcd &0x0f))
+
+/* macro INT_BCD : convert int to bcd */
+#define INT_BCD(int) (((int / 10) << 4) + (int % 10))
+
+
+#define RTC_REGISTER_A   0x0A
+#define   RTC_REG_A_UIP  0x80  /* Update In Progress bit */
+
+#define RTC_REGISTER_B   0x0B
+
+#define RTC_REGISTER_CENTURY   0x32
+
+
+/* FUNCTIONS *****************************************************************/
+
+
+static UCHAR
+HalpQueryCMOS(UCHAR Reg)
+{
+  UCHAR Val;
+  ULONG Flags;
+
+  Reg |= 0x80;
+  pushfl(Flags);
+  __asm__("cli\n");  // AP unsure as to whether to do this here
+  WRITE_PORT_UCHAR((PUCHAR)0x70, Reg);
+  Val = READ_PORT_UCHAR((PUCHAR)0x71);
+  WRITE_PORT_UCHAR((PUCHAR)0x70, 0);
+  popfl(Flags);
+
+  return(Val);
+}
+
+
+static VOID
+HalpSetCMOS(UCHAR Reg,
+	    UCHAR Val)
+{
+  ULONG Flags;
+
+  Reg |= 0x80;
+  pushfl(Flags);
+  __asm__("cli\n");  // AP unsure as to whether to do this here
+  WRITE_PORT_UCHAR((PUCHAR)0x70, Reg);
+  WRITE_PORT_UCHAR((PUCHAR)0x71, Val);
+  WRITE_PORT_UCHAR((PUCHAR)0x70, 0);
+  popfl(Flags);
+}
+
+
+static UCHAR
+HalpQueryECMOS(USHORT Reg)
+{
+  UCHAR Val;
+  ULONG Flags;
+
+  pushfl(Flags);
+  __asm__("cli\n");  // AP unsure as to whether to do this here
+  WRITE_PORT_UCHAR((PUCHAR)0x74, (UCHAR)(Reg & 0x00FF));
+  WRITE_PORT_UCHAR((PUCHAR)0x75, (UCHAR)(Reg>>8));
+  Val = READ_PORT_UCHAR((PUCHAR)0x76);
+  popfl(Flags);
+
+  return(Val);
+}
+
+
+static VOID
+HalpSetECMOS(USHORT Reg,
+	     UCHAR Val)
+{
+  ULONG Flags;
+
+  pushfl(Flags);
+  __asm__("cli\n");  // AP unsure as to whether to do this here
+  WRITE_PORT_UCHAR((PUCHAR)0x74, (UCHAR)(Reg & 0x00FF));
+  WRITE_PORT_UCHAR((PUCHAR)0x75, (UCHAR)(Reg>>8));
+  WRITE_PORT_UCHAR((PUCHAR)0x76, Val);
+  popfl(Flags);
+}
+
+
+VOID STDCALL
+HalQueryRealTimeClock(PTIME_FIELDS Time)
+{
+    /* check 'Update In Progress' bit */
+    while (HalpQueryCMOS (RTC_REGISTER_A) & RTC_REG_A_UIP)
+        ;
+
+    Time->Second = BCD_INT(HalpQueryCMOS (0));
+    Time->Minute = BCD_INT(HalpQueryCMOS (2));
+    Time->Hour = BCD_INT(HalpQueryCMOS (4));
+    Time->Weekday = BCD_INT(HalpQueryCMOS (6));
+    Time->Day = BCD_INT(HalpQueryCMOS (7));
+    Time->Month = BCD_INT(HalpQueryCMOS (8));
+    Time->Year = BCD_INT(HalpQueryCMOS (9));
+
+    if (Time->Year > 80)
+        Time->Year += 1900;
+    else
+        Time->Year += 2000;
+
+#if 0
+    /* Century */
+    Time->Year += BCD_INT(HalpQueryCMOS (RTC_REGISTER_CENTURY)) * 100;
+#endif
+
+#ifndef NDEBUG
+    DbgPrint ("HalQueryRealTimeClock() %d:%d:%d %d/%d/%d\n",
+              Time->Hour,
+              Time->Minute,
+              Time->Second,
+              Time->Day,
+              Time->Month,
+              Time->Year
+             );
+#endif
+
+    Time->Milliseconds = 0;
+}
+
+
+VOID STDCALL
+HalSetRealTimeClock(PTIME_FIELDS Time)
+{
+    /* check 'Update In Progress' bit */
+    while (HalpQueryCMOS (RTC_REGISTER_A) & RTC_REG_A_UIP)
+        ;
+
+    HalpSetCMOS (0, INT_BCD(Time->Second));
+    HalpSetCMOS (2, INT_BCD(Time->Minute));
+    HalpSetCMOS (4, INT_BCD(Time->Hour));
+    HalpSetCMOS (6, INT_BCD(Time->Weekday));
+    HalpSetCMOS (7, INT_BCD(Time->Day));
+    HalpSetCMOS (8, INT_BCD(Time->Month));
+    HalpSetCMOS (9, INT_BCD(Time->Year % 100));
+
+#if 0
+    /* Century */
+    HalpSetCMOS (RTC_REGISTER_CENTURY, INT_BCD(Time->Year / 100));
+#endif
+}
+
+
+BOOLEAN STDCALL
+HalGetEnvironmentVariable(PCH Name,
+			  PCH Value,
+			  USHORT ValueLength)
+{
+   if (_stricmp(Name, "LastKnownGood") != 0)
+     {
+	return FALSE;
+     }
+
+   if (HalpQueryCMOS(RTC_REGISTER_B) & 0x01)
+     {
+	strncpy(Value, "FALSE", ValueLength);
+     }
+   else
+     {
+	strncpy(Value, "TRUE", ValueLength);
+     }
+
+   return TRUE;
+}
+
+
+BOOLEAN STDCALL
+HalSetEnvironmentVariable(PCH Name,
+			  PCH Value)
+{
+  UCHAR Val;
+
+  if (_stricmp(Name, "LastKnownGood") != 0)
+    return FALSE;
+
+  Val = HalpQueryCMOS(RTC_REGISTER_B);
+
+  if (_stricmp(Value, "TRUE") == 0)
+    HalpSetCMOS(RTC_REGISTER_B, Val | 0x01);
+  else if (_stricmp(Value, "FALSE") == 0)
+    HalpSetCMOS(RTC_REGISTER_B, Val & ~0x01);
+  else
+    return FALSE;
+
+   return TRUE;
+}
+
+
+ULONG STDCALL
+HalpGetCmosData(PBUS_HANDLER BusHandler,
+		ULONG BusNumber,
+		ULONG SlotNumber,
+		PVOID Buffer,
+		ULONG Offset,
+		ULONG Length)
+{
+  PUCHAR Ptr = Buffer;
+  ULONG Address = SlotNumber;
+  ULONG Len = Length;
+
+  DPRINT("HalpGetCmosData() called.\n");
+  DPRINT("  BusNumber %lu\n", BusNumber);
+  DPRINT("  SlotNumber %lu\n", SlotNumber);
+  DPRINT("  Offset 0x%lx\n", Offset);
+  DPRINT("  Length 0x%lx\n", Length);
+
+  if (Length == 0)
+    return 0;
+
+  if (BusNumber == 0)
+    {
+      /* CMOS */
+      while ((Len > 0) && (Address < 0x100))
+	{
+	  *Ptr = HalpQueryCMOS((UCHAR)Address);
+	  Ptr = Ptr + 1;
+	  Address++;
+	  Len--;
+	}
+    }
+  else if (BusNumber == 1)
+    {
+      /* Extended CMOS */
+      while ((Len > 0) && (Address < 0x1000))
+	{
+	  *Ptr = HalpQueryECMOS((USHORT)Address);
+	  Ptr = Ptr + 1;
+	  Address++;
+	  Len--;
+	}
+    }
+
+  return(Length - Len);
+}
+
+
+ULONG STDCALL
+HalpSetCmosData(PBUS_HANDLER BusHandler,
+		ULONG BusNumber,
+		ULONG SlotNumber,
+		PVOID Buffer,
+		ULONG Offset,
+		ULONG Length)
+{
+  PUCHAR Ptr = (PUCHAR)Buffer;
+  ULONG Address = SlotNumber;
+  ULONG Len = Length;
+
+  DPRINT("HalpSetCmosData() called.\n");
+  DPRINT("  BusNumber %lu\n", BusNumber);
+  DPRINT("  SlotNumber %lu\n", SlotNumber);
+  DPRINT("  Offset 0x%lx\n", Offset);
+  DPRINT("  Length 0x%lx\n", Length);
+
+  if (Length == 0)
+    return 0;
+
+  if (BusNumber == 0)
+    {
+      /* CMOS */
+      while ((Len > 0) && (Address < 0x100))
+	{
+	  HalpSetCMOS((UCHAR)Address, *Ptr);
+	  Ptr = Ptr + 1;
+	  Address++;
+	  Len--;
+	}
+    }
+  else if (BusNumber == 1)
+    {
+      /* Extended CMOS */
+      while ((Len > 0) && (Address < 0x1000))
+	{
+	  HalpSetECMOS((USHORT)Address, *Ptr);
+	  Ptr = Ptr + 1;
+	  Address++;
+	  Len--;
+	}
+    }
+
+  return(Length - Len);
+}
+
+/* EOF */

reactos/hal/halx86/udelay.c

@@ -0,0 +1,223 @@
+/*
+ * ReactOS kernel
+ * Copyright (C) 2000 David Welch <welch@cwcom.net>
+ * Copyright (C) 1999 Gareth Owen <gaz@athene.co.uk>, Ramon von Handel
+ * Copyright (C) 1991, 1992 Linus Torvalds
+ * 
+ * This software is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This software is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this software; see the file COPYING. If not, write
+ * to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge,
+ * MA 02139, USA.  
+ *
+ */
+/* $Id: udelay.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
+ *
+ * PROJECT:        ReactOS kernel
+ * FILE:           ntoskrnl/hal/x86/udelay.c
+ * PURPOSE:        Busy waiting
+ * PROGRAMMER:     David Welch (david.welch@seh.ox.ac.uk)
+ * UPDATE HISTORY:
+ *                 06/11/99 Created
+ */
+
+/* INCLUDES ***************************************************************/
+
+#include <ddk/ntddk.h>
+
+#define NDEBUG
+#include <internal/debug.h>
+
+/* GLOBALS ******************************************************************/
+
+static unsigned int delay_count = 1;
+
+#define MILLISEC     (10)
+#define FREQ         (1000/MILLISEC)
+
+#define PRECISION    (8)
+
+#define 	TMR_CTRL	0x43	/*	I/O for control		*/
+#define		TMR_CNT0	0x40	/*	I/O for counter 0	*/
+#define		TMR_CNT1	0x41	/*	I/O for counter 1	*/
+#define		TMR_CNT2	0x42	/*	I/O for counter 2	*/
+
+#define		TMR_SC0		0	/*	Select channel 0 	*/
+#define		TMR_SC1		0x40	/*	Select channel 1 	*/
+#define		TMR_SC2		0x80	/*	Select channel 2 	*/
+
+#define		TMR_LOW		0x10	/*	RW low byte only 	*/
+#define		TMR_HIGH	0x20	/*	RW high byte only 	*/
+#define		TMR_BOTH	0x30	/*	RW both bytes 		*/
+
+#define		TMR_MD0		0	/*	Mode 0 			*/
+#define		TMR_MD1		0x2	/*	Mode 1 			*/
+#define		TMR_MD2		0x4	/*	Mode 2 			*/
+#define		TMR_MD3		0x6	/*	Mode 3 			*/
+#define		TMR_MD4		0x8	/*	Mode 4 			*/
+#define		TMR_MD5		0xA	/*	Mode 5 			*/
+
+#define		TMR_BCD		1	/*	BCD mode 		*/
+
+#define		TMR_LATCH	0	/*	Latch command 		*/
+
+#define		TMR_READ	0xF0	/*    Read command 		*/
+#define		TMR_CNT		0x20	/*    CNT bit  (Active low, subtract it) */
+#define		TMR_STAT	0x10	/*    Status bit  (Active low, subtract it) */
+#define		TMR_CH2		0x8	/*    Channel 2 bit 		*/
+#define		TMR_CH1		0x4	/*    Channel 1 bit 		*/
+#define		TMR_CH0		0x2	/*    Channel 0 bit 		*/
+
+static BOOLEAN UdelayCalibrated = FALSE;
+
+/* FUNCTIONS **************************************************************/
+
+void init_pit(float h, unsigned char channel)
+{
+	unsigned int temp=0;
+	
+	temp = 1193180/h;
+	
+//	WRITE_PORT_UCHAR((PUCHAR)TMR_CTRL, 
+//			 (channel*0x40) + TMR_BOTH + TMR_MD3);
+        WRITE_PORT_UCHAR((PUCHAR)TMR_CTRL,
+			 (channel*0x40) + TMR_BOTH + TMR_MD2);
+	WRITE_PORT_UCHAR((PUCHAR)(0x40+channel), 
+			 (unsigned char) temp);
+	WRITE_PORT_UCHAR((PUCHAR)(0x40+channel), 
+			 (unsigned char) (temp>>8));
+}
+
+VOID STDCALL
+__KeStallExecutionProcessor(ULONG Loops)
+{
+   register unsigned int i;
+   for (i=0; i<Loops;i++);
+}
+
+VOID STDCALL KeStallExecutionProcessor(ULONG Microseconds)
+{
+   __KeStallExecutionProcessor((delay_count*Microseconds)/1000);
+}
+
+#define HZ (100)
+#define CLOCK_TICK_RATE (1193182)
+#define LATCH (CLOCK_TICK_RATE / HZ)
+
+static ULONG Read8254Timer(VOID)
+{
+	ULONG Count;
+
+	WRITE_PORT_UCHAR((PUCHAR)0x43, 0x00);
+	Count = READ_PORT_UCHAR((PUCHAR)0x40);
+	Count |= READ_PORT_UCHAR((PUCHAR)0x40) << 8;
+	return Count;
+}
+
+
+static VOID WaitFor8254Wraparound(VOID)
+{
+	ULONG CurCount, PrevCount = ~0;
+	LONG Delta;
+
+	CurCount = Read8254Timer();
+
+	do {
+		PrevCount = CurCount;
+		CurCount = Read8254Timer();
+		Delta = CurCount - PrevCount;
+
+	/*
+	 * This limit for delta seems arbitrary, but it isn't, it's
+	 * slightly above the level of error a buggy Mercury/Neptune
+	 * chipset timer can cause.
+	 */
+
+	} while (Delta < 300);
+}
+
+VOID HalpCalibrateStallExecution(VOID)
+{
+   ULONG i;
+   ULONG calib_bit;
+	 ULONG CurCount;
+
+   if (UdelayCalibrated)
+      return;
+
+   UdelayCalibrated = TRUE;
+
+   DbgPrint("Calibrating delay loop... [");
+
+   /* Initialise timer interrupt with MILLISECOND ms interval        */
+   WRITE_PORT_UCHAR((PUCHAR)0x43, 0x34);  /* binary, mode 2, LSB/MSB, ch 0 */
+   WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH & 0xff); /* LSB */
+   WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH >> 8); /* MSB */
+
+   /* Stage 1:  Coarse calibration                                   */
+
+   WaitFor8254Wraparound();
+
+   delay_count = 1;
+
+   do {
+      delay_count <<= 1;                  /* Next delay count to try */
+
+      WaitFor8254Wraparound();
+
+      __KeStallExecutionProcessor(delay_count);      /* Do the delay */
+
+	    CurCount = Read8254Timer();
+   } while (CurCount > LATCH / 2);
+
+   delay_count >>= 1;              /* Get bottom value for delay     */
+
+   /* Stage 2:  Fine calibration                                     */
+   DbgPrint("delay_count: %d", delay_count);
+
+   calib_bit = delay_count;        /* Which bit are we going to test */
+
+   for(i=0;i<PRECISION;i++) {
+      calib_bit >>= 1;             /* Next bit to calibrate          */
+      if(!calib_bit) break;        /* If we have done all bits, stop */
+
+      delay_count |= calib_bit;        /* Set the bit in delay_count */
+
+      WaitFor8254Wraparound();
+
+      __KeStallExecutionProcessor(delay_count);      /* Do the delay */
+
+      CurCount = Read8254Timer();
+      if (CurCount <= LATCH / 2)   /* If a tick has passed, turn the */
+        delay_count &= ~calib_bit; /* calibrated bit back off        */
+   }
+
+   /* We're finished:  Do the finishing touches                      */
+
+   delay_count /= (MILLISEC / 2);   /* Calculate delay_count for 1ms */
+
+   DbgPrint("]\n");
+   DbgPrint("delay_count: %d\n", delay_count);
+   DbgPrint("CPU speed: %d\n", delay_count/250);
+#if 0
+   DbgPrint("About to start delay loop test\n");
+   DbgPrint("Waiting for five minutes...");
+   for (i = 0; i < (5*60*1000*20); i++)
+     {
+	KeStallExecutionProcessor(50);
+     }
+   DbgPrint("finished\n");
+   for(;;);
+#endif
+}
+
+/* EOF */