4dee686ca5
instead of having application processors spin in mpshutdown() with mmu on, and be subject to reboot() overriding kernel text and modifying page tables, park the application processors in rebootcode idle loop with the mmu off.
768 lines
15 KiB
C
768 lines
15 KiB
C
#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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#include "tos.h"
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#include "ureg.h"
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#include "init.h"
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#include "pool.h"
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#include "reboot.h"
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Mach *m;
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Conf conf;
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int delaylink;
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int idle_spin;
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extern void (*i8237alloc)(void);
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extern void bootscreeninit(void);
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extern void multibootdebug(void);
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void
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main(void)
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{
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mach0init();
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bootargsinit();
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ioinit();
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i8250console();
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quotefmtinstall();
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screeninit();
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print("\nPlan 9\n");
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trapinit0();
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i8253init();
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cpuidentify();
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meminit();
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ramdiskinit();
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confinit();
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xinit();
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archinit();
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bootscreeninit();
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if(i8237alloc != nil)
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i8237alloc();
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trapinit();
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printinit();
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cpuidprint();
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mmuinit();
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if(arch->intrinit) /* launches other processors on an mp */
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arch->intrinit();
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timersinit();
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mathinit();
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if(arch->clockenable)
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arch->clockenable();
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procinit0();
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initseg();
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if(delaylink){
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bootlinks();
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pcimatch(0, 0, 0);
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}else
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links();
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chandevreset();
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pageinit();
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userinit();
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schedinit();
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}
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void
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mach0init(void)
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{
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conf.nmach = 1;
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MACHP(0) = (Mach*)CPU0MACH;
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m->pdb = (ulong*)CPU0PDB;
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m->gdt = (Segdesc*)CPU0GDT;
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machinit();
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active.machs[0] = 1;
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active.exiting = 0;
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}
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void
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machinit(void)
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{
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int machno;
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ulong *pdb;
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Segdesc *gdt;
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machno = m->machno;
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pdb = m->pdb;
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gdt = m->gdt;
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memset(m, 0, sizeof(Mach));
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m->machno = machno;
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m->pdb = pdb;
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m->gdt = gdt;
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m->perf.period = 1;
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/*
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* For polled uart output at boot, need
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* a default delay constant. 100000 should
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* be enough for a while. Cpuidentify will
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* calculate the real value later.
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*/
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m->loopconst = 100000;
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}
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void
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init0(void)
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{
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char buf[2*KNAMELEN], **sp;
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up->nerrlab = 0;
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spllo();
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/*
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* These are o.k. because rootinit is null.
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* Then early kproc's will have a root and dot.
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*/
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up->slash = namec("#/", Atodir, 0, 0);
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pathclose(up->slash->path);
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up->slash->path = newpath("/");
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up->dot = cclone(up->slash);
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chandevinit();
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if(!waserror()){
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snprint(buf, sizeof(buf), "%s %s", arch->id, conffile);
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ksetenv("terminal", buf, 0);
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ksetenv("cputype", "386", 0);
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if(cpuserver)
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ksetenv("service", "cpu", 0);
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else
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ksetenv("service", "terminal", 0);
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setconfenv();
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poperror();
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}
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kproc("alarm", alarmkproc, 0);
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sp = (char**)(USTKTOP - sizeof(Tos) - 8 - sizeof(sp[0])*4);
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sp[3] = sp[2] = nil;
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strcpy(sp[1] = (char*)&sp[4], "boot");
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sp[0] = nil;
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touser(sp);
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}
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void
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userinit(void)
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{
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void *v;
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Proc *p;
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Segment *s;
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Page *pg;
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p = newproc();
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p->pgrp = newpgrp();
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p->egrp = smalloc(sizeof(Egrp));
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p->egrp->ref = 1;
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p->fgrp = dupfgrp(nil);
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p->rgrp = newrgrp();
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p->procmode = 0640;
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kstrdup(&eve, "");
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kstrdup(&p->text, "*init*");
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kstrdup(&p->user, eve);
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procsetup(p);
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/*
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* Kernel Stack
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*
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* N.B. make sure there's enough space for syscall to check
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* for valid args and
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* 4 bytes for gotolabel's return PC
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*/
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p->sched.pc = (ulong)init0;
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p->sched.sp = (ulong)p->kstack+KSTACK-(sizeof(Sargs)+BY2WD);
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/*
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* User Stack
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*
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* N.B. cannot call newpage() with clear=1, because pc kmap
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* requires up != nil. use tmpmap instead.
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*/
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s = newseg(SG_STACK, USTKTOP-USTKSIZE, USTKSIZE/BY2PG);
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p->seg[SSEG] = s;
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pg = newpage(0, 0, USTKTOP-BY2PG);
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segpage(s, pg);
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v = tmpmap(pg);
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memset(v, 0, BY2PG);
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tmpunmap(v);
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/*
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* Text
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*/
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s = newseg(SG_TEXT, UTZERO, 1);
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s->flushme++;
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p->seg[TSEG] = s;
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pg = newpage(0, 0, UTZERO);
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pg->txtflush = ~0;
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segpage(s, pg);
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v = tmpmap(pg);
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memset(v, 0, BY2PG);
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memmove(v, initcode, sizeof initcode);
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tmpunmap(v);
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ready(p);
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}
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void
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confinit(void)
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{
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char *p;
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int i, userpcnt;
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ulong kpages;
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if(p = getconf("service")){
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if(strcmp(p, "cpu") == 0)
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cpuserver = 1;
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else if(strcmp(p,"terminal") == 0)
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cpuserver = 0;
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}
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if(p = getconf("*kernelpercent"))
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userpcnt = 100 - strtol(p, 0, 0);
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else
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userpcnt = 0;
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conf.npage = 0;
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for(i=0; i<nelem(conf.mem); i++)
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conf.npage += conf.mem[i].npage;
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conf.nproc = 100 + ((conf.npage*BY2PG)/MB)*5;
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if(cpuserver)
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conf.nproc *= 3;
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if(conf.nproc > 2000)
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conf.nproc = 2000;
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conf.nimage = 200;
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conf.nswap = conf.nproc*80;
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conf.nswppo = 4096;
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if(cpuserver) {
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if(userpcnt < 10)
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userpcnt = 70;
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kpages = conf.npage - (conf.npage*userpcnt)/100;
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conf.nimage = conf.nproc;
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/*
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* Hack for the big boys. Only good while physmem < 4GB.
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* Give the kernel fixed max + enough to allocate the
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* page pool.
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* This is an overestimate as conf.upages < conf.npages.
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* The patch of nimage is a band-aid, scanning the whole
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* page list in imagereclaim just takes too long.
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*/
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if(getconf("*imagemaxmb") == 0)
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if(kpages > (64*MB + conf.npage*sizeof(Page))/BY2PG){
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kpages = (64*MB + conf.npage*sizeof(Page))/BY2PG;
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kpages += (conf.nproc*KSTACK)/BY2PG;
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}
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} else {
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if(userpcnt < 10) {
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if(conf.npage*BY2PG < 16*MB)
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userpcnt = 50;
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else
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userpcnt = 60;
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}
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kpages = conf.npage - (conf.npage*userpcnt)/100;
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/*
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* Make sure terminals with low memory get at least
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* 4MB on the first Image chunk allocation.
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*/
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if(conf.npage*BY2PG < 16*MB)
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imagmem->minarena = 4*MB;
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}
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/*
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* can't go past the end of virtual memory
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* (ulong)-KZERO is 2^32 - KZERO
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*/
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if(kpages > ((ulong)-KZERO)/BY2PG)
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kpages = ((ulong)-KZERO)/BY2PG;
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conf.upages = conf.npage - kpages;
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conf.ialloc = (kpages/2)*BY2PG;
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/*
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* Guess how much is taken by the large permanent
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* datastructures. Mntcache and Mntrpc are not accounted for.
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*/
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kpages *= BY2PG;
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kpages -= conf.upages*sizeof(Page)
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+ conf.nproc*sizeof(Proc)
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+ conf.nimage*sizeof(Image)
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+ conf.nswap
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+ conf.nswppo*sizeof(Page*);
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mainmem->maxsize = kpages;
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/*
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* the dynamic allocation will balance the load properly,
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* hopefully. be careful with 32-bit overflow.
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*/
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imagmem->maxsize = kpages - (kpages/10);
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if(p = getconf("*imagemaxmb")){
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imagmem->maxsize = strtol(p, nil, 0)*MB;
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if(imagmem->maxsize > mainmem->maxsize)
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imagmem->maxsize = mainmem->maxsize;
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}
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}
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/*
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* we keep FPsave structure in SSE format emulating FXSAVE / FXRSTOR
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* instructions for legacy x87 fpu.
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*/
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void
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fpx87save(FPsave *fps)
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{
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ushort tag;
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fpx87save0(fps);
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/*
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* convert x87 tag word to fxsave tag byte:
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* 00, 01, 10 -> 1, 11 -> 0
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*/
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tag = ~fps->tag;
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tag = (tag | (tag >> 1)) & 0x5555;
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tag = (tag | (tag >> 1)) & 0x3333;
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tag = (tag | (tag >> 2)) & 0x0F0F;
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tag = (tag | (tag >> 4)) & 0x00FF;
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/* NOP fps->fcw = fps->control; */
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fps->fsw = fps->status;
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fps->ftw = tag;
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fps->fop = fps->opcode;
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fps->fpuip = fps->pc;
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fps->cs = fps->selector;
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fps->fpudp = fps->operand;
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fps->ds = fps->oselector;
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#define MOVA(d,s) \
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*((ushort*)(d+8)) = *((ushort*)(s+8)), \
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*((ulong*)(d+4)) = *((ulong*)(s+4)), \
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*((ulong*)(d)) = *((ulong*)(s))
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MOVA(fps->xregs+0x70, fps->regs+70);
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MOVA(fps->xregs+0x60, fps->regs+60);
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MOVA(fps->xregs+0x50, fps->regs+50);
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MOVA(fps->xregs+0x40, fps->regs+40);
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MOVA(fps->xregs+0x30, fps->regs+30);
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MOVA(fps->xregs+0x20, fps->regs+20);
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MOVA(fps->xregs+0x10, fps->regs+10);
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MOVA(fps->xregs+0x00, fps->regs+00);
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#undef MOVA
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#define CLR6(d) \
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*((ulong*)(d)) = 0, \
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*((ushort*)(d+4)) = 0
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CLR6(fps->xregs+0x70+10);
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CLR6(fps->xregs+0x60+10);
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CLR6(fps->xregs+0x50+10);
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CLR6(fps->xregs+0x40+10);
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CLR6(fps->xregs+0x30+10);
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CLR6(fps->xregs+0x20+10);
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CLR6(fps->xregs+0x10+10);
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CLR6(fps->xregs+0x00+10);
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#undef CLR6
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fps->rsrvd1 = fps->rsrvd2 = fps->mxcsr = fps->mxcsr_mask = 0;
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}
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void
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fpx87restore(FPsave *fps)
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{
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ushort msk, tos, tag, *reg;
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/* convert fxsave tag byte to x87 tag word */
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tag = 0;
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tos = 7 - ((fps->fsw >> 11) & 7);
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for(msk = 0x80; msk != 0; tos--, msk >>= 1){
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tag <<= 2;
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if((fps->ftw & msk) != 0){
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reg = (ushort*)&fps->xregs[(tos & 7) << 4];
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switch(reg[4] & 0x7fff){
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case 0x0000:
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if((reg[0] | reg[1] | reg[2] | reg[3]) == 0){
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tag |= 1; /* 01 zero */
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break;
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}
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/* no break */
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case 0x7fff:
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tag |= 2; /* 10 special */
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break;
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default:
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if((reg[3] & 0x8000) == 0)
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break; /* 00 valid */
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tag |= 2; /* 10 special */
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break;
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}
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}else{
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tag |= 3; /* 11 empty */
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}
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}
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#define MOVA(d,s) \
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*((ulong*)(d)) = *((ulong*)(s)), \
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*((ulong*)(d+4)) = *((ulong*)(s+4)), \
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*((ushort*)(d+8)) = *((ushort*)(s+8))
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MOVA(fps->regs+00, fps->xregs+0x00);
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MOVA(fps->regs+10, fps->xregs+0x10);
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MOVA(fps->regs+20, fps->xregs+0x20);
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MOVA(fps->regs+30, fps->xregs+0x30);
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MOVA(fps->regs+40, fps->xregs+0x40);
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MOVA(fps->regs+50, fps->xregs+0x50);
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MOVA(fps->regs+60, fps->xregs+0x60);
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MOVA(fps->regs+70, fps->xregs+0x70);
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#undef MOVA
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fps->oselector = fps->ds;
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fps->operand = fps->fpudp;
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fps->opcode = fps->fop & 0x7ff;
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fps->selector = fps->cs;
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fps->pc = fps->fpuip;
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fps->tag = tag;
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fps->status = fps->fsw;
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/* NOP fps->control = fps->fcw; */
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fps->r1 = fps->r2 = fps->r3 = fps->r4 = 0;
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fpx87restore0(fps);
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}
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static char* mathmsg[] =
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{
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nil, /* handled below */
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"denormalized operand",
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"division by zero",
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"numeric overflow",
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"numeric underflow",
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"precision loss",
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};
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static void
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mathnote(ulong status, ulong pc)
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{
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char *msg, note[ERRMAX];
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int i;
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/*
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* Some attention should probably be paid here to the
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* exception masks and error summary.
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*/
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msg = "unknown exception";
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for(i = 1; i <= 5; i++){
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if(!((1<<i) & status))
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continue;
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msg = mathmsg[i];
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break;
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}
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if(status & 0x01){
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if(status & 0x40){
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if(status & 0x200)
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msg = "stack overflow";
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else
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msg = "stack underflow";
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}else
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msg = "invalid operation";
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}
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snprint(note, sizeof note, "sys: fp: %s fppc=0x%lux status=0x%lux",
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msg, pc, status);
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postnote(up, 1, note, NDebug);
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}
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/*
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* math coprocessor error
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*/
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static void
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matherror(Ureg*, void*)
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{
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/*
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* a write cycle to port 0xF0 clears the interrupt latch attached
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* to the error# line from the 387
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*/
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if(!(m->cpuiddx & Fpuonchip))
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outb(0xF0, 0xFF);
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/*
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* get floating point state to check out error
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*/
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fpsave(up->fpsave);
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up->fpstate = FPinactive;
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mathnote(up->fpsave->fsw, up->fpsave->fpuip);
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}
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/*
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* SIMD error
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*/
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static void
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simderror(Ureg *ureg, void*)
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{
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fpsave(up->fpsave);
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up->fpstate = FPinactive;
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mathnote(up->fpsave->mxcsr & 0x3f, ureg->pc);
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}
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/*
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* math coprocessor emulation fault
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*/
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static void
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mathemu(Ureg *ureg, void*)
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{
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ulong status, control;
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if(up->fpstate & FPillegal){
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/* someone did floating point in a note handler */
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postnote(up, 1, "sys: floating point in note handler", NDebug);
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return;
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}
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switch(up->fpstate){
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case FPinit:
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fpinit();
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if(fpsave == fpssesave)
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ldmxcsr(0x1f80); /* no simd exceptions on 386 */
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while(up->fpsave == nil)
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up->fpsave = mallocalign(sizeof(FPsave), FPalign, 0, 0);
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up->fpstate = FPactive;
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break;
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case FPinactive:
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/*
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|
* Before restoring the state, check for any pending
|
|
* exceptions, there's no way to restore the state without
|
|
* generating an unmasked exception.
|
|
* More attention should probably be paid here to the
|
|
* exception masks and error summary.
|
|
*/
|
|
status = up->fpsave->fsw;
|
|
control = up->fpsave->fcw;
|
|
if((status & ~control) & 0x07F){
|
|
mathnote(status, up->fpsave->fpuip);
|
|
break;
|
|
}
|
|
fprestore(up->fpsave);
|
|
up->fpstate = FPactive;
|
|
break;
|
|
case FPactive:
|
|
panic("math emu pid %ld %s pc 0x%lux",
|
|
up->pid, up->text, ureg->pc);
|
|
break;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* math coprocessor segment overrun
|
|
*/
|
|
static void
|
|
mathover(Ureg*, void*)
|
|
{
|
|
pexit("math overrun", 0);
|
|
}
|
|
|
|
void
|
|
mathinit(void)
|
|
{
|
|
trapenable(VectorCERR, matherror, 0, "matherror");
|
|
if(m->cpuidfamily == 3)
|
|
intrenable(IrqIRQ13, matherror, 0, BUSUNKNOWN, "matherror");
|
|
trapenable(VectorCNA, mathemu, 0, "mathemu");
|
|
trapenable(VectorCSO, mathover, 0, "mathover");
|
|
trapenable(VectorSIMD, simderror, 0, "simderror");
|
|
}
|
|
|
|
/*
|
|
* set up floating point for a new process
|
|
*/
|
|
void
|
|
procsetup(Proc *p)
|
|
{
|
|
p->fpstate = FPinit;
|
|
fpoff();
|
|
|
|
cycles(&p->kentry);
|
|
p->pcycles = -p->kentry;
|
|
|
|
memset(p->gdt, 0, sizeof(p->gdt));
|
|
p->ldt = nil;
|
|
p->nldt = 0;
|
|
|
|
memset(p->dr, 0, sizeof(p->dr));
|
|
}
|
|
|
|
void
|
|
procfork(Proc *p)
|
|
{
|
|
int s;
|
|
|
|
p->kentry = up->kentry;
|
|
p->pcycles = -p->kentry;
|
|
|
|
/* inherit user descriptors */
|
|
memmove(p->gdt, up->gdt, sizeof(p->gdt));
|
|
|
|
/* copy local descriptor table */
|
|
if(up->ldt != nil && up->nldt > 0){
|
|
p->ldt = smalloc(sizeof(Segdesc) * up->nldt);
|
|
memmove(p->ldt, up->ldt, sizeof(Segdesc) * up->nldt);
|
|
p->nldt = up->nldt;
|
|
}
|
|
|
|
/* save floating point state */
|
|
s = splhi();
|
|
switch(up->fpstate & ~FPillegal){
|
|
case FPactive:
|
|
fpsave(up->fpsave);
|
|
up->fpstate = FPinactive;
|
|
case FPinactive:
|
|
while(p->fpsave == nil)
|
|
p->fpsave = mallocalign(sizeof(FPsave), FPalign, 0, 0);
|
|
memmove(p->fpsave, up->fpsave, sizeof(FPsave));
|
|
p->fpstate = FPinactive;
|
|
}
|
|
|
|
/* clear debug registers */
|
|
memset(p->dr, 0, sizeof(p->dr));
|
|
splx(s);
|
|
}
|
|
|
|
void
|
|
procrestore(Proc *p)
|
|
{
|
|
uvlong t;
|
|
|
|
if(p->dr[7] != 0){
|
|
m->dr7 = p->dr[7];
|
|
putdr(p->dr);
|
|
}
|
|
|
|
if(p->vmx != nil)
|
|
vmxprocrestore(p);
|
|
|
|
if(p->kp)
|
|
return;
|
|
|
|
cycles(&t);
|
|
p->kentry += t;
|
|
p->pcycles -= t;
|
|
}
|
|
|
|
/*
|
|
* Save the mach dependent part of the process state.
|
|
*/
|
|
void
|
|
procsave(Proc *p)
|
|
{
|
|
uvlong t;
|
|
|
|
/* we could just always putdr7(0) but accessing DR7 might be slow in a VM */
|
|
if(m->dr7 != 0){
|
|
m->dr7 = 0;
|
|
putdr7(0);
|
|
}
|
|
|
|
cycles(&t);
|
|
p->kentry -= t;
|
|
p->pcycles += t;
|
|
|
|
if(p->fpstate == FPactive){
|
|
if(p->state == Moribund)
|
|
fpclear();
|
|
else{
|
|
/*
|
|
* Fpsave() stores without handling pending
|
|
* unmasked exeptions. Postnote() can't be called
|
|
* here as sleep() already has up->rlock, so
|
|
* the handling of pending exceptions is delayed
|
|
* until the process runs again and generates an
|
|
* emulation fault to activate the FPU.
|
|
*/
|
|
fpsave(p->fpsave);
|
|
}
|
|
p->fpstate = FPinactive;
|
|
}
|
|
|
|
/*
|
|
* While this processor is in the scheduler, the process could run
|
|
* on another processor and exit, returning the page tables to
|
|
* the free list where they could be reallocated and overwritten.
|
|
* When this processor eventually has to get an entry from the
|
|
* trashed page tables it will crash.
|
|
*
|
|
* If there's only one processor, this can't happen.
|
|
* You might think it would be a win not to do this in that case,
|
|
* especially on VMware, but it turns out not to matter.
|
|
*/
|
|
mmuflushtlb(PADDR(m->pdb));
|
|
}
|
|
|
|
static void
|
|
rebootjump(uintptr entry, uintptr code, ulong size)
|
|
{
|
|
void (*f)(uintptr, uintptr, ulong);
|
|
ulong *pdb;
|
|
|
|
splhi();
|
|
arch->introff();
|
|
|
|
/*
|
|
* Modify the machine page table to directly map the low 4MB of memory
|
|
* This allows the reboot code to turn off the page mapping
|
|
*/
|
|
pdb = m->pdb;
|
|
pdb[PDX(0)] = pdb[PDX(KZERO)];
|
|
mmuflushtlb(PADDR(pdb));
|
|
|
|
/* setup reboot trampoline function */
|
|
f = (void*)REBOOTADDR;
|
|
memmove(f, rebootcode, sizeof(rebootcode));
|
|
|
|
/* off we go - never to return */
|
|
coherence();
|
|
(*f)(entry, code, size);
|
|
for(;;);
|
|
}
|
|
|
|
|
|
void
|
|
exit(int)
|
|
{
|
|
cpushutdown();
|
|
if(m->machno)
|
|
rebootjump(0, 0, 0);
|
|
arch->reset();
|
|
}
|
|
|
|
void
|
|
reboot(void *entry, void *code, ulong size)
|
|
{
|
|
writeconf();
|
|
vmxshutdown();
|
|
|
|
/*
|
|
* the boot processor is cpu0. execute this function on it
|
|
* so that the new kernel has the same cpu0. this only matters
|
|
* because the hardware has a notion of which processor was the
|
|
* boot processor and we look at it at start up.
|
|
*/
|
|
if (m->machno != 0) {
|
|
procwired(up, 0);
|
|
sched();
|
|
}
|
|
cpushutdown();
|
|
delay(1000);
|
|
splhi();
|
|
|
|
/* turn off buffered serial console */
|
|
serialoq = nil;
|
|
|
|
/* shutdown devices */
|
|
chandevshutdown();
|
|
|
|
rebootjump((ulong)entry & ~0xF0000000UL, PADDR(code), size);
|
|
}
|