601 lines
13 KiB
C
601 lines
13 KiB
C
#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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#include "../port/error.h"
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#include "../port/audioif.h"
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typedef struct Ring Ring;
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typedef struct Hwdesc Hwdesc;
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typedef struct Ctlr Ctlr;
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enum {
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Ioc = 1<<31,
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Bup = 1<<30,
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};
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struct Hwdesc {
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ulong addr;
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ulong size;
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};
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enum {
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Ndesc = 32,
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Bufsize = 32768, /* bytes, must be divisible by ndesc */
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Blocksize = Bufsize/Ndesc,
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Maxbusywait = 500000, /* microseconds, roughly */
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BytesPerSample = 4,
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};
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struct Ring
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{
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Rendez r;
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uchar *buf;
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ulong nbuf;
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ulong ri;
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ulong wi;
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};
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struct Ctlr {
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/* keep these first, they want to be 8-aligned */
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Hwdesc indesc[Ndesc];
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Hwdesc outdesc[Ndesc];
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Hwdesc micdesc[Ndesc];
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Lock;
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ulong port;
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ulong mixport;
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Ring inring, micring, outring;
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int sis7012;
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/* for probe */
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Audio *adev;
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Pcidev *pcidev;
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Ctlr *next;
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};
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#define iorl(c, r) (inl((c)->port+(r)))
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#define iowl(c, r, l) (outl((c)->port+(r), (ulong)(l)))
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enum {
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In = 0x00,
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Out = 0x10,
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Mic = 0x20,
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Bar = 0x00, /* Base address register, 8-byte aligned */
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/* a 32-bit read at 0x04 can be used to get civ:lvi:sr in one step */
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Civ = 0x04, /* current index value (desc being processed) */
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Lvi = 0x05, /* Last valid index (index of first unused entry!) */
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Sr = 0x06, /* status register */
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Fifoe = 1<<4, /* fifo error (r/wc) */
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Bcis = 1<<3, /* buffer completion interrupt status (r/wc) */
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Lvbci = 1<<2, /* last valid buffer completion(in)/fetched(out) interrupt (r/wc) */
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Celv = 1<<1, /* current equals last valid (ro) */
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Dch = 1<<0, /* dma controller halted (ro) */
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Picb = 0x08, /* position in current buffer */
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Piv = 0x0a, /* prefetched index value */
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Cr = 0x0b, /* control register */
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Ioce = 1<<4, /* interrupt on buffer completion (if bit set in hwdesc.size) (rw) */
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Feie = 1<<3, /* fifo error interrupt enable (rw) */
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Lvbie = 1<<2, /* last valid buffer interrupt enable (rw) */
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RR = 1<<1, /* reset busmaster related regs, excl. ioce,feie,lvbie (rw) */
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Rpbm = 1<<0, /* run/pause busmaster. 0 stops, 1 starts (rw) */
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Cnt = 0x2c, /* global control */
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Ena16bit = 0x0<<22,
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Ena20bit = 0x1<<22,
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Ena2chan = 0x0<<20,
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Ena4chan = 0x1<<20,
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Enam6chan = 0x2<<20,
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EnaRESER = 0x3<<20,
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Sr2ie = 1<<6, /* sdin2 interrupt enable (rw) */
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Srie = 1<<5, /* sdin1 interrupt enable (rw) */
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Prie = 1<<4, /* sdin0 interrupt enable (rw) */
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Aclso = 1<<3, /* ac link shut-off (rw) */
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Acwr = 1<<2, /* ac 97 warm reset (rw) */
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Accr = 1<<1, /* ac 97 cold reset (rw) */
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GPIie = 1<<0, /* GPI interrupt enable (rw) */
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Sta = 0x30, /* global status */
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Cap6chan = 1<<21,
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Cap4chan = 1<<20,
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Md3 = 1<<17, /* modem powerdown semaphore */
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Ad3 = 1<<16, /* audio powerdown semaphore */
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Rcs = 1<<15, /* read completion status (r/wc) */
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S2ri = 1<<29, /* sdin2 resume interrupt (r/wc) */
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Sri = 1<<11, /* sdin1 resume interrupt (r/wc) */
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Pri = 1<<10, /* sdin0 resume interrupt (r/wc) */
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S2cr = 1<<28, /* sdin2 codec ready (ro) */
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Scr = 1<<9, /* sdin1 codec ready (ro) */
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Pcr = 1<<8, /* sdin0 codec ready (ro) */
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Mint = 1<<7, /* microphone in inetrrupt (ro) */
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Point = 1<<6, /* pcm out interrupt (ro) */
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Piint = 1<<5, /* pcm in interrupt (ro) */
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Moint = 1<<2, /* modem out interrupt (ro) */
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Miint = 1<<1, /* modem in interrupt (ro) */
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Gsci = 1<<0, /* GPI status change interrupt */
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Cas = 0x34, /* codec access semaphore */
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Casp = 1<<0, /* set to 1 on read if zero, cleared by hardware */
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};
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static long
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buffered(Ring *r)
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{
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ulong ri, wi;
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ri = r->ri;
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wi = r->wi;
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if(wi >= ri)
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return wi - ri;
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else
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return r->nbuf - (ri - wi);
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}
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static long
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available(Ring *r)
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{
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long m;
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m = (r->nbuf - BytesPerSample) - buffered(r);
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if(m < 0)
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m = 0;
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return m;
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}
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static long
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readring(Ring *r, uchar *p, long n)
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{
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long n0, m;
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n0 = n;
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while(n > 0){
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if((m = buffered(r)) <= 0)
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break;
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if(m > n)
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m = n;
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if(p){
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if(r->ri + m > r->nbuf)
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m = r->nbuf - r->ri;
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memmove(p, r->buf + r->ri, m);
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p += m;
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}
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r->ri = (r->ri + m) % r->nbuf;
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n -= m;
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}
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return n0 - n;
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}
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static long
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writering(Ring *r, uchar *p, long n)
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{
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long n0, m;
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n0 = n;
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while(n > 0){
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if((m = available(r)) <= 0)
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break;
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if(m > n)
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m = n;
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if(p){
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if(r->wi + m > r->nbuf)
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m = r->nbuf - r->wi;
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memmove(r->buf + r->wi, p, m);
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p += m;
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}
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r->wi = (r->wi + m) % r->nbuf;
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n -= m;
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}
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return n0 - n;
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}
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#define csr8r(c, r) (inb((c)->port+(r)))
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#define csr16r(c, r) (ins((c)->port+(r)))
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#define csr32r(c, r) (inl((c)->port+(r)))
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#define csr8w(c, r, b) (outb((c)->port+(r), (int)(b)))
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#define csr16w(c, r, w) (outs((c)->port+(r), (ushort)(w)))
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#define csr32w(c, r, w) (outl((c)->port+(r), (ulong)(w)))
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/* audioac97mix */
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extern void ac97mixreset(Audio *,
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void (*wr)(Audio*,int,ushort),
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ushort (*rr)(Audio*,int));
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static void
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ac97waitcodec(Audio *adev)
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{
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Ctlr *ctlr;
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int i;
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ctlr = adev->ctlr;
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for(i = 0; i < Maxbusywait/10; i++){
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if((csr8r(ctlr, Cas) & Casp) == 0)
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break;
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microdelay(10);
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}
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if(i == Maxbusywait)
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print("#A%d: ac97 exhausted waiting codec access\n", adev->ctlrno);
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}
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static void
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ac97mixw(Audio *adev, int port, ushort val)
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{
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Ctlr *ctlr;
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ac97waitcodec(adev);
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ctlr = adev->ctlr;
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outs(ctlr->mixport+port, val);
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}
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static ushort
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ac97mixr(Audio *adev, int port)
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{
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Ctlr *ctlr;
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ac97waitcodec(adev);
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ctlr = adev->ctlr;
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return ins(ctlr->mixport+port);
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}
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static void
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ac97interrupt(Ureg *, void *arg)
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{
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Audio *adev;
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Ctlr *ctlr;
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ulong stat;
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adev = arg;
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ctlr = adev->ctlr;
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stat = csr32r(ctlr, Sta);
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stat &= S2ri | Sri | Pri | Mint | Point | Piint | Moint | Miint | Gsci;
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if(stat & (Point|Piint|Mint)){
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ilock(ctlr);
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if(stat & Point){
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ctlr->outring.ri = csr8r(ctlr, Out + Civ) * Blocksize;
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wakeup(&ctlr->outring.r);
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if(ctlr->sis7012)
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csr16w(ctlr, Out + Picb, csr16r(ctlr, Out + Picb) & ~Dch);
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else
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csr16w(ctlr, Out + Sr, csr16r(ctlr, Out + Sr) & ~Dch);
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stat &= ~Point;
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}
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if(stat & Piint){
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ctlr->inring.wi = csr8r(ctlr, In + Civ) * Blocksize;
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wakeup(&ctlr->inring.r);
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if(ctlr->sis7012)
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csr16w(ctlr, In + Picb, csr16r(ctlr, In + Picb) & ~Dch);
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else
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csr16w(ctlr, In + Sr, csr16r(ctlr, In + Sr) & ~Dch);
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stat &= ~Piint;
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}
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if(stat & Mint){
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ctlr->micring.wi = csr8r(ctlr, Mic + Civ) * Blocksize;
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wakeup(&ctlr->micring.r);
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if(ctlr->sis7012)
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csr16w(ctlr, Mic + Picb, csr16r(ctlr, Mic + Picb) & ~Dch);
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else
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csr16w(ctlr, Mic + Sr, csr16r(ctlr, Mic + Sr) & ~Dch);
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stat &= ~Mint;
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}
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iunlock(ctlr);
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}
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if(stat) /* have seen 0x400, which is sdin0 resume */
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iprint("#A%d: ac97 unhandled interrupt(s): stat 0x%lux\n",
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adev->ctlrno, stat);
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}
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static long
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ac97buffered(Audio *adev)
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{
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Ctlr *ctlr = adev->ctlr;
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return buffered(&ctlr->outring);
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}
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static long
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ac97status(Audio *adev, void *a, long n, vlong)
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{
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Ctlr *ctlr = adev->ctlr;
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return snprint((char*)a, n, "bufsize %6d buffered %6ld\n",
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Blocksize, buffered(&ctlr->outring));
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}
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static int
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inavail(void *arg)
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{
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Ring *r = arg;
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return buffered(r) > 0;
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}
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static int
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outavail(void *arg)
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{
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Ring *r = arg;
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return available(r) > 0;
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}
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static int
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outrate(void *arg)
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{
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Ctlr *ctlr = arg;
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int delay = ctlr->adev->delay*BytesPerSample;
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return (delay <= 0) || (buffered(&ctlr->outring) <= delay);
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}
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static long
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ac97read(Audio *adev, void *vp, long n, vlong)
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{
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uchar *p, *e;
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Ctlr *ctlr;
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Ring *ring;
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ulong oi, ni;
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p = vp;
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e = p + n;
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ctlr = adev->ctlr;
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ring = &ctlr->inring;
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while(p < e) {
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oi = ring->ri / Blocksize;
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if((n = readring(ring, p, e - p)) <= 0){
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csr8w(ctlr, In + Lvi, (oi - 1) % Ndesc);
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csr8w(ctlr, In + Cr, Ioce | Rpbm);
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sleep(&ring->r, inavail, ring);
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continue;
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}
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ni = ring->ri / Blocksize;
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while(oi != ni){
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csr8w(ctlr, In + Lvi, (oi - 1) % Ndesc);
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csr8w(ctlr, In + Cr, Ioce | Rpbm);
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oi = (oi + 1) % Ndesc;
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}
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p += n;
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}
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return p - (uchar*)vp;
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}
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static long
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ac97write(Audio *adev, void *vp, long n, vlong)
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{
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uchar *p, *e;
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Ctlr *ctlr;
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Ring *ring;
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ulong oi, ni;
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p = vp;
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e = p + n;
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ctlr = adev->ctlr;
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ring = &ctlr->outring;
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while(p < e) {
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oi = ring->wi / Blocksize;
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if((n = writering(ring, p, e - p)) <= 0){
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sleep(&ring->r, outavail, ring);
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continue;
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}
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ni = ring->wi / Blocksize;
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while(oi != ni){
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csr8w(ctlr, Out+Lvi, oi);
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csr8w(ctlr, Out+Cr, Ioce | Rpbm);
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oi = (oi + 1) % Ndesc;
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}
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p += n;
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}
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while(outrate(ctlr) == 0)
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sleep(&ring->r, outrate, ctlr);
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return p - (uchar*)vp;
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}
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static void
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ac97close(Audio *adev, int mode)
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{
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Ctlr *ctlr;
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Ring *ring;
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if(mode == OREAD)
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return;
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ctlr = adev->ctlr;
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ring = &ctlr->outring;
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while(ring->wi % Blocksize)
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if(writering(ring, (uchar*)"", 1) <= 0)
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break;
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}
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static Pcidev*
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ac97match(Pcidev *p)
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{
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/* not all of the matched devices have been tested */
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while(p = pcimatch(p, 0, 0))
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switch((p->vid<<16)|p->did){
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case (0x1039<<16)|0x7012:
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case (0x1022<<16)|0x746d:
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case (0x1022<<16)|0x7445:
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case (0x10de<<16)|0x01b1:
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case (0x10de<<16)|0x006a:
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case (0x10de<<16)|0x00da:
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case (0x10de<<16)|0x00ea:
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case (0x8086<<16)|0x2415:
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case (0x8086<<16)|0x2425:
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case (0x8086<<16)|0x2445:
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case (0x8086<<16)|0x2485:
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case (0x8086<<16)|0x24c5:
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case (0x8086<<16)|0x24d5:
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case (0x8086<<16)|0x25a6:
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case (0x8086<<16)|0x266e:
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case (0x8086<<16)|0x7195:
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return p;
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}
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return nil;
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}
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static void
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sethwp(Ctlr *ctlr, long off, void *ptr)
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{
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csr8w(ctlr, off+Cr, RR);
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csr32w(ctlr, off+Bar, PCIWADDR(ptr));
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csr8w(ctlr, off+Lvi, 0);
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}
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static int
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ac97reset(Audio *adev)
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{
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static Ctlr *cards = nil;
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Pcidev *p;
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int i, irq, tbdf;
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Ctlr *ctlr;
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ulong ctl, stat = 0;
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/* make a list of all ac97 cards if not already done */
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if(cards == nil){
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p = nil;
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while(p = ac97match(p)){
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ctlr = xspanalloc(sizeof(Ctlr), 8, 0);
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memset(ctlr, 0, sizeof(Ctlr));
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ctlr->pcidev = p;
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ctlr->next = cards;
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cards = ctlr;
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}
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}
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/* pick a card from the list */
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for(ctlr = cards; ctlr; ctlr = ctlr->next){
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if(p = ctlr->pcidev){
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ctlr->pcidev = nil;
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goto Found;
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}
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}
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return -1;
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Found:
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adev->ctlr = ctlr;
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ctlr->adev = adev;
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i = 1;
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if(p->mem[0].size == 64)
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i = 0;
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else if(p->mem[1].size == 64)
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i = 1;
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else if(p->mem[0].size == 256) /* sis7012 */
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i = 1;
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else if(p->mem[1].size == 256)
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i = 0;
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ctlr->port = p->mem[i].bar & ~3;
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if(ioalloc(ctlr->port, p->mem[i].size, 0, "ac97") < 0){
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print("ac97: ioalloc failed for port 0x%04lux\n", ctlr->port);
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return -1;
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}
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i = (i+1) & 1;
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ctlr->mixport = p->mem[i].bar & ~3;
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if(ioalloc(ctlr->mixport, p->mem[i].size, 0, "ac97mix") < 0){
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print("ac97: ioalloc failed for mixport 0x%04lux\n", ctlr->mixport);
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iofree(ctlr->port);
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return -1;
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}
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irq = p->intl;
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tbdf = p->tbdf;
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if(p->vid == 0x1039 && p->did == 0x7012)
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ctlr->sis7012 = 1;
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print("#A%d: ac97 port 0x%04lux mixport 0x%04lux irq %d\n",
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adev->ctlrno, ctlr->port, ctlr->mixport, irq);
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pcisetbme(p);
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pcisetioe(p);
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ctlr->micring.buf = xspanalloc(Bufsize, 8, 0);
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ctlr->micring.nbuf = Bufsize;
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ctlr->micring.ri = 0;
|
|
ctlr->micring.wi = 0;
|
|
|
|
ctlr->inring.buf = xspanalloc(Bufsize, 8, 0);
|
|
ctlr->inring.nbuf = Bufsize;
|
|
ctlr->inring.ri = 0;
|
|
ctlr->inring.wi = 0;
|
|
|
|
ctlr->outring.buf = xspanalloc(Bufsize, 8, 0);
|
|
ctlr->outring.nbuf = Bufsize;
|
|
ctlr->outring.ri = 0;
|
|
ctlr->outring.wi = 0;
|
|
|
|
for(i = 0; i < Ndesc; i++){
|
|
int size, off = i * Blocksize;
|
|
|
|
if(ctlr->sis7012)
|
|
size = Blocksize;
|
|
else
|
|
size = Blocksize / 2;
|
|
ctlr->micdesc[i].addr = PCIWADDR(ctlr->micring.buf + off);
|
|
ctlr->micdesc[i].size = Ioc | size;
|
|
ctlr->indesc[i].addr = PCIWADDR(ctlr->inring.buf + off);
|
|
ctlr->indesc[i].size = Ioc | size;
|
|
ctlr->outdesc[i].addr = PCIWADDR(ctlr->outring.buf + off);
|
|
ctlr->outdesc[i].size = Ioc | size;
|
|
}
|
|
|
|
ctl = csr32r(ctlr, Cnt);
|
|
ctl &= ~(EnaRESER | Aclso);
|
|
|
|
if((ctl & Accr) == 0){
|
|
print("#A%d: ac97 cold reset\n", adev->ctlrno);
|
|
ctl |= Accr;
|
|
}else{
|
|
print("#A%d: ac97 warm reset\n", adev->ctlrno);
|
|
ctl |= Acwr;
|
|
}
|
|
|
|
csr32w(ctlr, Cnt, ctl);
|
|
for(i = 0; i < Maxbusywait; i++){
|
|
if((csr32r(ctlr, Cnt) & Acwr) == 0)
|
|
break;
|
|
microdelay(1);
|
|
}
|
|
if(i == Maxbusywait)
|
|
print("#A%d: ac97 gave up waiting Acwr to go down\n", adev->ctlrno);
|
|
|
|
for(i = 0; i < Maxbusywait; i++){
|
|
if((stat = csr32r(ctlr, Sta)) & (Pcr | Scr | S2cr))
|
|
break;
|
|
microdelay(1);
|
|
}
|
|
if(i == Maxbusywait)
|
|
print("#A%d: ac97 gave up waiting codecs become ready\n", adev->ctlrno);
|
|
|
|
print("#A%d: ac97 codecs ready:%s%s%s\n", adev->ctlrno,
|
|
(stat & Pcr) ? " sdin0" : "",
|
|
(stat & Scr) ? " sdin1" : "",
|
|
(stat & S2cr) ? " sdin2" : "");
|
|
|
|
print("#A%d: ac97 codecs resumed:%s%s%s\n", adev->ctlrno,
|
|
(stat & Pri) ? " sdin0" : "",
|
|
(stat & Sri) ? " sdin1" : "",
|
|
(stat & S2ri) ? " sdin2" : "");
|
|
|
|
sethwp(ctlr, In, ctlr->indesc);
|
|
sethwp(ctlr, Out, ctlr->outdesc);
|
|
sethwp(ctlr, Mic, ctlr->micdesc);
|
|
|
|
csr8w(ctlr, In+Cr, Ioce); /* | Lvbie | Feie */
|
|
csr8w(ctlr, Out+Cr, Ioce); /* | Lvbie | Feie */
|
|
csr8w(ctlr, Mic+Cr, Ioce); /* | Lvbie | Feie */
|
|
|
|
ac97mixreset(adev, ac97mixw, ac97mixr);
|
|
|
|
adev->read = ac97read;
|
|
adev->write = ac97write;
|
|
adev->close = ac97close;
|
|
adev->buffered = ac97buffered;
|
|
adev->status = ac97status;
|
|
|
|
intrenable(irq, ac97interrupt, adev, tbdf, adev->name);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
audioac97link(void)
|
|
{
|
|
addaudiocard("ac97", ac97reset);
|
|
}
|