2a1b43ad98
previously, we had to maintain 3 sets of pci vid/did's: 1) in /lib/vgadb for detection 2) in the userspace driver in aux/vga 3) in the kernel mode driver this change makes the kernel mode driver more dumb in the cases where possible. we let userspace do the pci enumeration and if needed, it can set the pci address of the vga card. kernel mode drivers can assume to get the right pci device passed in scr->pci for enable() and linear() functions and just do very basic sanity checking before mapping framebuffer and mmio regions. vgalinearpciid() was removed as userspace is responsible to pick pci device. theres a new vgactl message "pcidev" where userspace can set the bus address. we initialize scr->pci in vgareset() to the first pci graphics card found. this should cover cases when an old aux/vga binary is used that doesnt use the new pcidev message. userspace drivers will now use the pci device that got a match from /lib/vgadb and skip ther own enumeration. this way, vga cards can be made to work by simply adding an entry in vgadb with no need to modify userspace or kernelspace drivers. this is not always possible if the driver derives information from the specific card model.
512 lines
9.4 KiB
C
512 lines
9.4 KiB
C
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/*
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* Matrox G200, G400 and G450.
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* Written by Philippe Anel <xigh@free.fr>
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*
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* 2006-08-07 : Minor fix to allow the G200 cards to work fine. YDSTORG is now initialized.
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* : Also support for 16 and 24 bit modes is added.
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* : by Leonardo Valencia <leoval@anixcorp.com>
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*/
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#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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#include "../port/error.h"
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#define Image IMAGE
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#include <draw.h>
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#include <memdraw.h>
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#include <cursor.h>
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#include "screen.h"
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enum {
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MATROX = 0x102B,
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MGA550 = 0x2527,
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MGA4xx = 0x0525,
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MGA200 = 0x0521,
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FCOL = 0x1c24,
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FXRIGHT = 0x1cac,
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FXLEFT = 0x1ca8,
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YDST = 0x1c90,
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YLEN = 0x1c5c,
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DWGCTL = 0x1c00,
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DWG_TRAP = 0x04,
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DWG_BITBLT = 0x08,
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DWG_ILOAD = 0x09,
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DWG_LINEAR = 0x0080,
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DWG_SOLID = 0x0800,
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DWG_ARZERO = 0x1000,
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DWG_SGNZERO = 0x2000,
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DWG_SHIFTZERO = 0x4000,
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DWG_REPLACE = 0x000C0000,
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DWG_BFCOL = 0x04000000,
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SRCORG = 0x2cb4,
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PITCH = 0x1c8c,
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DSTORG = 0x2cb8,
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YDSTORG = 0x1c94,
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PLNWRT = 0x1c1c,
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ZORG = 0x1c0c,
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MACCESS = 0x1c04,
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STATUS = 0x1e14,
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FXBNDRY = 0x1C84,
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CXBNDRY = 0x1C80,
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YTOP = 0x1C98,
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YBOT = 0x1C9C,
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YDSTLEN = 0x1C88,
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AR0 = 0x1C60,
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AR1 = 0x1C64,
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AR2 = 0x1C68,
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AR3 = 0x1C6C,
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AR4 = 0x1C70,
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AR5 = 0x1C74,
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SGN = 0x1C58,
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SGN_LEFT = 1,
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SGN_UP = 4,
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GO = 0x0100,
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FIFOSTATUS = 0x1E10,
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CACHEFLUSH = 0x1FFF,
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CRTCEXTIDX = 0x1FDE, /* CRTC Extension Index */
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CRTCEXTDATA = 0x1FDF, /* CRTC Extension Data */
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FILL_OPERAND = 0x800c7804,
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};
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static void
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mgawrite8(VGAscr *scr, int index, uchar val)
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{
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((uchar*)scr->mmio)[index] = val;
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}
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static uchar
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mgaread8(VGAscr *scr, int index)
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{
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return ((uchar*)scr->mmio)[index];
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}
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static uchar
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crtcextset(VGAscr *scr, int index, uchar set, uchar clr)
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{
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uchar tmp;
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mgawrite8(scr, CRTCEXTIDX, index);
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tmp = mgaread8(scr, CRTCEXTDATA);
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mgawrite8(scr, CRTCEXTIDX, index);
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mgawrite8(scr, CRTCEXTDATA, (tmp & ~clr) | set);
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return tmp;
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}
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static void
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mga4xxenable(VGAscr* scr)
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{
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Pcidev *pci;
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int size;
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int i, n, k;
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uchar *p;
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uchar x[16];
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uchar crtcext3;
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if(scr->mmio)
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return;
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pci = scr->pci;
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if(pci == nil)
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return;
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scr->mmio = vmap(pci->mem[1].bar&~0x0F, 16*1024);
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if(scr->mmio == nil)
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return;
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addvgaseg("mga4xxmmio", pci->mem[1].bar&~0x0F, pci->mem[1].size);
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/* need to map frame buffer here too, so vga can find memory size */
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if(pci->did == MGA4xx || pci->did == MGA550)
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size = 32*MB;
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else
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size = 8*MB;
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vgalinearaddr(scr, pci->mem[0].bar&~0x0F, size);
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if(scr->paddr){
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/* Find out how much memory is here, some multiple of 2 MB */
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/* First Set MGA Mode ... */
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crtcext3 = crtcextset(scr, 3, 0x80, 0x00);
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p = scr->vaddr;
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n = (size / MB) / 2;
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for(i = 0; i < n; i++){
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k = (2*i+1)*MB;
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p[k] = 0;
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p[k] = i+1;
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*((uchar*)scr->mmio + CACHEFLUSH) = 0;
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x[i] = p[k];
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}
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for(i = 1; i < n; i++)
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if(x[i] != i+1)
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break;
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scr->apsize = 2*i*MB; /* sketchy */
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addvgaseg("mga4xxscreen", scr->paddr, scr->apsize);
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crtcextset(scr, 3, crtcext3, 0xff);
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}
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}
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enum{
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Index = 0x00, /* Index */
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Data = 0x0A, /* Data */
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Cxlsb = 0x0C, /* Cursor X LSB */
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Cxmsb = 0x0D, /* Cursor X MSB */
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Cylsb = 0x0E, /* Cursor Y LSB */
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Cymsb = 0x0F, /* Cursor Y MSB */
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Icuradrl = 0x04, /* Cursor Base Address Low */
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Icuradrh = 0x05, /* Cursor Base Address High */
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Icctl = 0x06, /* Indirect Cursor Control */
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};
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static void
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dac4xxdisable(VGAscr *scr)
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{
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uchar *dac4xx;
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if(scr->mmio == 0)
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return;
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dac4xx = (uchar*)scr->mmio+0x3C00;
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*(dac4xx+Index) = Icctl;
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*(dac4xx+Data) = 0x00;
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}
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static void
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dac4xxload(VGAscr *scr, Cursor *curs)
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{
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int y;
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uchar *p;
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uchar *dac4xx;
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if(scr->mmio == 0)
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return;
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dac4xx = (uchar*)scr->mmio+0x3C00;
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dac4xxdisable(scr);
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p = (uchar*)scr->storage;
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for(y = 0; y < 64; y++){
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*p++ = 0; *p++ = 0; *p++ = 0;
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*p++ = 0; *p++ = 0; *p++ = 0;
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if(y < 16){
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*p++ = curs->set[1+y*2];
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*p++ = curs->set[y*2];
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} else{
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*p++ = 0; *p++ = 0;
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}
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*p++ = 0; *p++ = 0; *p++ = 0;
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*p++ = 0; *p++ = 0; *p++ = 0;
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if(y < 16){
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*p++ = curs->set[1+y*2]|curs->clr[1+2*y];
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*p++ = curs->set[y*2]|curs->clr[2*y];
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} else{
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*p++ = 0; *p++ = 0;
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}
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}
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scr->offset.x = 64 + curs->offset.x;
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scr->offset.y = 64 + curs->offset.y;
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*(dac4xx+Index) = Icctl;
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*(dac4xx+Data) = 0x03;
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}
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static int
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dac4xxmove(VGAscr *scr, Point p)
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{
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int x, y;
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uchar *dac4xx;
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if(scr->mmio == 0)
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return 1;
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dac4xx = (uchar*)scr->mmio + 0x3C00;
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x = p.x + scr->offset.x;
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y = p.y + scr->offset.y;
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*(dac4xx+Cxlsb) = x & 0xFF;
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*(dac4xx+Cxmsb) = (x>>8) & 0x0F;
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*(dac4xx+Cylsb) = y & 0xFF;
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*(dac4xx+Cymsb) = (y>>8) & 0x0F;
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return 0;
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}
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static void
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dac4xxenable(VGAscr *scr)
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{
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uchar *dac4xx;
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ulong storage;
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if(scr->mmio == 0)
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return;
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dac4xx = (uchar*)scr->mmio+0x3C00;
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dac4xxdisable(scr);
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storage = (scr->apsize-4096)&~0x3ff;
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*(dac4xx+Index) = Icuradrl;
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*(dac4xx+Data) = 0xff & (storage >> 10);
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*(dac4xx+Index) = Icuradrh;
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*(dac4xx+Data) = 0xff & (storage >> 18);
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scr->storage = (ulong)scr->vaddr + storage;
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/* Show X11-Like Cursor */
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*(dac4xx+Index) = Icctl;
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*(dac4xx+Data) = 0x03;
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/* Cursor Color 0 : White */
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*(dac4xx+Index) = 0x08;
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*(dac4xx+Data) = 0xff;
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*(dac4xx+Index) = 0x09;
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*(dac4xx+Data) = 0xff;
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*(dac4xx+Index) = 0x0a;
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*(dac4xx+Data) = 0xff;
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/* Cursor Color 1 : Black */
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*(dac4xx+Index) = 0x0c;
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*(dac4xx+Data) = 0x00;
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*(dac4xx+Index) = 0x0d;
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*(dac4xx+Data) = 0x00;
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*(dac4xx+Index) = 0x0e;
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*(dac4xx+Data) = 0x00;
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/* Cursor Color 2 : Red */
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*(dac4xx+Index) = 0x10;
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*(dac4xx+Data) = 0xff;
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*(dac4xx+Index) = 0x11;
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*(dac4xx+Data) = 0x00;
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*(dac4xx+Index) = 0x12;
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*(dac4xx+Data) = 0x00;
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/*
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* Load, locate and enable the
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* 64x64 cursor in X11 mode.
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*/
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dac4xxload(scr, &arrow);
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dac4xxmove(scr, ZP);
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}
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static void
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mga4xxblank(VGAscr *scr, int blank)
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{
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char *cp;
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uchar *mga;
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uchar seq1, crtcext1;
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/* blank = 0 -> turn screen on */
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/* blank = 1 -> turn screen off */
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if(scr->mmio == 0)
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return;
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mga = (uchar*)scr->mmio;
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if(blank == 0){
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seq1 = 0x00;
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crtcext1 = 0x00;
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} else {
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seq1 = 0x20;
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crtcext1 = 0x10; /* Default value ... : standby */
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cp = getconf("*dpms");
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if(cp){
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if(cistrcmp(cp, "standby") == 0)
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crtcext1 = 0x10;
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else if(cistrcmp(cp, "suspend") == 0)
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crtcext1 = 0x20;
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else if(cistrcmp(cp, "off") == 0)
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crtcext1 = 0x30;
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}
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}
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*(mga + 0x1fc4) = 1;
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seq1 |= *(mga + 0x1fc5) & ~0x20;
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*(mga + 0x1fc5) = seq1;
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*(mga + 0x1fde) = 1;
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crtcext1 |= *(mga + 0x1fdf) & ~0x30;
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*(mga + 0x1fdf) = crtcext1;
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}
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static void
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mgawrite32(uchar *mga, ulong reg, ulong val)
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{
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*((ulong*)(&mga[reg])) = val;
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}
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static ulong
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mgaread32(uchar *mga, ulong reg)
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{
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return *((ulong*)(&mga[reg]));
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}
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static void
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mga_fifo(uchar *mga, uchar n)
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{
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ulong t;
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#define Timeout 100
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for (t = 0; t < Timeout; t++)
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if ((mgaread32(mga, FIFOSTATUS) & 0xff) >= n)
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break;
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if (t >= Timeout)
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print("mga4xx: fifo timeout");
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}
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static int
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mga4xxfill(VGAscr *scr, Rectangle r, ulong color)
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{
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uchar *mga;
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if(scr->mmio == 0)
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return 0;
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mga = (uchar*)scr->mmio;
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mga_fifo(mga, 7);
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mgawrite32(mga, DWGCTL, 0);
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mgawrite32(mga, FCOL, color);
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mgawrite32(mga, FXLEFT, r.min.x);
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mgawrite32(mga, FXRIGHT, r.max.x);
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mgawrite32(mga, YDST, r.min.y);
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mgawrite32(mga, YLEN, Dy(r));
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mgawrite32(mga, DWGCTL + GO, FILL_OPERAND);
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while(mgaread32(mga, STATUS) & 0x00010000)
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;
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return 1;
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}
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static int
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mga4xxscroll(VGAscr *scr, Rectangle dr, Rectangle sr)
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{
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uchar * mga;
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int pitch;
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int width, height;
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ulong start, end, sgn;
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Point sp, dp;
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if(scr->mmio == 0)
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return 0;
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mga = (uchar*)scr->mmio;
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assert(Dx(sr) == Dx(dr) && Dy(sr) == Dy(dr));
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sp = sr.min;
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dp = dr.min;
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if(eqpt(sp, dp))
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return 1;
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pitch = Dx(scr->gscreen->r);
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width = Dx(sr);
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height = Dy(sr);
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sgn = 0;
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if(dp.y > sp.y && dp.y < sp.y + height){
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sp.y += height - 1;
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dp.y += height - 1;
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sgn |= SGN_UP;
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}
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width--;
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start = end = sp.x + (sp.y * pitch);
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if(dp.x > sp.x && dp.x < sp.x + width){
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start += width;
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sgn |= SGN_LEFT;
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}
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else
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end += width;
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mga_fifo(mga, 8);
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mgawrite32(mga, DWGCTL, 0);
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mgawrite32(mga, SGN, sgn);
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mgawrite32(mga, AR5, sgn & SGN_UP ? -pitch : pitch);
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mgawrite32(mga, AR0, end);
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mgawrite32(mga, AR3, start);
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mgawrite32(mga, FXBNDRY, ((dp.x + width) << 16) | dp.x);
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mgawrite32(mga, YDSTLEN, (dp.y << 16) | height);
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mgawrite32(mga, DWGCTL + GO, DWG_BITBLT | DWG_SHIFTZERO | DWG_BFCOL | DWG_REPLACE);
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while(mgaread32(mga, STATUS) & 0x00010000)
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;
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return 1;
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}
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static void
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mga4xxdrawinit(VGAscr *scr)
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{
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uchar *mga;
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if(scr->mmio == 0)
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return;
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mga = (uchar*)scr->mmio;
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mgawrite32(mga, SRCORG, 0);
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mgawrite32(mga, DSTORG, 0);
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mgawrite32(mga, YDSTORG, 0);
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mgawrite32(mga, ZORG, 0);
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mgawrite32(mga, PLNWRT, ~0);
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mgawrite32(mga, FCOL, 0xffff0000);
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mgawrite32(mga, CXBNDRY, 0xFFFF0000);
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mgawrite32(mga, YTOP, 0);
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mgawrite32(mga, YBOT, 0x01FFFFFF);
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mgawrite32(mga, PITCH, Dx(scr->gscreen->r) & ((1 << 13) - 1));
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switch(scr->gscreen->depth){
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case 8:
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mgawrite32(mga, MACCESS, 0);
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break;
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case 16:
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mgawrite32(mga, MACCESS, 1);
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break;
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case 24:
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mgawrite32(mga, MACCESS, 3);
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break;
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case 32:
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mgawrite32(mga, MACCESS, 2);
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break;
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default:
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return; /* depth not supported ! */
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}
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scr->fill = mga4xxfill;
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scr->scroll = mga4xxscroll;
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scr->blank = mga4xxblank;
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}
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VGAdev vgamga4xxdev = {
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"mga4xx",
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mga4xxenable, /* enable */
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0, /* disable */
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0, /* page */
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0, /* linear */
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mga4xxdrawinit,
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};
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VGAcur vgamga4xxcur = {
|
|
"mga4xxhwgc",
|
|
dac4xxenable,
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|
dac4xxdisable,
|
|
dac4xxload,
|
|
dac4xxmove,
|
|
};
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