806353ec9e
Tilting allows using left/right rotated or invetrted display orientation. This can be changed at runtime such as: echo tilt right > /dev/vgactl This removes the old panning and vga overlays as they are only implemented with some ancient vga controllers.
570 lines
16 KiB
C
570 lines
16 KiB
C
#include "u.h"
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#include "../port/lib.h"
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#include "mem.h"
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#include "dat.h"
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#include "fns.h"
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#include "io.h"
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#include "../port/error.h"
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#define Image IMAGE
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#include <draw.h>
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#include <memdraw.h>
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#include <cursor.h>
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#include "screen.h"
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enum {
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PCIS3 = 0x5333, /* PCI VID */
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SAVAGE3D = 0x8A20, /* PCI DID */
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SAVAGE3DMV = 0x8A21,
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SAVAGE4 = 0x8A22,
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PROSAVAGEP = 0x8A25,
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PROSAVAGEK = 0x8A26,
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PROSAVAGE8 = 0x8D04,
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SAVAGEMXMV = 0x8C10,
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SAVAGEMX = 0x8C11,
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SAVAGEIXMV = 0x8C12,
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SAVAGEIX = 0x8C13,
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SUPERSAVAGEIXC16 = 0x8C2E,
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SAVAGE2000 = 0x9102,
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VIRGE = 0x5631,
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VIRGEGX2 = 0x8A10,
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VIRGEDXGX = 0x8A01,
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VIRGEVX = 0x883D,
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VIRGEMX = 0x8C01,
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VIRGEMXP = 0x8C03,
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AURORA64VPLUS = 0x8812,
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};
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/*
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* Savage4 et al. acceleration.
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*
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* This is based only on the Savage4 documentation.
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* It is expected to work on other Savage cards as well,
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* but has not been tried.
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*
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* There are five ways to access the 2D graphics engine registers:
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* - Old MMIO non-packed format
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* - Old MMIO packed format
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* - New MMIO non-packed format
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* - New MMIO packed format
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* - Burst Command Interface (BCI)
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*
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* Of these, the manual hints that the first three are deprecated,
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* and it does not document any of those three well enough to use.
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*
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* I have tried for many hours with no success to understand the BCI
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* interface well enough to use it. It is not well documented, and the
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* XFree86 driver seems to completely contradict what little documentation
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* there is.
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*
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* This leaves the packed new MMIO.
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* The manual contradicts itself here, claming that the registers
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* start at 0x2008100 as well as at 0x0008100 from the base of the
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* mmio segment. Since the segment is only 512k, we assume that
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* the latter is the correct offset.
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*
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* According to the manual, only 16-bit reads of the 2D registers
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* are supported: 32-bit reads will return garbage in the upper word.
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* 32-bit writes must be enabled explicitly.
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*
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* 32-bit reads of the status registers seem just fine.
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*/
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/* 2D graphics engine registers for Savage4; others appear to be mostly the same */
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enum {
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SubsystemStatus = 0x8504, /* Subsystem Status: read only */
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/* read only: whether we get interrupts on various events */
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VsyncInt = 1<<0, /* vertical sync */
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GeBusyInt = 1<<1, /* 2D graphics engine busy */
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BfifoFullInt = 1<<2, /* BIU FIFO full */
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BfifoEmptyInt = 1<<3, /* BIU FIFO empty */
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CfifoFullInt = 1<<4, /* command FIFO full */
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CfifoEmptyInt = 1<<5, /* command FIFO empty */
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BciInt = 1<<6, /* BCI */
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LpbInt = 1<<7, /* LPB */
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CbHiInt = 1<<16, /* COB upper threshold */
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CbLoInt = 1<<17, /* COB lower threshold */
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SubsystemCtl = 0x8504, /* Subsystem Control: write only */
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/* clear interrupts for various events */
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VsyncClr = 1<<0,
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GeBusyClr = 1<<1,
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BfifoFullClr = 1<<2,
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BfifoEmptyClr = 1<<3,
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CfifoFullClr = 1<<4,
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CfifoEmptyClr = 1<<5,
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BciClr = 1<<6,
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LpbClr = 1<<7,
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CbHiClr = 1<<16,
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CbLoClr = 1<<17,
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/* enable interrupts for various events */
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VsyncEna = 1<<8,
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Busy2DEna = 1<<9,
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BfifoFullEna = 1<<10,
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BfifoEmptyEna = 1<<11,
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CfifoFullEna = 1<<12,
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CfifoEmptyEna = 1<<13,
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SubsysBciEna = 1<<14,
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CbHiEna = 1<<24,
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CbLoEna = 1<<25,
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/* 2D graphics engine software reset */
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GeSoftReset = 1<<15,
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FifoStatus = 0x8508, /* FIFO status: read only */
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CwbEmpty = 1<<0, /* command write buffer empty */
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CrbEmpty = 1<<1, /* command read buffer empty */
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CobEmpty = 1<<2, /* command overflow buffer empty */
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CfifoEmpty = 1<<3, /* command FIFO empty */
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CwbFull = 1<<8, /* command write buffer full */
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CrbFull = 1<<9, /* command read buffer full */
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CobFull = 1<<10, /* command overflow buffer full */
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CfifoFull = 1<<11, /* command FIFO full */
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AdvFunCtl = 0x850C, /* Advanced Function Control: read/write */
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GeEna = 1<<0, /* enable 2D/3D engine */
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/*
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* according to the manual, BigPixel should be
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* set when bpp >= 8 (bpp != 4), and then CR50_5-4 are
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* used to figure out bpp example. however, it does bad things
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* to the screen in 8bpp mode.
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*/
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BigPixel = 1<<2, /* 8 or more bpp enhanced mode */
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LaEna = 1<<3, /* linear addressing ena: or'ed with CR58_4 */
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Mclk_2 = 0<<8, /* 2D engine clock divide: MCLK/2 */
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Mclk_4 = 1<<8, /* " MCLK/4 */
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Mclk = 2<<8, /* " MCLK */
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/* Mclk = 3<<8, /* " MCLK */
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Ic33mhz = 1<<16, /* Internal clock 33 MHz (instead of 66) */
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WakeupReg = 0x8510, /* Wakeup: read/write */
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WakeupBit = 1<<0, /* wake up: or'ed with 3C3_0 */
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SourceY = 0x8100, /* UL corner of bitblt source */
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SourceX = 0x8102, /* " */
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RectY = 0x8100, /* UL corner of rectangle fill */
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RectX = 0x8102, /* " */
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DestY = 0x8108, /* UL corner of bitblt dest */
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DestX = 0x810A, /* " */
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Height = 0x8148, /* bitblt, image xfer rectangle height */
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Width = 0x814A, /* bitblt, image xfer rectangle width */
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StartY = 0x8100, /* Line draw: first point*/
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StartX = 0x8102, /* " */
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/*
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* For line draws, the following must be programmed:
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* axial step constant = 2*min(|dx|,|dy|)
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* diagonal step constant = 2*[min(|dx|,|dy|) - max(|dx|,|dy|)]
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* error term = 2*min(|dx|,|dy|) - max(|dx|,|dy| - 1
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* [sic] when start X < end X
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* error term = 2*min(|dx|,|dy|) - max(|dx|,|dy|
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* [sic] when start X >= end X
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*/
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AxialStep = 0x8108,
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DiagonalStep = 0x810A,
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LineError = 0x8110,
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MinorLength = 0x8148, /* pixel count along minor axis */
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MajorLength = 0x814A, /* pixel count along major axis */
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DrawCmd = 0x8118, /* Drawing Command: write only */
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CmdMagic = 0<<1,
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AcrossPlane = 1<<1, /* across the plane mode */
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LastPixelOff = 1<<2, /* last pixel of line or vector draw not drawn */
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Radial = 1<<3, /* enable radial direction (else axial) */
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DoDraw = 1<<4, /* draw pixels (else only move current pos) */
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DrawRight = 1<<5, /* axial drawing direction: left to right */
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/* DrawLeft = 0<<5, */
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MajorY = 1<<6,
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/* MajorX = 0<<6, */
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DrawDown = 1<<7,
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/* DrawUp = 0<<7, */
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Degree0 = 0<<5, /* drawing direction when Radial */
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Degree45 = 1<<5,
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/* ... */
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Degree315 = 7<<5,
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UseCPUData = 1<<8,
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/* image write bus transfer width */
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Bus8 = 0<<9,
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Bus16 = 1<<9,
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/*
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* in Bus32 mode, doubleword bits beyond the image rect width are
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* discarded. each line starts on a new doubleword.
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* Bus32AP is intended for across-the-plane mode and
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* rounds to byte boundaries instead.
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*/
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Bus32 = 2<<9,
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Bus32AP = 3<<9,
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CmdNop = 0<<13, /* nop */
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CmdLine = 1<<13, /* draw line */
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CmdFill = 2<<13, /* fill rectangle */
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CmdBitblt = 6<<13, /* bitblt */
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CmdPatblt = 7<<13, /* 8x8 pattern blt */
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SrcGBD = 0<<16,
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SrcPBD = 1<<16,
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SrcSBD = 2<<16,
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DstGBD = 0<<18,
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DstPBD = 1<<18,
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DstSBD = 2<<18,
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/* color sources, controls */
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BgColor = 0x8120, /* Background Color: read/write */
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FgColor = 0x8124, /* Foreground Color: read/write */
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BitplaneWmask = 0x8128, /* Bitplane Write Mask: read/write */
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BitplaneRmask = 0x812C, /* Bitplane Read Mask: read/write */
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CmpColor = 0x8130, /* Color Compare: read/write */
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BgMix = 0x8134,
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FgMix = 0x8136,
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MixNew = 7,
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SrcBg = 0<<5,
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SrcFg = 1<<5,
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SrcCPU = 2<<5,
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SrcDisp = 3<<5,
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/* clipping rectangle */
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TopScissors = 0x8138, /* Top Scissors: write only */
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LeftScissors = 0x813A, /* Left Scissors: write only */
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BottomScissors = 0x813C, /* Bottom Scissors: write only */
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RightScissors = 0x813E, /* Right Scissors: write only */
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/*
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* Registers with Magic were indirectly accessed in older modes.
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* It is not clear whether the Magic is necessary.
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* In the older modes, writes to these registers were pipelined,
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* so that you had to issue an engine command and wait for engine
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* idle before reading a write back. It is not clear if this is
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* still the case either.
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*/
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PixCtl = 0x8140, /* Pixel Control: write only */
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PixMagic = 0xA<<12,
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PixMixFg = 0<<6, /* foreground mix register always */
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PixMixCPU = 2<<6, /* CPU data determines mix register */
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PixMixDisp = 3<<6, /* display data determines mix register */
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MfMisc2Ctl = 0x8142, /* Multifunction Control Misc. 2: write only */
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MfMisc2Magic = 0xD<<12,
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DstShift = 0, /* 3 bits: destination base address in MB */
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SrcShift = 4, /* 3 bits: source base address in MB */
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WaitFifoEmpty = 2<<8, /* wait for write FIFO empty between draws */
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MfMiscCtl = 0x8144, /* Multifunction Control Misc: write only */
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MfMiscMagic = 0xE<<12,
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UseHighBits = 1<<4, /* select upper 16 bits for 32-bit reg access */
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ClipInvert = 1<<5, /* only touch pixels outside clip rectangle */
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SkipSame = 0<<6, /* ignore pixels with color CmpColor */
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SkipDifferent = 1<<7, /* ignore pixels not color CmpColor */
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CmpEna = 1<<8, /* enable color compare */
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W32Ena = 1<<9, /* enable 32-bit register write */
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ClipDis = 1<<11, /* disable clipping */
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/*
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* The bitmap descriptor 1 registers contain the starting
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* address of the bitmap (in bytes).
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* The bitmap descriptor 2 registesr contain stride (in pixels)
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* in the lower 16 bits, depth (in bits) in the next 8 bits,
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* and whether block write is disabled.
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*/
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GBD1 = 0x8168, /* Global Bitmap Descriptor 1: read/write */
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GBD2 = 0x816C, /* Global Bitmap Descriptor 2: read/write */
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/* GBD2-only bits */
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BDS64 = 1<<0, /* bitmap descriptor size 64 bits */
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GBDBciEna = 1<<3, /* BCI enable */
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/* generic BD2 bits */
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BlockWriteDis = 1<<28,
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StrideShift = 0,
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DepthShift = 16,
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PBD1 = 0x8170, /* Primary Bitmap Descriptor: read/write */
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PBD2 = 0x8174,
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SBD1 = 0x8178, /* Secondary Bitmap Descriptor: read/write */
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SBD2 = 0x817C,
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};
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/* mastered data transfer registers */
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/* configuration/status registers */
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enum {
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XStatus0 = 0x48C00, /* Status Word 0: read only */
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/* rev. A silicon differs from rev. B; use AltStatus0 */
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CBEMaskA = 0x1FFFF, /* filled command buffer entries */
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CBEShiftA = 0,
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BciIdleA = 1<<17, /* BCI idle */
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Ge3IdleA = 1<<18, /* 3D engine idle */
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Ge2IdleA = 1<<19, /* 2D engine idle */
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McpIdleA = 1<<20, /* motion compensation processor idle */
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MeIdleA = 1<<22, /* master engine idle */
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PfPendA = 1<<23, /* page flip pending */
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CBEMaskB = 0x1FFFFF,
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CBEShiftB = 0,
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BciIdleB = 1<<25,
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Ge3IdleB = 1<<26,
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Ge2IdleB = 1<<27,
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McpIdleB = 1<<28,
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MeIdleB = 1<<30,
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PfPendB = 1<<31,
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AltStatus0 = 0x48C60, /* Alternate Status Word 0: read only */
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CBEMask = 0x1FFFF,
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CBEShift = 0,
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/* the Savage4 manual says bits 17..23 for these, like Status0 */
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/* empirically, they are bits 21..26 */
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BciIdle = 1<<21,
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Ge3Idle = 1<<22,
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Ge2Idle = 1<<23,
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McpIdle = 1<<24,
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MeIdle = 1<<25,
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PfPend = 1<<26,
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XStatus1 = 0x48C04, /* Status Word 1: read only */
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/* contains event tag 1, event tag 0, both 16 bits */
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XStatus2 = 0x48C08, /* Status Word 2: read only */
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ScanMask = 0x3FF, /* current scan line */
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ScanShift = 0,
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VRTMask = 0x7F100, /* vert retrace count */
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VRTShift = 11,
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CbThresh = 0x48C10, /* Command Buffer Thresholds: read/write */
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CobOff = 0x48C14, /* Command Overflow Buffer: read/write */
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CobPtr = 0x48C18, /* Command Overflow Buffer Pointers: read/write */
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CobEna = 1<<2, /* command overflow buffer enable */
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CobBciEna = 1<<3, /* BCI function enable */
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CbeMask = 0xFFFF8000, /* no. of entries in command buffer */
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CbeShift = 15,
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AltStatus1 = 0x48C64, /* Alternate Status Word 1: read onnly */
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/* contains current texture surface tag, vertex buffer tag */
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};
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struct {
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ulong idletimeout;
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ulong tostatw[16];
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} savagestats;
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enum {
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Maxloop = 1<<20
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};
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static void
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savagewaitidle(VGAscr *scr)
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{
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long x;
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ulong *statw, mask, goal;
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switch(scr->id){
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case SAVAGE4:
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case PROSAVAGEP:
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case PROSAVAGEK:
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case PROSAVAGE8:
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/* wait for engine idle and FIFO empty */
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statw = (ulong*)((uchar*)scr->mmio+AltStatus0);
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mask = CBEMask | Ge2Idle;
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goal = Ge2Idle;
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break;
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/* case SAVAGEMXMV: ? */
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/* case SAVAGEMX: ? */
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/* case SAVAGEIX: ? */
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case SUPERSAVAGEIXC16:
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case SAVAGEIXMV:
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case SAVAGEMXMV:
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/* wait for engine idle and FIFO empty */
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statw = (ulong*)((uchar*)scr->mmio+XStatus0);
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mask = CBEMaskA | Ge2IdleA;
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goal = Ge2IdleA;
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break;
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default:
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/*
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* best we can do: can't print or we'll call ourselves.
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* savageinit is supposed to not let this happen.
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*/
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return;
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}
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for(x=0; x<Maxloop; x++)
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if((*statw & mask) == goal)
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return;
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savagestats.tostatw[savagestats.idletimeout++&15] = *statw;
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savagestats.tostatw[savagestats.idletimeout++&15] = (ulong)statw;
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}
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static int
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savagefill(VGAscr *scr, Rectangle r, ulong sval)
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{
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uchar *mmio;
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mmio = (uchar*)scr->mmio;
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*(ulong*)(mmio+FgColor) = sval;
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*(ulong*)(mmio+BgColor) = sval;
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*(ulong*)(mmio+BgMix) = SrcFg|MixNew;
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*(ulong*)(mmio+FgMix) = SrcFg|MixNew;
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*(ushort*)(mmio+RectY) = r.min.y;
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*(ushort*)(mmio+RectX) = r.min.x;
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*(ushort*)(mmio+Width) = Dx(r)-1;
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*(ushort*)(mmio+Height) = Dy(r)-1;
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*(ulong*)(mmio+DrawCmd) = CmdMagic | DoDraw | CmdFill | DrawRight | DrawDown;
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savagewaitidle(scr);
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return 1;
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}
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static int
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savagescroll(VGAscr *scr, Rectangle r, Rectangle sr)
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{
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uchar *mmio;
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ulong cmd;
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Point dp, sp;
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cmd = CmdMagic | DoDraw | CmdBitblt | SrcPBD | DstGBD;
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if(r.min.x <= sr.min.x){
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cmd |= DrawRight;
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dp.x = r.min.x;
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sp.x = sr.min.x;
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}else{
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dp.x = r.max.x-1;
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sp.x = sr.max.x-1;
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}
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if(r.min.y <= sr.min.y){
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cmd |= DrawDown;
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dp.y = r.min.y;
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sp.y = sr.min.y;
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}else{
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dp.y = r.max.y-1;
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sp.y = sr.max.y-1;
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}
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mmio = (uchar*)scr->mmio;
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*(ushort*)(mmio+SourceX) = sp.x;
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*(ushort*)(mmio+SourceY) = sp.y;
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*(ushort*)(mmio+DestX) = dp.x;
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*(ushort*)(mmio+DestY) = dp.y;
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*(ushort*)(mmio+Width) = Dx(r)-1;
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*(ushort*)(mmio+Height) = Dy(r)-1;
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*(ulong*)(mmio+BgMix) = SrcDisp|MixNew;
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*(ulong*)(mmio+FgMix) = SrcDisp|MixNew;
|
|
*(ulong*)(mmio+DrawCmd) = cmd;
|
|
savagewaitidle(scr);
|
|
return 1;
|
|
}
|
|
|
|
static void
|
|
savageblank(VGAscr*, int blank)
|
|
{
|
|
uchar seqD;
|
|
|
|
/*
|
|
* Will handle DPMS to monitor
|
|
*/
|
|
vgaxo(Seqx, 8, vgaxi(Seqx,8)|0x06);
|
|
seqD = vgaxi(Seqx, 0xD);
|
|
seqD &= 0x03;
|
|
if(blank)
|
|
seqD |= 0x50;
|
|
vgaxo(Seqx, 0xD, seqD);
|
|
|
|
/*
|
|
* Will handle LCD
|
|
*/
|
|
if(blank)
|
|
vgaxo(Seqx, 0x31, vgaxi(Seqx, 0x31) & ~0x10);
|
|
else
|
|
vgaxo(Seqx, 0x31, vgaxi(Seqx, 0x31) | 0x10);
|
|
}
|
|
|
|
|
|
void
|
|
savageinit(VGAscr *scr)
|
|
{
|
|
uchar *mmio;
|
|
ulong bd;
|
|
|
|
/* if you add chip IDs here be sure to update savagewaitidle */
|
|
switch(scr->id){
|
|
case SAVAGE4:
|
|
case PROSAVAGEP:
|
|
case PROSAVAGEK:
|
|
case PROSAVAGE8:
|
|
case SAVAGEIXMV:
|
|
case SUPERSAVAGEIXC16:
|
|
case SAVAGEMXMV:
|
|
break;
|
|
default:
|
|
print("unknown savage %.4lux\n", scr->id);
|
|
return;
|
|
}
|
|
|
|
mmio = (uchar*)scr->mmio;
|
|
if(mmio == nil) {
|
|
print("savageinit: no mmio\n");
|
|
return;
|
|
}
|
|
|
|
/* 2D graphics engine software reset */
|
|
*(ushort*)(mmio+SubsystemCtl) = GeSoftReset;
|
|
delay(2);
|
|
*(ushort*)(mmio+SubsystemCtl) = 0;
|
|
savagewaitidle(scr);
|
|
|
|
/* disable BCI as much as possible */
|
|
*(ushort*)(mmio+CobPtr) &= ~CobBciEna;
|
|
*(ushort*)(mmio+GBD2) &= ~GBDBciEna;
|
|
savagewaitidle(scr);
|
|
|
|
/* enable 32-bit writes, disable clipping */
|
|
*(ushort*)(mmio+MfMiscCtl) = MfMiscMagic|W32Ena|ClipDis;
|
|
savagewaitidle(scr);
|
|
|
|
/* enable all read, write planes */
|
|
*(ulong*)(mmio+BitplaneRmask) = ~0;
|
|
*(ulong*)(mmio+BitplaneWmask) = ~0;
|
|
savagewaitidle(scr);
|
|
|
|
/* turn on linear access, 2D engine */
|
|
*(ulong*)(mmio+AdvFunCtl) |= GeEna|LaEna;
|
|
savagewaitidle(scr);
|
|
|
|
/* set bitmap descriptors */
|
|
bd = (scr->gscreen->depth<<DepthShift) |
|
|
(scr->width<<StrideShift) | BlockWriteDis
|
|
| BDS64;
|
|
|
|
*(ulong*)(mmio+GBD1) = 0;
|
|
*(ulong*)(mmio+GBD2) = bd;
|
|
|
|
*(ulong*)(mmio+PBD1) = 0;
|
|
*(ulong*)(mmio+PBD2) = bd;
|
|
|
|
*(ulong*)(mmio+SBD1) = 0;
|
|
*(ulong*)(mmio+SBD2) = bd;
|
|
|
|
/*
|
|
* For some reason, the GBD needs to get programmed twice,
|
|
* once before the PBD, SBD, and once after.
|
|
* This empirically makes it get set right.
|
|
* I would like to better understand the ugliness
|
|
* going on here.
|
|
*/
|
|
*(ulong*)(mmio+GBD1) = 0;
|
|
*(ulong*)(mmio+GBD2) = bd;
|
|
*(ushort*)(mmio+GBD2+2) = bd>>16;
|
|
savagewaitidle(scr);
|
|
|
|
scr->fill = savagefill;
|
|
scr->scroll = savagescroll;
|
|
scr->blank = savageblank;
|
|
}
|