40 lines
518 B
C
40 lines
518 B
C
enum {
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IRQfiq = -1,
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PPI = 16,
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SPI = 32,
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IRQcntps = PPI+13,
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IRQcntpns = PPI+14,
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IRQusdhc1 = SPI+22,
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IRQusdhc2 = SPI+23,
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IRQuart1 = SPI+26,
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IRQuart2 = SPI+27,
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IRQuart3 = SPI+28,
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IRQuart4 = SPI+29,
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IRQi2c1 = SPI+35,
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IRQi2c2 = SPI+36,
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IRQi2c3 = SPI+37,
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IRQi2c4 = SPI+38,
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IRQrdc = SPI+39,
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IRQusb1 = SPI+40,
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IRQusb2 = SPI+41,
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IRQsctr0 = SPI+47,
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IRQsctr1 = SPI+48,
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IRQpci2 = SPI+74,
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IRQenet1 = SPI+118,
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IRQpci1 = SPI+122,
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};
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#define BUSUNKNOWN (-1)
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#define PCIWADDR(x) PADDR(x)
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